Threads Pipelining on the CellBE Systems

This article aims to describe a model to accelerate the execution of a parallel algorithm implemented on a Cell B.E. processor. The algorithm implements a technique of finding a moving target in a maze with dynamic architecture, using another technique of pipelining the data transfers between the...
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Autor*in:	TANASE, C. A. [verfasserIn] GAITAN, V. G. [verfasserIn]

Format:	E-Artikel
Sprache:	Englisch

Erschienen:	2013

Schlagwörter:	Cell B.E. threads PPU-SPU pipeline communication flip-flop buffer three level pipeline transfer

Übergeordnetes Werk:	In: Advances in Electrical and Computer Engineering - Stefan cel Mare University of Suceava, 2010, 13(2013), 3, Seite 121-126
Übergeordnetes Werk:	volume:13 ; year:2013 ; number:3 ; pages:121-126

Links:	Link aufrufen Link aufrufen Link aufrufen Journal toc Journal toc

DOI / URN:	10.4316/AECE.2013.03019

Katalog-ID:	DOAJ031779603

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author	TANASE, C. A.
spellingShingle	TANASE, C. A. misc TK1-9971 misc TK7885-7895 misc Cell B.E. misc threads misc PPU-SPU pipeline communication misc flip-flop buffer misc three level pipeline transfer misc Electrical engineering. Electronics. Nuclear engineering misc Computer engineering. Computer hardware Threads Pipelining on the CellBE Systems
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topic_title	TK1-9971 TK7885-7895 Threads Pipelining on the CellBE Systems Cell B.E. threads PPU-SPU pipeline communication flip-flop buffer three level pipeline transfer
topic	misc TK1-9971 misc TK7885-7895 misc Cell B.E. misc threads misc PPU-SPU pipeline communication misc flip-flop buffer misc three level pipeline transfer misc Electrical engineering. Electronics. Nuclear engineering misc Computer engineering. Computer hardware
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title	Threads Pipelining on the CellBE Systems
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abstract	This article aims to describe a model to accelerate the execution of a parallel algorithm implemented on a Cell B.E. processor. The algorithm implements a technique of finding a moving target in a maze with dynamic architecture, using another technique of pipelining the data transfers between the PPU and SPU threads. We have shown that by using the pipelining technique, we can achieve an improvement of the computing time (around 40%). It can be also seen that the pipelining technique with one SPU is about as good as the parallel technique with four SPUs.
abstractGer	This article aims to describe a model to accelerate the execution of a parallel algorithm implemented on a Cell B.E. processor. The algorithm implements a technique of finding a moving target in a maze with dynamic architecture, using another technique of pipelining the data transfers between the PPU and SPU threads. We have shown that by using the pipelining technique, we can achieve an improvement of the computing time (around 40%). It can be also seen that the pipelining technique with one SPU is about as good as the parallel technique with four SPUs.
abstract_unstemmed	This article aims to describe a model to accelerate the execution of a parallel algorithm implemented on a Cell B.E. processor. The algorithm implements a technique of finding a moving target in a maze with dynamic architecture, using another technique of pipelining the data transfers between the PPU and SPU threads. We have shown that by using the pipelining technique, we can achieve an improvement of the computing time (around 40%). It can be also seen that the pipelining technique with one SPU is about as good as the parallel technique with four SPUs.
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title_short	Threads Pipelining on the CellBE Systems
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