Evaluation and Reliability Assessment of GaN-on-Si MIS-HEMT for Power Switching Applications

This paper reports an extensive analysis of the physical mechanisms responsible for the failure of GaN-based metal–insulator–semiconductor (MIS) high electron mobility transistors (HEMTs). When stressed under high applied electric fields, the traps at the dielectric/III-N barrier interface and insid...
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Autor*in:	Po-Chien Chou [verfasserIn] Szu-Hao Chen [verfasserIn] Ting-En Hsieh [verfasserIn] Stone Cheng [verfasserIn] Jesús A. del Alamo [verfasserIn] Edward Yi Chang [verfasserIn]

Format:	E-Artikel
Sprache:	Englisch

Erschienen:	2017

Schlagwörter:	DC stress degradation GaN HEMT GaN MIS-HEMT reliability failure mechanisms trapping

Übergeordnetes Werk:	In: Energies - MDPI AG, 2008, 10(2017), 2, p 233
Übergeordnetes Werk:	volume:10 ; year:2017 ; number:2, p 233

Links:	Link aufrufen Link aufrufen Link aufrufen Journal toc

DOI / URN:	10.3390/en10020233

Katalog-ID:	DOAJ032718349

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spelling	10.3390/en10020233 doi (DE-627)DOAJ032718349 (DE-599)DOAJ0b0c19042a9747bc935c01e643f601c1 DE-627 ger DE-627 rakwb eng Po-Chien Chou verfasserin aut Evaluation and Reliability Assessment of GaN-on-Si MIS-HEMT for Power Switching Applications 2017 Text txt rdacontent Computermedien c rdamedia Online-Ressource cr rdacarrier This paper reports an extensive analysis of the physical mechanisms responsible for the failure of GaN-based metal–insulator–semiconductor (MIS) high electron mobility transistors (HEMTs). When stressed under high applied electric fields, the traps at the dielectric/III-N barrier interface and inside the III-N barrier cause an increase in dynamic on-resistance and a shift of threshold voltage, which might affect the long term stability of these devices. More detailed investigations are needed to identify epitaxy- or process-related degradation mechanisms and to understand their impact on electrical properties. The present paper proposes a suitable methodology to characterize the degradation and failure mechanisms of GaN MIS-HEMTs subjected to stress under various off-state conditions. There are three major stress conditions that include: VDS = 0 V, off, and off (cascode-connection) states. Changes of direct current (DC) figures of merit in voltage step-stress experiments are measured, statistics are studied, and correlations are investigated. Hot electron stress produces permanent change which can be attributed to charge trapping phenomena and the generation of deep levels or interface states. The simultaneous generation of interface (and/or bulk) and buffer traps can account for the observed degradation modes and mechanisms. These findings provide several critical characteristics to evaluate the electrical reliability of GaN MIS-HEMTs which are borne out by step-stress experiments. DC stress degradation GaN HEMT GaN MIS-HEMT reliability failure mechanisms trapping Technology T Szu-Hao Chen verfasserin aut Ting-En Hsieh verfasserin aut Stone Cheng verfasserin aut Jesús A. del Alamo verfasserin aut Edward Yi Chang verfasserin aut In Energies MDPI AG, 2008 10(2017), 2, p 233 (DE-627)572083742 (DE-600)2437446-5 19961073 nnns volume:10 year:2017 number:2, p 233 https://doi.org/10.3390/en10020233 kostenfrei https://doaj.org/article/0b0c19042a9747bc935c01e643f601c1 kostenfrei http://www.mdpi.com/1996-1073/10/2/233 kostenfrei https://doaj.org/toc/1996-1073 Journal toc kostenfrei GBV_USEFLAG_A SYSFLAG_A GBV_DOAJ GBV_ILN_20 GBV_ILN_22 GBV_ILN_23 GBV_ILN_24 GBV_ILN_39 GBV_ILN_40 GBV_ILN_60 GBV_ILN_62 GBV_ILN_63 GBV_ILN_65 GBV_ILN_69 GBV_ILN_70 GBV_ILN_73 GBV_ILN_95 GBV_ILN_105 GBV_ILN_110 GBV_ILN_151 GBV_ILN_161 GBV_ILN_170 GBV_ILN_206 GBV_ILN_213 GBV_ILN_230 GBV_ILN_285 GBV_ILN_293 GBV_ILN_370 GBV_ILN_602 GBV_ILN_2005 GBV_ILN_2009 GBV_ILN_2011 GBV_ILN_2014 GBV_ILN_2055 GBV_ILN_2108 GBV_ILN_2111 GBV_ILN_2119 GBV_ILN_4012 GBV_ILN_4037 GBV_ILN_4112 GBV_ILN_4125 GBV_ILN_4126 GBV_ILN_4249 GBV_ILN_4305 GBV_ILN_4306 GBV_ILN_4307 GBV_ILN_4313 GBV_ILN_4322 GBV_ILN_4323 GBV_ILN_4324 GBV_ILN_4325 GBV_ILN_4335 GBV_ILN_4338 GBV_ILN_4367 GBV_ILN_4700 AR 10 2017 2, p 233
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allfieldsGer	10.3390/en10020233 doi (DE-627)DOAJ032718349 (DE-599)DOAJ0b0c19042a9747bc935c01e643f601c1 DE-627 ger DE-627 rakwb eng Po-Chien Chou verfasserin aut Evaluation and Reliability Assessment of GaN-on-Si MIS-HEMT for Power Switching Applications 2017 Text txt rdacontent Computermedien c rdamedia Online-Ressource cr rdacarrier This paper reports an extensive analysis of the physical mechanisms responsible for the failure of GaN-based metal–insulator–semiconductor (MIS) high electron mobility transistors (HEMTs). When stressed under high applied electric fields, the traps at the dielectric/III-N barrier interface and inside the III-N barrier cause an increase in dynamic on-resistance and a shift of threshold voltage, which might affect the long term stability of these devices. More detailed investigations are needed to identify epitaxy- or process-related degradation mechanisms and to understand their impact on electrical properties. The present paper proposes a suitable methodology to characterize the degradation and failure mechanisms of GaN MIS-HEMTs subjected to stress under various off-state conditions. There are three major stress conditions that include: VDS = 0 V, off, and off (cascode-connection) states. Changes of direct current (DC) figures of merit in voltage step-stress experiments are measured, statistics are studied, and correlations are investigated. Hot electron stress produces permanent change which can be attributed to charge trapping phenomena and the generation of deep levels or interface states. The simultaneous generation of interface (and/or bulk) and buffer traps can account for the observed degradation modes and mechanisms. These findings provide several critical characteristics to evaluate the electrical reliability of GaN MIS-HEMTs which are borne out by step-stress experiments. DC stress degradation GaN HEMT GaN MIS-HEMT reliability failure mechanisms trapping Technology T Szu-Hao Chen verfasserin aut Ting-En Hsieh verfasserin aut Stone Cheng verfasserin aut Jesús A. del Alamo verfasserin aut Edward Yi Chang verfasserin aut In Energies MDPI AG, 2008 10(2017), 2, p 233 (DE-627)572083742 (DE-600)2437446-5 19961073 nnns volume:10 year:2017 number:2, p 233 https://doi.org/10.3390/en10020233 kostenfrei https://doaj.org/article/0b0c19042a9747bc935c01e643f601c1 kostenfrei http://www.mdpi.com/1996-1073/10/2/233 kostenfrei https://doaj.org/toc/1996-1073 Journal toc kostenfrei GBV_USEFLAG_A SYSFLAG_A GBV_DOAJ GBV_ILN_20 GBV_ILN_22 GBV_ILN_23 GBV_ILN_24 GBV_ILN_39 GBV_ILN_40 GBV_ILN_60 GBV_ILN_62 GBV_ILN_63 GBV_ILN_65 GBV_ILN_69 GBV_ILN_70 GBV_ILN_73 GBV_ILN_95 GBV_ILN_105 GBV_ILN_110 GBV_ILN_151 GBV_ILN_161 GBV_ILN_170 GBV_ILN_206 GBV_ILN_213 GBV_ILN_230 GBV_ILN_285 GBV_ILN_293 GBV_ILN_370 GBV_ILN_602 GBV_ILN_2005 GBV_ILN_2009 GBV_ILN_2011 GBV_ILN_2014 GBV_ILN_2055 GBV_ILN_2108 GBV_ILN_2111 GBV_ILN_2119 GBV_ILN_4012 GBV_ILN_4037 GBV_ILN_4112 GBV_ILN_4125 GBV_ILN_4126 GBV_ILN_4249 GBV_ILN_4305 GBV_ILN_4306 GBV_ILN_4307 GBV_ILN_4313 GBV_ILN_4322 GBV_ILN_4323 GBV_ILN_4324 GBV_ILN_4325 GBV_ILN_4335 GBV_ILN_4338 GBV_ILN_4367 GBV_ILN_4700 AR 10 2017 2, p 233
allfieldsSound	10.3390/en10020233 doi (DE-627)DOAJ032718349 (DE-599)DOAJ0b0c19042a9747bc935c01e643f601c1 DE-627 ger DE-627 rakwb eng Po-Chien Chou verfasserin aut Evaluation and Reliability Assessment of GaN-on-Si MIS-HEMT for Power Switching Applications 2017 Text txt rdacontent Computermedien c rdamedia Online-Ressource cr rdacarrier This paper reports an extensive analysis of the physical mechanisms responsible for the failure of GaN-based metal–insulator–semiconductor (MIS) high electron mobility transistors (HEMTs). When stressed under high applied electric fields, the traps at the dielectric/III-N barrier interface and inside the III-N barrier cause an increase in dynamic on-resistance and a shift of threshold voltage, which might affect the long term stability of these devices. More detailed investigations are needed to identify epitaxy- or process-related degradation mechanisms and to understand their impact on electrical properties. The present paper proposes a suitable methodology to characterize the degradation and failure mechanisms of GaN MIS-HEMTs subjected to stress under various off-state conditions. There are three major stress conditions that include: VDS = 0 V, off, and off (cascode-connection) states. Changes of direct current (DC) figures of merit in voltage step-stress experiments are measured, statistics are studied, and correlations are investigated. Hot electron stress produces permanent change which can be attributed to charge trapping phenomena and the generation of deep levels or interface states. The simultaneous generation of interface (and/or bulk) and buffer traps can account for the observed degradation modes and mechanisms. These findings provide several critical characteristics to evaluate the electrical reliability of GaN MIS-HEMTs which are borne out by step-stress experiments. DC stress degradation GaN HEMT GaN MIS-HEMT reliability failure mechanisms trapping Technology T Szu-Hao Chen verfasserin aut Ting-En Hsieh verfasserin aut Stone Cheng verfasserin aut Jesús A. del Alamo verfasserin aut Edward Yi Chang verfasserin aut In Energies MDPI AG, 2008 10(2017), 2, p 233 (DE-627)572083742 (DE-600)2437446-5 19961073 nnns volume:10 year:2017 number:2, p 233 https://doi.org/10.3390/en10020233 kostenfrei https://doaj.org/article/0b0c19042a9747bc935c01e643f601c1 kostenfrei http://www.mdpi.com/1996-1073/10/2/233 kostenfrei https://doaj.org/toc/1996-1073 Journal toc kostenfrei GBV_USEFLAG_A SYSFLAG_A GBV_DOAJ GBV_ILN_20 GBV_ILN_22 GBV_ILN_23 GBV_ILN_24 GBV_ILN_39 GBV_ILN_40 GBV_ILN_60 GBV_ILN_62 GBV_ILN_63 GBV_ILN_65 GBV_ILN_69 GBV_ILN_70 GBV_ILN_73 GBV_ILN_95 GBV_ILN_105 GBV_ILN_110 GBV_ILN_151 GBV_ILN_161 GBV_ILN_170 GBV_ILN_206 GBV_ILN_213 GBV_ILN_230 GBV_ILN_285 GBV_ILN_293 GBV_ILN_370 GBV_ILN_602 GBV_ILN_2005 GBV_ILN_2009 GBV_ILN_2011 GBV_ILN_2014 GBV_ILN_2055 GBV_ILN_2108 GBV_ILN_2111 GBV_ILN_2119 GBV_ILN_4012 GBV_ILN_4037 GBV_ILN_4112 GBV_ILN_4125 GBV_ILN_4126 GBV_ILN_4249 GBV_ILN_4305 GBV_ILN_4306 GBV_ILN_4307 GBV_ILN_4313 GBV_ILN_4322 GBV_ILN_4323 GBV_ILN_4324 GBV_ILN_4325 GBV_ILN_4335 GBV_ILN_4338 GBV_ILN_4367 GBV_ILN_4700 AR 10 2017 2, p 233
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author	Po-Chien Chou
spellingShingle	Po-Chien Chou misc DC stress misc degradation misc GaN HEMT misc GaN MIS-HEMT misc reliability misc failure mechanisms misc trapping misc Technology misc T Evaluation and Reliability Assessment of GaN-on-Si MIS-HEMT for Power Switching Applications
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topic_title	Evaluation and Reliability Assessment of GaN-on-Si MIS-HEMT for Power Switching Applications DC stress degradation GaN HEMT GaN MIS-HEMT reliability failure mechanisms trapping
topic	misc DC stress misc degradation misc GaN HEMT misc GaN MIS-HEMT misc reliability misc failure mechanisms misc trapping misc Technology misc T
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title	Evaluation and Reliability Assessment of GaN-on-Si MIS-HEMT for Power Switching Applications
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title_sort	evaluation and reliability assessment of gan-on-si mis-hemt for power switching applications
title_auth	Evaluation and Reliability Assessment of GaN-on-Si MIS-HEMT for Power Switching Applications
abstract	This paper reports an extensive analysis of the physical mechanisms responsible for the failure of GaN-based metal–insulator–semiconductor (MIS) high electron mobility transistors (HEMTs). When stressed under high applied electric fields, the traps at the dielectric/III-N barrier interface and inside the III-N barrier cause an increase in dynamic on-resistance and a shift of threshold voltage, which might affect the long term stability of these devices. More detailed investigations are needed to identify epitaxy- or process-related degradation mechanisms and to understand their impact on electrical properties. The present paper proposes a suitable methodology to characterize the degradation and failure mechanisms of GaN MIS-HEMTs subjected to stress under various off-state conditions. There are three major stress conditions that include: VDS = 0 V, off, and off (cascode-connection) states. Changes of direct current (DC) figures of merit in voltage step-stress experiments are measured, statistics are studied, and correlations are investigated. Hot electron stress produces permanent change which can be attributed to charge trapping phenomena and the generation of deep levels or interface states. The simultaneous generation of interface (and/or bulk) and buffer traps can account for the observed degradation modes and mechanisms. These findings provide several critical characteristics to evaluate the electrical reliability of GaN MIS-HEMTs which are borne out by step-stress experiments.
abstractGer	This paper reports an extensive analysis of the physical mechanisms responsible for the failure of GaN-based metal–insulator–semiconductor (MIS) high electron mobility transistors (HEMTs). When stressed under high applied electric fields, the traps at the dielectric/III-N barrier interface and inside the III-N barrier cause an increase in dynamic on-resistance and a shift of threshold voltage, which might affect the long term stability of these devices. More detailed investigations are needed to identify epitaxy- or process-related degradation mechanisms and to understand their impact on electrical properties. The present paper proposes a suitable methodology to characterize the degradation and failure mechanisms of GaN MIS-HEMTs subjected to stress under various off-state conditions. There are three major stress conditions that include: VDS = 0 V, off, and off (cascode-connection) states. Changes of direct current (DC) figures of merit in voltage step-stress experiments are measured, statistics are studied, and correlations are investigated. Hot electron stress produces permanent change which can be attributed to charge trapping phenomena and the generation of deep levels or interface states. The simultaneous generation of interface (and/or bulk) and buffer traps can account for the observed degradation modes and mechanisms. These findings provide several critical characteristics to evaluate the electrical reliability of GaN MIS-HEMTs which are borne out by step-stress experiments.
abstract_unstemmed	This paper reports an extensive analysis of the physical mechanisms responsible for the failure of GaN-based metal–insulator–semiconductor (MIS) high electron mobility transistors (HEMTs). When stressed under high applied electric fields, the traps at the dielectric/III-N barrier interface and inside the III-N barrier cause an increase in dynamic on-resistance and a shift of threshold voltage, which might affect the long term stability of these devices. More detailed investigations are needed to identify epitaxy- or process-related degradation mechanisms and to understand their impact on electrical properties. The present paper proposes a suitable methodology to characterize the degradation and failure mechanisms of GaN MIS-HEMTs subjected to stress under various off-state conditions. There are three major stress conditions that include: VDS = 0 V, off, and off (cascode-connection) states. Changes of direct current (DC) figures of merit in voltage step-stress experiments are measured, statistics are studied, and correlations are investigated. Hot electron stress produces permanent change which can be attributed to charge trapping phenomena and the generation of deep levels or interface states. The simultaneous generation of interface (and/or bulk) and buffer traps can account for the observed degradation modes and mechanisms. These findings provide several critical characteristics to evaluate the electrical reliability of GaN MIS-HEMTs which are borne out by step-stress experiments.
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title_short	Evaluation and Reliability Assessment of GaN-on-Si MIS-HEMT for Power Switching Applications
url	https://doi.org/10.3390/en10020233 https://doaj.org/article/0b0c19042a9747bc935c01e643f601c1 http://www.mdpi.com/1996-1073/10/2/233 https://doaj.org/toc/1996-1073
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author2	Szu-Hao Chen Ting-En Hsieh Stone Cheng Jesús A. del Alamo Edward Yi Chang
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up_date	2024-07-03T13:42:03.921Z
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