Frequency Compensation of Three-Stage OTAs to Achieve Very Wide Capacitive Load Range
This paper proposes an optimal design approach for three-stage amplifiers driving an ultra-wide range of load capacitor. To this end, efficient state-of-the-art solutions have been combined to develop a power-efficient frequency compensation solution. High-speed feedback pathways relying on Miller c...
Ausführliche Beschreibung
Autor*in: |
Hamed Aminzadeh [verfasserIn] Andrea Ballo [verfasserIn] Alfio Dario Grasso [verfasserIn] |
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Format: |
E-Artikel |
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Sprache: |
Englisch |
Erschienen: |
2022 |
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Übergeordnetes Werk: |
In: IEEE Access - IEEE, 2014, 10(2022), Seite 70675-70687 |
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Übergeordnetes Werk: |
volume:10 ; year:2022 ; pages:70675-70687 |
Links: |
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DOI / URN: |
10.1109/ACCESS.2022.3187169 |
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Katalog-ID: |
DOAJ039647633 |
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10.1109/ACCESS.2022.3187169 doi (DE-627)DOAJ039647633 (DE-599)DOAJ2bc6bd496cfb4708a30762717d2941c7 DE-627 ger DE-627 rakwb eng TK1-9971 Hamed Aminzadeh verfasserin aut Frequency Compensation of Three-Stage OTAs to Achieve Very Wide Capacitive Load Range 2022 Text txt rdacontent Computermedien c rdamedia Online-Ressource cr rdacarrier This paper proposes an optimal design approach for three-stage amplifiers driving an ultra-wide range of load capacitor. To this end, efficient state-of-the-art solutions have been combined to develop a power-efficient frequency compensation solution. High-speed feedback pathways relying on Miller capacitors and current buffers are implemented within the amplifier scheme to push the non-dominant poles to high frequencies for small to medium load capacitors. A small resistor is also shared between the two pathways to improve the stability regardless of the load capacitor. A serial <inline-formula< <tex-math notation="LaTeX"<$R$ </tex-math<</inline-formula<-<inline-formula< <tex-math notation="LaTeX"<$C$ </tex-math<</inline-formula< branch is then added to extend the lower limit of load drive capability to small load capacitors. Gain margin is, for the first time in literature, analytically evaluated and included in the design phase. A prototype of the proposed amplifier is fabricated in 65-nm CMOS process with active area of 0.0017 mm<sup<2</sup< and 1.15 pF total compensation capacitance. It can drive the load capacitor range from 200 pF to 100 nF, while drawing a quiescent current of <inline-formula< <tex-math notation="LaTeX"<$7.4~ \mu \text{A}$ </tex-math<</inline-formula< from a 1.2-V input voltage supply. A unity-gain frequency of 1.67 MHz was measured with an average slew-rate of 1.31 V/<inline-formula< <tex-math notation="LaTeX"<$\mu \text{s}$ </tex-math<</inline-formula<, when the proposed amplifier is wired in unity-gain configuration to drive a 500-pF load capacitor. Amplifier frequency compensation local impedance attenuation Miller compensation quality factor stability Electrical engineering. Electronics. Nuclear engineering Andrea Ballo verfasserin aut Alfio Dario Grasso verfasserin aut In IEEE Access IEEE, 2014 10(2022), Seite 70675-70687 (DE-627)728440385 (DE-600)2687964-5 21693536 nnns volume:10 year:2022 pages:70675-70687 https://doi.org/10.1109/ACCESS.2022.3187169 kostenfrei https://doaj.org/article/2bc6bd496cfb4708a30762717d2941c7 kostenfrei https://ieeexplore.ieee.org/document/9810245/ kostenfrei https://doaj.org/toc/2169-3536 Journal toc kostenfrei GBV_USEFLAG_A SYSFLAG_A GBV_DOAJ GBV_ILN_11 GBV_ILN_20 GBV_ILN_22 GBV_ILN_23 GBV_ILN_24 GBV_ILN_31 GBV_ILN_39 GBV_ILN_40 GBV_ILN_60 GBV_ILN_62 GBV_ILN_63 GBV_ILN_65 GBV_ILN_69 GBV_ILN_70 GBV_ILN_73 GBV_ILN_95 GBV_ILN_105 GBV_ILN_110 GBV_ILN_151 GBV_ILN_161 GBV_ILN_170 GBV_ILN_213 GBV_ILN_230 GBV_ILN_285 GBV_ILN_293 GBV_ILN_370 GBV_ILN_602 GBV_ILN_2014 GBV_ILN_4012 GBV_ILN_4037 GBV_ILN_4112 GBV_ILN_4125 GBV_ILN_4126 GBV_ILN_4249 GBV_ILN_4305 GBV_ILN_4306 GBV_ILN_4307 GBV_ILN_4313 GBV_ILN_4322 GBV_ILN_4323 GBV_ILN_4324 GBV_ILN_4325 GBV_ILN_4335 GBV_ILN_4338 GBV_ILN_4367 GBV_ILN_4700 AR 10 2022 70675-70687 |
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10.1109/ACCESS.2022.3187169 doi (DE-627)DOAJ039647633 (DE-599)DOAJ2bc6bd496cfb4708a30762717d2941c7 DE-627 ger DE-627 rakwb eng TK1-9971 Hamed Aminzadeh verfasserin aut Frequency Compensation of Three-Stage OTAs to Achieve Very Wide Capacitive Load Range 2022 Text txt rdacontent Computermedien c rdamedia Online-Ressource cr rdacarrier This paper proposes an optimal design approach for three-stage amplifiers driving an ultra-wide range of load capacitor. To this end, efficient state-of-the-art solutions have been combined to develop a power-efficient frequency compensation solution. High-speed feedback pathways relying on Miller capacitors and current buffers are implemented within the amplifier scheme to push the non-dominant poles to high frequencies for small to medium load capacitors. A small resistor is also shared between the two pathways to improve the stability regardless of the load capacitor. A serial <inline-formula< <tex-math notation="LaTeX"<$R$ </tex-math<</inline-formula<-<inline-formula< <tex-math notation="LaTeX"<$C$ </tex-math<</inline-formula< branch is then added to extend the lower limit of load drive capability to small load capacitors. Gain margin is, for the first time in literature, analytically evaluated and included in the design phase. A prototype of the proposed amplifier is fabricated in 65-nm CMOS process with active area of 0.0017 mm<sup<2</sup< and 1.15 pF total compensation capacitance. It can drive the load capacitor range from 200 pF to 100 nF, while drawing a quiescent current of <inline-formula< <tex-math notation="LaTeX"<$7.4~ \mu \text{A}$ </tex-math<</inline-formula< from a 1.2-V input voltage supply. A unity-gain frequency of 1.67 MHz was measured with an average slew-rate of 1.31 V/<inline-formula< <tex-math notation="LaTeX"<$\mu \text{s}$ </tex-math<</inline-formula<, when the proposed amplifier is wired in unity-gain configuration to drive a 500-pF load capacitor. Amplifier frequency compensation local impedance attenuation Miller compensation quality factor stability Electrical engineering. Electronics. Nuclear engineering Andrea Ballo verfasserin aut Alfio Dario Grasso verfasserin aut In IEEE Access IEEE, 2014 10(2022), Seite 70675-70687 (DE-627)728440385 (DE-600)2687964-5 21693536 nnns volume:10 year:2022 pages:70675-70687 https://doi.org/10.1109/ACCESS.2022.3187169 kostenfrei https://doaj.org/article/2bc6bd496cfb4708a30762717d2941c7 kostenfrei https://ieeexplore.ieee.org/document/9810245/ kostenfrei https://doaj.org/toc/2169-3536 Journal toc kostenfrei GBV_USEFLAG_A SYSFLAG_A GBV_DOAJ GBV_ILN_11 GBV_ILN_20 GBV_ILN_22 GBV_ILN_23 GBV_ILN_24 GBV_ILN_31 GBV_ILN_39 GBV_ILN_40 GBV_ILN_60 GBV_ILN_62 GBV_ILN_63 GBV_ILN_65 GBV_ILN_69 GBV_ILN_70 GBV_ILN_73 GBV_ILN_95 GBV_ILN_105 GBV_ILN_110 GBV_ILN_151 GBV_ILN_161 GBV_ILN_170 GBV_ILN_213 GBV_ILN_230 GBV_ILN_285 GBV_ILN_293 GBV_ILN_370 GBV_ILN_602 GBV_ILN_2014 GBV_ILN_4012 GBV_ILN_4037 GBV_ILN_4112 GBV_ILN_4125 GBV_ILN_4126 GBV_ILN_4249 GBV_ILN_4305 GBV_ILN_4306 GBV_ILN_4307 GBV_ILN_4313 GBV_ILN_4322 GBV_ILN_4323 GBV_ILN_4324 GBV_ILN_4325 GBV_ILN_4335 GBV_ILN_4338 GBV_ILN_4367 GBV_ILN_4700 AR 10 2022 70675-70687 |
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10.1109/ACCESS.2022.3187169 doi (DE-627)DOAJ039647633 (DE-599)DOAJ2bc6bd496cfb4708a30762717d2941c7 DE-627 ger DE-627 rakwb eng TK1-9971 Hamed Aminzadeh verfasserin aut Frequency Compensation of Three-Stage OTAs to Achieve Very Wide Capacitive Load Range 2022 Text txt rdacontent Computermedien c rdamedia Online-Ressource cr rdacarrier This paper proposes an optimal design approach for three-stage amplifiers driving an ultra-wide range of load capacitor. To this end, efficient state-of-the-art solutions have been combined to develop a power-efficient frequency compensation solution. High-speed feedback pathways relying on Miller capacitors and current buffers are implemented within the amplifier scheme to push the non-dominant poles to high frequencies for small to medium load capacitors. A small resistor is also shared between the two pathways to improve the stability regardless of the load capacitor. A serial <inline-formula< <tex-math notation="LaTeX"<$R$ </tex-math<</inline-formula<-<inline-formula< <tex-math notation="LaTeX"<$C$ </tex-math<</inline-formula< branch is then added to extend the lower limit of load drive capability to small load capacitors. Gain margin is, for the first time in literature, analytically evaluated and included in the design phase. A prototype of the proposed amplifier is fabricated in 65-nm CMOS process with active area of 0.0017 mm<sup<2</sup< and 1.15 pF total compensation capacitance. It can drive the load capacitor range from 200 pF to 100 nF, while drawing a quiescent current of <inline-formula< <tex-math notation="LaTeX"<$7.4~ \mu \text{A}$ </tex-math<</inline-formula< from a 1.2-V input voltage supply. A unity-gain frequency of 1.67 MHz was measured with an average slew-rate of 1.31 V/<inline-formula< <tex-math notation="LaTeX"<$\mu \text{s}$ </tex-math<</inline-formula<, when the proposed amplifier is wired in unity-gain configuration to drive a 500-pF load capacitor. Amplifier frequency compensation local impedance attenuation Miller compensation quality factor stability Electrical engineering. Electronics. Nuclear engineering Andrea Ballo verfasserin aut Alfio Dario Grasso verfasserin aut In IEEE Access IEEE, 2014 10(2022), Seite 70675-70687 (DE-627)728440385 (DE-600)2687964-5 21693536 nnns volume:10 year:2022 pages:70675-70687 https://doi.org/10.1109/ACCESS.2022.3187169 kostenfrei https://doaj.org/article/2bc6bd496cfb4708a30762717d2941c7 kostenfrei https://ieeexplore.ieee.org/document/9810245/ kostenfrei https://doaj.org/toc/2169-3536 Journal toc kostenfrei GBV_USEFLAG_A SYSFLAG_A GBV_DOAJ GBV_ILN_11 GBV_ILN_20 GBV_ILN_22 GBV_ILN_23 GBV_ILN_24 GBV_ILN_31 GBV_ILN_39 GBV_ILN_40 GBV_ILN_60 GBV_ILN_62 GBV_ILN_63 GBV_ILN_65 GBV_ILN_69 GBV_ILN_70 GBV_ILN_73 GBV_ILN_95 GBV_ILN_105 GBV_ILN_110 GBV_ILN_151 GBV_ILN_161 GBV_ILN_170 GBV_ILN_213 GBV_ILN_230 GBV_ILN_285 GBV_ILN_293 GBV_ILN_370 GBV_ILN_602 GBV_ILN_2014 GBV_ILN_4012 GBV_ILN_4037 GBV_ILN_4112 GBV_ILN_4125 GBV_ILN_4126 GBV_ILN_4249 GBV_ILN_4305 GBV_ILN_4306 GBV_ILN_4307 GBV_ILN_4313 GBV_ILN_4322 GBV_ILN_4323 GBV_ILN_4324 GBV_ILN_4325 GBV_ILN_4335 GBV_ILN_4338 GBV_ILN_4367 GBV_ILN_4700 AR 10 2022 70675-70687 |
allfieldsGer |
10.1109/ACCESS.2022.3187169 doi (DE-627)DOAJ039647633 (DE-599)DOAJ2bc6bd496cfb4708a30762717d2941c7 DE-627 ger DE-627 rakwb eng TK1-9971 Hamed Aminzadeh verfasserin aut Frequency Compensation of Three-Stage OTAs to Achieve Very Wide Capacitive Load Range 2022 Text txt rdacontent Computermedien c rdamedia Online-Ressource cr rdacarrier This paper proposes an optimal design approach for three-stage amplifiers driving an ultra-wide range of load capacitor. To this end, efficient state-of-the-art solutions have been combined to develop a power-efficient frequency compensation solution. High-speed feedback pathways relying on Miller capacitors and current buffers are implemented within the amplifier scheme to push the non-dominant poles to high frequencies for small to medium load capacitors. A small resistor is also shared between the two pathways to improve the stability regardless of the load capacitor. A serial <inline-formula< <tex-math notation="LaTeX"<$R$ </tex-math<</inline-formula<-<inline-formula< <tex-math notation="LaTeX"<$C$ </tex-math<</inline-formula< branch is then added to extend the lower limit of load drive capability to small load capacitors. Gain margin is, for the first time in literature, analytically evaluated and included in the design phase. A prototype of the proposed amplifier is fabricated in 65-nm CMOS process with active area of 0.0017 mm<sup<2</sup< and 1.15 pF total compensation capacitance. It can drive the load capacitor range from 200 pF to 100 nF, while drawing a quiescent current of <inline-formula< <tex-math notation="LaTeX"<$7.4~ \mu \text{A}$ </tex-math<</inline-formula< from a 1.2-V input voltage supply. A unity-gain frequency of 1.67 MHz was measured with an average slew-rate of 1.31 V/<inline-formula< <tex-math notation="LaTeX"<$\mu \text{s}$ </tex-math<</inline-formula<, when the proposed amplifier is wired in unity-gain configuration to drive a 500-pF load capacitor. Amplifier frequency compensation local impedance attenuation Miller compensation quality factor stability Electrical engineering. Electronics. Nuclear engineering Andrea Ballo verfasserin aut Alfio Dario Grasso verfasserin aut In IEEE Access IEEE, 2014 10(2022), Seite 70675-70687 (DE-627)728440385 (DE-600)2687964-5 21693536 nnns volume:10 year:2022 pages:70675-70687 https://doi.org/10.1109/ACCESS.2022.3187169 kostenfrei https://doaj.org/article/2bc6bd496cfb4708a30762717d2941c7 kostenfrei https://ieeexplore.ieee.org/document/9810245/ kostenfrei https://doaj.org/toc/2169-3536 Journal toc kostenfrei GBV_USEFLAG_A SYSFLAG_A GBV_DOAJ GBV_ILN_11 GBV_ILN_20 GBV_ILN_22 GBV_ILN_23 GBV_ILN_24 GBV_ILN_31 GBV_ILN_39 GBV_ILN_40 GBV_ILN_60 GBV_ILN_62 GBV_ILN_63 GBV_ILN_65 GBV_ILN_69 GBV_ILN_70 GBV_ILN_73 GBV_ILN_95 GBV_ILN_105 GBV_ILN_110 GBV_ILN_151 GBV_ILN_161 GBV_ILN_170 GBV_ILN_213 GBV_ILN_230 GBV_ILN_285 GBV_ILN_293 GBV_ILN_370 GBV_ILN_602 GBV_ILN_2014 GBV_ILN_4012 GBV_ILN_4037 GBV_ILN_4112 GBV_ILN_4125 GBV_ILN_4126 GBV_ILN_4249 GBV_ILN_4305 GBV_ILN_4306 GBV_ILN_4307 GBV_ILN_4313 GBV_ILN_4322 GBV_ILN_4323 GBV_ILN_4324 GBV_ILN_4325 GBV_ILN_4335 GBV_ILN_4338 GBV_ILN_4367 GBV_ILN_4700 AR 10 2022 70675-70687 |
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10.1109/ACCESS.2022.3187169 doi (DE-627)DOAJ039647633 (DE-599)DOAJ2bc6bd496cfb4708a30762717d2941c7 DE-627 ger DE-627 rakwb eng TK1-9971 Hamed Aminzadeh verfasserin aut Frequency Compensation of Three-Stage OTAs to Achieve Very Wide Capacitive Load Range 2022 Text txt rdacontent Computermedien c rdamedia Online-Ressource cr rdacarrier This paper proposes an optimal design approach for three-stage amplifiers driving an ultra-wide range of load capacitor. To this end, efficient state-of-the-art solutions have been combined to develop a power-efficient frequency compensation solution. High-speed feedback pathways relying on Miller capacitors and current buffers are implemented within the amplifier scheme to push the non-dominant poles to high frequencies for small to medium load capacitors. A small resistor is also shared between the two pathways to improve the stability regardless of the load capacitor. A serial <inline-formula< <tex-math notation="LaTeX"<$R$ </tex-math<</inline-formula<-<inline-formula< <tex-math notation="LaTeX"<$C$ </tex-math<</inline-formula< branch is then added to extend the lower limit of load drive capability to small load capacitors. Gain margin is, for the first time in literature, analytically evaluated and included in the design phase. A prototype of the proposed amplifier is fabricated in 65-nm CMOS process with active area of 0.0017 mm<sup<2</sup< and 1.15 pF total compensation capacitance. It can drive the load capacitor range from 200 pF to 100 nF, while drawing a quiescent current of <inline-formula< <tex-math notation="LaTeX"<$7.4~ \mu \text{A}$ </tex-math<</inline-formula< from a 1.2-V input voltage supply. A unity-gain frequency of 1.67 MHz was measured with an average slew-rate of 1.31 V/<inline-formula< <tex-math notation="LaTeX"<$\mu \text{s}$ </tex-math<</inline-formula<, when the proposed amplifier is wired in unity-gain configuration to drive a 500-pF load capacitor. Amplifier frequency compensation local impedance attenuation Miller compensation quality factor stability Electrical engineering. Electronics. Nuclear engineering Andrea Ballo verfasserin aut Alfio Dario Grasso verfasserin aut In IEEE Access IEEE, 2014 10(2022), Seite 70675-70687 (DE-627)728440385 (DE-600)2687964-5 21693536 nnns volume:10 year:2022 pages:70675-70687 https://doi.org/10.1109/ACCESS.2022.3187169 kostenfrei https://doaj.org/article/2bc6bd496cfb4708a30762717d2941c7 kostenfrei https://ieeexplore.ieee.org/document/9810245/ kostenfrei https://doaj.org/toc/2169-3536 Journal toc kostenfrei GBV_USEFLAG_A SYSFLAG_A GBV_DOAJ GBV_ILN_11 GBV_ILN_20 GBV_ILN_22 GBV_ILN_23 GBV_ILN_24 GBV_ILN_31 GBV_ILN_39 GBV_ILN_40 GBV_ILN_60 GBV_ILN_62 GBV_ILN_63 GBV_ILN_65 GBV_ILN_69 GBV_ILN_70 GBV_ILN_73 GBV_ILN_95 GBV_ILN_105 GBV_ILN_110 GBV_ILN_151 GBV_ILN_161 GBV_ILN_170 GBV_ILN_213 GBV_ILN_230 GBV_ILN_285 GBV_ILN_293 GBV_ILN_370 GBV_ILN_602 GBV_ILN_2014 GBV_ILN_4012 GBV_ILN_4037 GBV_ILN_4112 GBV_ILN_4125 GBV_ILN_4126 GBV_ILN_4249 GBV_ILN_4305 GBV_ILN_4306 GBV_ILN_4307 GBV_ILN_4313 GBV_ILN_4322 GBV_ILN_4323 GBV_ILN_4324 GBV_ILN_4325 GBV_ILN_4335 GBV_ILN_4338 GBV_ILN_4367 GBV_ILN_4700 AR 10 2022 70675-70687 |
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TK1-9971 Frequency Compensation of Three-Stage OTAs to Achieve Very Wide Capacitive Load Range Amplifier frequency compensation local impedance attenuation Miller compensation quality factor stability |
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Frequency Compensation of Three-Stage OTAs to Achieve Very Wide Capacitive Load Range |
abstract |
This paper proposes an optimal design approach for three-stage amplifiers driving an ultra-wide range of load capacitor. To this end, efficient state-of-the-art solutions have been combined to develop a power-efficient frequency compensation solution. High-speed feedback pathways relying on Miller capacitors and current buffers are implemented within the amplifier scheme to push the non-dominant poles to high frequencies for small to medium load capacitors. A small resistor is also shared between the two pathways to improve the stability regardless of the load capacitor. A serial <inline-formula< <tex-math notation="LaTeX"<$R$ </tex-math<</inline-formula<-<inline-formula< <tex-math notation="LaTeX"<$C$ </tex-math<</inline-formula< branch is then added to extend the lower limit of load drive capability to small load capacitors. Gain margin is, for the first time in literature, analytically evaluated and included in the design phase. A prototype of the proposed amplifier is fabricated in 65-nm CMOS process with active area of 0.0017 mm<sup<2</sup< and 1.15 pF total compensation capacitance. It can drive the load capacitor range from 200 pF to 100 nF, while drawing a quiescent current of <inline-formula< <tex-math notation="LaTeX"<$7.4~ \mu \text{A}$ </tex-math<</inline-formula< from a 1.2-V input voltage supply. A unity-gain frequency of 1.67 MHz was measured with an average slew-rate of 1.31 V/<inline-formula< <tex-math notation="LaTeX"<$\mu \text{s}$ </tex-math<</inline-formula<, when the proposed amplifier is wired in unity-gain configuration to drive a 500-pF load capacitor. |
abstractGer |
This paper proposes an optimal design approach for three-stage amplifiers driving an ultra-wide range of load capacitor. To this end, efficient state-of-the-art solutions have been combined to develop a power-efficient frequency compensation solution. High-speed feedback pathways relying on Miller capacitors and current buffers are implemented within the amplifier scheme to push the non-dominant poles to high frequencies for small to medium load capacitors. A small resistor is also shared between the two pathways to improve the stability regardless of the load capacitor. A serial <inline-formula< <tex-math notation="LaTeX"<$R$ </tex-math<</inline-formula<-<inline-formula< <tex-math notation="LaTeX"<$C$ </tex-math<</inline-formula< branch is then added to extend the lower limit of load drive capability to small load capacitors. Gain margin is, for the first time in literature, analytically evaluated and included in the design phase. A prototype of the proposed amplifier is fabricated in 65-nm CMOS process with active area of 0.0017 mm<sup<2</sup< and 1.15 pF total compensation capacitance. It can drive the load capacitor range from 200 pF to 100 nF, while drawing a quiescent current of <inline-formula< <tex-math notation="LaTeX"<$7.4~ \mu \text{A}$ </tex-math<</inline-formula< from a 1.2-V input voltage supply. A unity-gain frequency of 1.67 MHz was measured with an average slew-rate of 1.31 V/<inline-formula< <tex-math notation="LaTeX"<$\mu \text{s}$ </tex-math<</inline-formula<, when the proposed amplifier is wired in unity-gain configuration to drive a 500-pF load capacitor. |
abstract_unstemmed |
This paper proposes an optimal design approach for three-stage amplifiers driving an ultra-wide range of load capacitor. To this end, efficient state-of-the-art solutions have been combined to develop a power-efficient frequency compensation solution. High-speed feedback pathways relying on Miller capacitors and current buffers are implemented within the amplifier scheme to push the non-dominant poles to high frequencies for small to medium load capacitors. A small resistor is also shared between the two pathways to improve the stability regardless of the load capacitor. A serial <inline-formula< <tex-math notation="LaTeX"<$R$ </tex-math<</inline-formula<-<inline-formula< <tex-math notation="LaTeX"<$C$ </tex-math<</inline-formula< branch is then added to extend the lower limit of load drive capability to small load capacitors. Gain margin is, for the first time in literature, analytically evaluated and included in the design phase. A prototype of the proposed amplifier is fabricated in 65-nm CMOS process with active area of 0.0017 mm<sup<2</sup< and 1.15 pF total compensation capacitance. It can drive the load capacitor range from 200 pF to 100 nF, while drawing a quiescent current of <inline-formula< <tex-math notation="LaTeX"<$7.4~ \mu \text{A}$ </tex-math<</inline-formula< from a 1.2-V input voltage supply. A unity-gain frequency of 1.67 MHz was measured with an average slew-rate of 1.31 V/<inline-formula< <tex-math notation="LaTeX"<$\mu \text{s}$ </tex-math<</inline-formula<, when the proposed amplifier is wired in unity-gain configuration to drive a 500-pF load capacitor. |
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Frequency Compensation of Three-Stage OTAs to Achieve Very Wide Capacitive Load Range |
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https://doi.org/10.1109/ACCESS.2022.3187169 https://doaj.org/article/2bc6bd496cfb4708a30762717d2941c7 https://ieeexplore.ieee.org/document/9810245/ https://doaj.org/toc/2169-3536 |
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