A Scalable and Low Stress Post-CMOS Processing Technique for Implantable Microsensors

Implantable active electronic microchips are being developed as multinode in-body sensors and actuators. There is a need to develop high throughput microfabrication techniques applicable to complementary metal–oxide–semiconductor (CMOS)-based silicon electronics in order to process bare dies from a...
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Gespeichert in:

Autor*in:	Ah-Hyoung Lee [verfasserIn] Jihun Lee [verfasserIn] Farah Laiwalla [verfasserIn] Vincent Leung [verfasserIn] Jiannan Huang [verfasserIn] Arto Nurmikko [verfasserIn] Yoon-Kyu Song [verfasserIn]

Format:	E-Artikel
Sprache:	Englisch

Erschienen:	2020

Schlagwörter:	complementary metal–oxide–semiconductor (CMOS) post-processing polydimethylsiloxane (PDMS)-assisted planarization on-chip electrode scalable chip integration technique BMI (brain–machine interfaces) wireless

Übergeordnetes Werk:	In: Micromachines - MDPI AG, 2010, 11(2020), 10, p 925
Übergeordnetes Werk:	volume:11 ; year:2020 ; number:10, p 925

Links:	Link aufrufen Link aufrufen Link aufrufen Journal toc

DOI / URN:	10.3390/mi11100925

Katalog-ID:	DOAJ06819580X

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callnumber-first	T - Technology
author	Ah-Hyoung Lee
spellingShingle	Ah-Hyoung Lee misc TJ1-1570 misc complementary metal–oxide–semiconductor (CMOS) post-processing misc polydimethylsiloxane (PDMS)-assisted planarization misc on-chip electrode misc scalable chip integration technique misc BMI (brain–machine interfaces) misc wireless misc Mechanical engineering and machinery A Scalable and Low Stress Post-CMOS Processing Technique for Implantable Microsensors
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topic_title	TJ1-1570 A Scalable and Low Stress Post-CMOS Processing Technique for Implantable Microsensors complementary metal–oxide–semiconductor (CMOS) post-processing polydimethylsiloxane (PDMS)-assisted planarization on-chip electrode scalable chip integration technique BMI (brain–machine interfaces) wireless
topic	misc TJ1-1570 misc complementary metal–oxide–semiconductor (CMOS) post-processing misc polydimethylsiloxane (PDMS)-assisted planarization misc on-chip electrode misc scalable chip integration technique misc BMI (brain–machine interfaces) misc wireless misc Mechanical engineering and machinery
topic_unstemmed	misc TJ1-1570 misc complementary metal–oxide–semiconductor (CMOS) post-processing misc polydimethylsiloxane (PDMS)-assisted planarization misc on-chip electrode misc scalable chip integration technique misc BMI (brain–machine interfaces) misc wireless misc Mechanical engineering and machinery
topic_browse	misc TJ1-1570 misc complementary metal–oxide–semiconductor (CMOS) post-processing misc polydimethylsiloxane (PDMS)-assisted planarization misc on-chip electrode misc scalable chip integration technique misc BMI (brain–machine interfaces) misc wireless misc Mechanical engineering and machinery
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title	A Scalable and Low Stress Post-CMOS Processing Technique for Implantable Microsensors
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title_sort	scalable and low stress post-cmos processing technique for implantable microsensors
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title_auth	A Scalable and Low Stress Post-CMOS Processing Technique for Implantable Microsensors
abstract	Implantable active electronic microchips are being developed as multinode in-body sensors and actuators. There is a need to develop high throughput microfabrication techniques applicable to complementary metal–oxide–semiconductor (CMOS)-based silicon electronics in order to process bare dies from a foundry to physiologically compatible implant ensembles. Post-processing of a miniature CMOS chip by usual methods is challenging as the typically sub-mm size small dies are hard to handle and not readily compatible with the standard microfabrication, e.g., photolithography. Here, we present a soft material-based, low chemical and mechanical stress, scalable microchip post-CMOS processing method that enables photolithography and electron-beam deposition on hundreds of micrometers scale dies. The technique builds on the use of a polydimethylsiloxane (PDMS) carrier substrate, in which the CMOS chips were embedded and precisely aligned, thereby enabling batch post-processing without complication from additional micromachining or chip treatments. We have demonstrated our technique with 650 μm × 650 μm and 280 μm × 280 μm chips, designed for electrophysiological neural recording and microstimulation implants by monolithic integration of patterned gold and PEDOT:PSS electrodes on the chips and assessed their electrical properties. The functionality of the post-processed chips was verified in saline, and ex vivo experiments using wireless power and data link, to demonstrate the recording and stimulation performance of the microscale electrode interfaces.
abstractGer	Implantable active electronic microchips are being developed as multinode in-body sensors and actuators. There is a need to develop high throughput microfabrication techniques applicable to complementary metal–oxide–semiconductor (CMOS)-based silicon electronics in order to process bare dies from a foundry to physiologically compatible implant ensembles. Post-processing of a miniature CMOS chip by usual methods is challenging as the typically sub-mm size small dies are hard to handle and not readily compatible with the standard microfabrication, e.g., photolithography. Here, we present a soft material-based, low chemical and mechanical stress, scalable microchip post-CMOS processing method that enables photolithography and electron-beam deposition on hundreds of micrometers scale dies. The technique builds on the use of a polydimethylsiloxane (PDMS) carrier substrate, in which the CMOS chips were embedded and precisely aligned, thereby enabling batch post-processing without complication from additional micromachining or chip treatments. We have demonstrated our technique with 650 μm × 650 μm and 280 μm × 280 μm chips, designed for electrophysiological neural recording and microstimulation implants by monolithic integration of patterned gold and PEDOT:PSS electrodes on the chips and assessed their electrical properties. The functionality of the post-processed chips was verified in saline, and ex vivo experiments using wireless power and data link, to demonstrate the recording and stimulation performance of the microscale electrode interfaces.
abstract_unstemmed	Implantable active electronic microchips are being developed as multinode in-body sensors and actuators. There is a need to develop high throughput microfabrication techniques applicable to complementary metal–oxide–semiconductor (CMOS)-based silicon electronics in order to process bare dies from a foundry to physiologically compatible implant ensembles. Post-processing of a miniature CMOS chip by usual methods is challenging as the typically sub-mm size small dies are hard to handle and not readily compatible with the standard microfabrication, e.g., photolithography. Here, we present a soft material-based, low chemical and mechanical stress, scalable microchip post-CMOS processing method that enables photolithography and electron-beam deposition on hundreds of micrometers scale dies. The technique builds on the use of a polydimethylsiloxane (PDMS) carrier substrate, in which the CMOS chips were embedded and precisely aligned, thereby enabling batch post-processing without complication from additional micromachining or chip treatments. We have demonstrated our technique with 650 μm × 650 μm and 280 μm × 280 μm chips, designed for electrophysiological neural recording and microstimulation implants by monolithic integration of patterned gold and PEDOT:PSS electrodes on the chips and assessed their electrical properties. The functionality of the post-processed chips was verified in saline, and ex vivo experiments using wireless power and data link, to demonstrate the recording and stimulation performance of the microscale electrode interfaces.
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title_short	A Scalable and Low Stress Post-CMOS Processing Technique for Implantable Microsensors
url	https://doi.org/10.3390/mi11100925 https://doaj.org/article/7814b024b37c4861ab4f2fdbd6fa627d https://www.mdpi.com/2072-666X/11/10/925 https://doaj.org/toc/2072-666X
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author2	Jihun Lee Farah Laiwalla Vincent Leung Jiannan Huang Arto Nurmikko Yoon-Kyu Song
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up_date	2024-07-03T16:24:18.908Z
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A Scalable and Low Stress Post-CMOS Processing Technique for Implantable Microsensors

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