Device quantization policy in variation-aware in-memory computing design
Abstract Device quantization of in-memory computing (IMC) that considers the non-negligible variation and finite dynamic range of practical memory technology is investigated, aiming for quantitatively co-optimizing system performance on accuracy, power, and area. Architecture- and algorithm-level so...
Ausführliche Beschreibung
Autor*in: |
Chih-Cheng Chang [verfasserIn] Shao-Tzu Li [verfasserIn] Tong-Lin Pan [verfasserIn] Chia-Ming Tsai [verfasserIn] I-Ting Wang [verfasserIn] Tian-Sheuan Chang [verfasserIn] Tuo-Hung Hou [verfasserIn] |
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E-Artikel |
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Sprache: |
Englisch |
Erschienen: |
2022 |
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Übergeordnetes Werk: |
In: Scientific Reports - Nature Portfolio, 2011, 12(2022), 1, Seite 12 |
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Übergeordnetes Werk: |
volume:12 ; year:2022 ; number:1 ; pages:12 |
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DOI / URN: |
10.1038/s41598-021-04159-x |
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Katalog-ID: |
DOAJ074027816 |
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10.1038/s41598-021-04159-x doi (DE-627)DOAJ074027816 (DE-599)DOAJa6064b93688c4ae59eaa18df695442ef DE-627 ger DE-627 rakwb eng Chih-Cheng Chang verfasserin aut Device quantization policy in variation-aware in-memory computing design 2022 Text txt rdacontent Computermedien c rdamedia Online-Ressource cr rdacarrier Abstract Device quantization of in-memory computing (IMC) that considers the non-negligible variation and finite dynamic range of practical memory technology is investigated, aiming for quantitatively co-optimizing system performance on accuracy, power, and area. Architecture- and algorithm-level solutions are taken into consideration. Weight-separate mapping, VGG-like algorithm, multiple cells per weight, and fine-tuning of the classifier layer are effective for suppressing inference accuracy loss due to variation and allow for the lowest possible weight precision to improve area and energy efficiency. Higher priority should be given to developing low-conductance and low-variability memory devices that are essential for energy and area-efficiency IMC whereas low bit precision (< 3b) and memory window (< 10) are less concerned. Medicine R Science Q Shao-Tzu Li verfasserin aut Tong-Lin Pan verfasserin aut Chia-Ming Tsai verfasserin aut I-Ting Wang verfasserin aut Tian-Sheuan Chang verfasserin aut Tuo-Hung Hou verfasserin aut In Scientific Reports Nature Portfolio, 2011 12(2022), 1, Seite 12 (DE-627)663366712 (DE-600)2615211-3 20452322 nnns volume:12 year:2022 number:1 pages:12 https://doi.org/10.1038/s41598-021-04159-x kostenfrei https://doaj.org/article/a6064b93688c4ae59eaa18df695442ef kostenfrei https://doi.org/10.1038/s41598-021-04159-x kostenfrei https://doaj.org/toc/2045-2322 Journal toc kostenfrei GBV_USEFLAG_A SYSFLAG_A GBV_DOAJ GBV_ILN_11 GBV_ILN_20 GBV_ILN_22 GBV_ILN_23 GBV_ILN_24 GBV_ILN_31 GBV_ILN_39 GBV_ILN_40 GBV_ILN_60 GBV_ILN_62 GBV_ILN_63 GBV_ILN_65 GBV_ILN_69 GBV_ILN_70 GBV_ILN_73 GBV_ILN_95 GBV_ILN_105 GBV_ILN_110 GBV_ILN_151 GBV_ILN_161 GBV_ILN_170 GBV_ILN_171 GBV_ILN_206 GBV_ILN_213 GBV_ILN_230 GBV_ILN_285 GBV_ILN_293 GBV_ILN_370 GBV_ILN_381 GBV_ILN_602 GBV_ILN_2005 GBV_ILN_2009 GBV_ILN_2011 GBV_ILN_2014 GBV_ILN_2055 GBV_ILN_2111 GBV_ILN_4012 GBV_ILN_4037 GBV_ILN_4112 GBV_ILN_4125 GBV_ILN_4126 GBV_ILN_4249 GBV_ILN_4305 GBV_ILN_4306 GBV_ILN_4307 GBV_ILN_4313 GBV_ILN_4322 GBV_ILN_4323 GBV_ILN_4324 GBV_ILN_4325 GBV_ILN_4335 GBV_ILN_4338 GBV_ILN_4367 GBV_ILN_4700 AR 12 2022 1 12 |
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10.1038/s41598-021-04159-x doi (DE-627)DOAJ074027816 (DE-599)DOAJa6064b93688c4ae59eaa18df695442ef DE-627 ger DE-627 rakwb eng Chih-Cheng Chang verfasserin aut Device quantization policy in variation-aware in-memory computing design 2022 Text txt rdacontent Computermedien c rdamedia Online-Ressource cr rdacarrier Abstract Device quantization of in-memory computing (IMC) that considers the non-negligible variation and finite dynamic range of practical memory technology is investigated, aiming for quantitatively co-optimizing system performance on accuracy, power, and area. Architecture- and algorithm-level solutions are taken into consideration. Weight-separate mapping, VGG-like algorithm, multiple cells per weight, and fine-tuning of the classifier layer are effective for suppressing inference accuracy loss due to variation and allow for the lowest possible weight precision to improve area and energy efficiency. Higher priority should be given to developing low-conductance and low-variability memory devices that are essential for energy and area-efficiency IMC whereas low bit precision (< 3b) and memory window (< 10) are less concerned. Medicine R Science Q Shao-Tzu Li verfasserin aut Tong-Lin Pan verfasserin aut Chia-Ming Tsai verfasserin aut I-Ting Wang verfasserin aut Tian-Sheuan Chang verfasserin aut Tuo-Hung Hou verfasserin aut In Scientific Reports Nature Portfolio, 2011 12(2022), 1, Seite 12 (DE-627)663366712 (DE-600)2615211-3 20452322 nnns volume:12 year:2022 number:1 pages:12 https://doi.org/10.1038/s41598-021-04159-x kostenfrei https://doaj.org/article/a6064b93688c4ae59eaa18df695442ef kostenfrei https://doi.org/10.1038/s41598-021-04159-x kostenfrei https://doaj.org/toc/2045-2322 Journal toc kostenfrei GBV_USEFLAG_A SYSFLAG_A GBV_DOAJ GBV_ILN_11 GBV_ILN_20 GBV_ILN_22 GBV_ILN_23 GBV_ILN_24 GBV_ILN_31 GBV_ILN_39 GBV_ILN_40 GBV_ILN_60 GBV_ILN_62 GBV_ILN_63 GBV_ILN_65 GBV_ILN_69 GBV_ILN_70 GBV_ILN_73 GBV_ILN_95 GBV_ILN_105 GBV_ILN_110 GBV_ILN_151 GBV_ILN_161 GBV_ILN_170 GBV_ILN_171 GBV_ILN_206 GBV_ILN_213 GBV_ILN_230 GBV_ILN_285 GBV_ILN_293 GBV_ILN_370 GBV_ILN_381 GBV_ILN_602 GBV_ILN_2005 GBV_ILN_2009 GBV_ILN_2011 GBV_ILN_2014 GBV_ILN_2055 GBV_ILN_2111 GBV_ILN_4012 GBV_ILN_4037 GBV_ILN_4112 GBV_ILN_4125 GBV_ILN_4126 GBV_ILN_4249 GBV_ILN_4305 GBV_ILN_4306 GBV_ILN_4307 GBV_ILN_4313 GBV_ILN_4322 GBV_ILN_4323 GBV_ILN_4324 GBV_ILN_4325 GBV_ILN_4335 GBV_ILN_4338 GBV_ILN_4367 GBV_ILN_4700 AR 12 2022 1 12 |
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10.1038/s41598-021-04159-x doi (DE-627)DOAJ074027816 (DE-599)DOAJa6064b93688c4ae59eaa18df695442ef DE-627 ger DE-627 rakwb eng Chih-Cheng Chang verfasserin aut Device quantization policy in variation-aware in-memory computing design 2022 Text txt rdacontent Computermedien c rdamedia Online-Ressource cr rdacarrier Abstract Device quantization of in-memory computing (IMC) that considers the non-negligible variation and finite dynamic range of practical memory technology is investigated, aiming for quantitatively co-optimizing system performance on accuracy, power, and area. Architecture- and algorithm-level solutions are taken into consideration. Weight-separate mapping, VGG-like algorithm, multiple cells per weight, and fine-tuning of the classifier layer are effective for suppressing inference accuracy loss due to variation and allow for the lowest possible weight precision to improve area and energy efficiency. Higher priority should be given to developing low-conductance and low-variability memory devices that are essential for energy and area-efficiency IMC whereas low bit precision (< 3b) and memory window (< 10) are less concerned. Medicine R Science Q Shao-Tzu Li verfasserin aut Tong-Lin Pan verfasserin aut Chia-Ming Tsai verfasserin aut I-Ting Wang verfasserin aut Tian-Sheuan Chang verfasserin aut Tuo-Hung Hou verfasserin aut In Scientific Reports Nature Portfolio, 2011 12(2022), 1, Seite 12 (DE-627)663366712 (DE-600)2615211-3 20452322 nnns volume:12 year:2022 number:1 pages:12 https://doi.org/10.1038/s41598-021-04159-x kostenfrei https://doaj.org/article/a6064b93688c4ae59eaa18df695442ef kostenfrei https://doi.org/10.1038/s41598-021-04159-x kostenfrei https://doaj.org/toc/2045-2322 Journal toc kostenfrei GBV_USEFLAG_A SYSFLAG_A GBV_DOAJ GBV_ILN_11 GBV_ILN_20 GBV_ILN_22 GBV_ILN_23 GBV_ILN_24 GBV_ILN_31 GBV_ILN_39 GBV_ILN_40 GBV_ILN_60 GBV_ILN_62 GBV_ILN_63 GBV_ILN_65 GBV_ILN_69 GBV_ILN_70 GBV_ILN_73 GBV_ILN_95 GBV_ILN_105 GBV_ILN_110 GBV_ILN_151 GBV_ILN_161 GBV_ILN_170 GBV_ILN_171 GBV_ILN_206 GBV_ILN_213 GBV_ILN_230 GBV_ILN_285 GBV_ILN_293 GBV_ILN_370 GBV_ILN_381 GBV_ILN_602 GBV_ILN_2005 GBV_ILN_2009 GBV_ILN_2011 GBV_ILN_2014 GBV_ILN_2055 GBV_ILN_2111 GBV_ILN_4012 GBV_ILN_4037 GBV_ILN_4112 GBV_ILN_4125 GBV_ILN_4126 GBV_ILN_4249 GBV_ILN_4305 GBV_ILN_4306 GBV_ILN_4307 GBV_ILN_4313 GBV_ILN_4322 GBV_ILN_4323 GBV_ILN_4324 GBV_ILN_4325 GBV_ILN_4335 GBV_ILN_4338 GBV_ILN_4367 GBV_ILN_4700 AR 12 2022 1 12 |
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10.1038/s41598-021-04159-x doi (DE-627)DOAJ074027816 (DE-599)DOAJa6064b93688c4ae59eaa18df695442ef DE-627 ger DE-627 rakwb eng Chih-Cheng Chang verfasserin aut Device quantization policy in variation-aware in-memory computing design 2022 Text txt rdacontent Computermedien c rdamedia Online-Ressource cr rdacarrier Abstract Device quantization of in-memory computing (IMC) that considers the non-negligible variation and finite dynamic range of practical memory technology is investigated, aiming for quantitatively co-optimizing system performance on accuracy, power, and area. Architecture- and algorithm-level solutions are taken into consideration. Weight-separate mapping, VGG-like algorithm, multiple cells per weight, and fine-tuning of the classifier layer are effective for suppressing inference accuracy loss due to variation and allow for the lowest possible weight precision to improve area and energy efficiency. Higher priority should be given to developing low-conductance and low-variability memory devices that are essential for energy and area-efficiency IMC whereas low bit precision (< 3b) and memory window (< 10) are less concerned. Medicine R Science Q Shao-Tzu Li verfasserin aut Tong-Lin Pan verfasserin aut Chia-Ming Tsai verfasserin aut I-Ting Wang verfasserin aut Tian-Sheuan Chang verfasserin aut Tuo-Hung Hou verfasserin aut In Scientific Reports Nature Portfolio, 2011 12(2022), 1, Seite 12 (DE-627)663366712 (DE-600)2615211-3 20452322 nnns volume:12 year:2022 number:1 pages:12 https://doi.org/10.1038/s41598-021-04159-x kostenfrei https://doaj.org/article/a6064b93688c4ae59eaa18df695442ef kostenfrei https://doi.org/10.1038/s41598-021-04159-x kostenfrei https://doaj.org/toc/2045-2322 Journal toc kostenfrei GBV_USEFLAG_A SYSFLAG_A GBV_DOAJ GBV_ILN_11 GBV_ILN_20 GBV_ILN_22 GBV_ILN_23 GBV_ILN_24 GBV_ILN_31 GBV_ILN_39 GBV_ILN_40 GBV_ILN_60 GBV_ILN_62 GBV_ILN_63 GBV_ILN_65 GBV_ILN_69 GBV_ILN_70 GBV_ILN_73 GBV_ILN_95 GBV_ILN_105 GBV_ILN_110 GBV_ILN_151 GBV_ILN_161 GBV_ILN_170 GBV_ILN_171 GBV_ILN_206 GBV_ILN_213 GBV_ILN_230 GBV_ILN_285 GBV_ILN_293 GBV_ILN_370 GBV_ILN_381 GBV_ILN_602 GBV_ILN_2005 GBV_ILN_2009 GBV_ILN_2011 GBV_ILN_2014 GBV_ILN_2055 GBV_ILN_2111 GBV_ILN_4012 GBV_ILN_4037 GBV_ILN_4112 GBV_ILN_4125 GBV_ILN_4126 GBV_ILN_4249 GBV_ILN_4305 GBV_ILN_4306 GBV_ILN_4307 GBV_ILN_4313 GBV_ILN_4322 GBV_ILN_4323 GBV_ILN_4324 GBV_ILN_4325 GBV_ILN_4335 GBV_ILN_4338 GBV_ILN_4367 GBV_ILN_4700 AR 12 2022 1 12 |
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10.1038/s41598-021-04159-x doi (DE-627)DOAJ074027816 (DE-599)DOAJa6064b93688c4ae59eaa18df695442ef DE-627 ger DE-627 rakwb eng Chih-Cheng Chang verfasserin aut Device quantization policy in variation-aware in-memory computing design 2022 Text txt rdacontent Computermedien c rdamedia Online-Ressource cr rdacarrier Abstract Device quantization of in-memory computing (IMC) that considers the non-negligible variation and finite dynamic range of practical memory technology is investigated, aiming for quantitatively co-optimizing system performance on accuracy, power, and area. Architecture- and algorithm-level solutions are taken into consideration. Weight-separate mapping, VGG-like algorithm, multiple cells per weight, and fine-tuning of the classifier layer are effective for suppressing inference accuracy loss due to variation and allow for the lowest possible weight precision to improve area and energy efficiency. Higher priority should be given to developing low-conductance and low-variability memory devices that are essential for energy and area-efficiency IMC whereas low bit precision (< 3b) and memory window (< 10) are less concerned. Medicine R Science Q Shao-Tzu Li verfasserin aut Tong-Lin Pan verfasserin aut Chia-Ming Tsai verfasserin aut I-Ting Wang verfasserin aut Tian-Sheuan Chang verfasserin aut Tuo-Hung Hou verfasserin aut In Scientific Reports Nature Portfolio, 2011 12(2022), 1, Seite 12 (DE-627)663366712 (DE-600)2615211-3 20452322 nnns volume:12 year:2022 number:1 pages:12 https://doi.org/10.1038/s41598-021-04159-x kostenfrei https://doaj.org/article/a6064b93688c4ae59eaa18df695442ef kostenfrei https://doi.org/10.1038/s41598-021-04159-x kostenfrei https://doaj.org/toc/2045-2322 Journal toc kostenfrei GBV_USEFLAG_A SYSFLAG_A GBV_DOAJ GBV_ILN_11 GBV_ILN_20 GBV_ILN_22 GBV_ILN_23 GBV_ILN_24 GBV_ILN_31 GBV_ILN_39 GBV_ILN_40 GBV_ILN_60 GBV_ILN_62 GBV_ILN_63 GBV_ILN_65 GBV_ILN_69 GBV_ILN_70 GBV_ILN_73 GBV_ILN_95 GBV_ILN_105 GBV_ILN_110 GBV_ILN_151 GBV_ILN_161 GBV_ILN_170 GBV_ILN_171 GBV_ILN_206 GBV_ILN_213 GBV_ILN_230 GBV_ILN_285 GBV_ILN_293 GBV_ILN_370 GBV_ILN_381 GBV_ILN_602 GBV_ILN_2005 GBV_ILN_2009 GBV_ILN_2011 GBV_ILN_2014 GBV_ILN_2055 GBV_ILN_2111 GBV_ILN_4012 GBV_ILN_4037 GBV_ILN_4112 GBV_ILN_4125 GBV_ILN_4126 GBV_ILN_4249 GBV_ILN_4305 GBV_ILN_4306 GBV_ILN_4307 GBV_ILN_4313 GBV_ILN_4322 GBV_ILN_4323 GBV_ILN_4324 GBV_ILN_4325 GBV_ILN_4335 GBV_ILN_4338 GBV_ILN_4367 GBV_ILN_4700 AR 12 2022 1 12 |
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Abstract Device quantization of in-memory computing (IMC) that considers the non-negligible variation and finite dynamic range of practical memory technology is investigated, aiming for quantitatively co-optimizing system performance on accuracy, power, and area. Architecture- and algorithm-level solutions are taken into consideration. Weight-separate mapping, VGG-like algorithm, multiple cells per weight, and fine-tuning of the classifier layer are effective for suppressing inference accuracy loss due to variation and allow for the lowest possible weight precision to improve area and energy efficiency. Higher priority should be given to developing low-conductance and low-variability memory devices that are essential for energy and area-efficiency IMC whereas low bit precision (< 3b) and memory window (< 10) are less concerned. |
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Abstract Device quantization of in-memory computing (IMC) that considers the non-negligible variation and finite dynamic range of practical memory technology is investigated, aiming for quantitatively co-optimizing system performance on accuracy, power, and area. Architecture- and algorithm-level solutions are taken into consideration. Weight-separate mapping, VGG-like algorithm, multiple cells per weight, and fine-tuning of the classifier layer are effective for suppressing inference accuracy loss due to variation and allow for the lowest possible weight precision to improve area and energy efficiency. Higher priority should be given to developing low-conductance and low-variability memory devices that are essential for energy and area-efficiency IMC whereas low bit precision (< 3b) and memory window (< 10) are less concerned. |
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Abstract Device quantization of in-memory computing (IMC) that considers the non-negligible variation and finite dynamic range of practical memory technology is investigated, aiming for quantitatively co-optimizing system performance on accuracy, power, and area. Architecture- and algorithm-level solutions are taken into consideration. Weight-separate mapping, VGG-like algorithm, multiple cells per weight, and fine-tuning of the classifier layer are effective for suppressing inference accuracy loss due to variation and allow for the lowest possible weight precision to improve area and energy efficiency. Higher priority should be given to developing low-conductance and low-variability memory devices that are essential for energy and area-efficiency IMC whereas low bit precision (< 3b) and memory window (< 10) are less concerned. |
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