A Spintronic 2M/7T Computation-in-Memory Cell

Computing data-intensive applications on the von Neumann architecture lead to significant performance and energy overheads. The concept of computation in memory (CiM) addresses the bottleneck of von Neumann machines by reducing the data movement in the computing system. Emerging resistive non-volati...
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Autor*in:	Atousa Jafari [verfasserIn] Christopher Münch [verfasserIn] Mehdi Tahoori [verfasserIn]

Format:	E-Artikel
Sprache:	Englisch

Erschienen:	2022

Schlagwörter:	computation in memory (CiM) computation in memory within core array (CiM-A) computation in memory within periphery circuit (CiM-P) static random access memory (SRAM) spin transfer torque magnetic RAM (STT-MRAM)

Übergeordnetes Werk:	In: Journal of Low Power Electronics and Applications - MDPI AG, 2011, 12(2022), 4, p 63
Übergeordnetes Werk:	volume:12 ; year:2022 ; number:4, p 63

Links:	Link aufrufen Link aufrufen Link aufrufen Journal toc

DOI / URN:	10.3390/jlpea12040063

Katalog-ID:	DOAJ083132147

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language	English
source	In Journal of Low Power Electronics and Applications 12(2022), 4, p 63 volume:12 year:2022 number:4, p 63
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topic_facet	computation in memory (CiM) computation in memory within core array (CiM-A) computation in memory within periphery circuit (CiM-P) static random access memory (SRAM) spin transfer torque magnetic RAM (STT-MRAM) Applications of electric power
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callnumber-first	T - Technology
author	Atousa Jafari
spellingShingle	Atousa Jafari misc TK4001-4102 misc computation in memory (CiM) misc computation in memory within core array (CiM-A) misc computation in memory within periphery circuit (CiM-P) misc static random access memory (SRAM) misc spin transfer torque magnetic RAM (STT-MRAM) misc Applications of electric power A Spintronic 2M/7T Computation-in-Memory Cell
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topic_title	TK4001-4102 A Spintronic 2M/7T Computation-in-Memory Cell computation in memory (CiM) computation in memory within core array (CiM-A) computation in memory within periphery circuit (CiM-P) static random access memory (SRAM) spin transfer torque magnetic RAM (STT-MRAM)
topic	misc TK4001-4102 misc computation in memory (CiM) misc computation in memory within core array (CiM-A) misc computation in memory within periphery circuit (CiM-P) misc static random access memory (SRAM) misc spin transfer torque magnetic RAM (STT-MRAM) misc Applications of electric power
topic_unstemmed	misc TK4001-4102 misc computation in memory (CiM) misc computation in memory within core array (CiM-A) misc computation in memory within periphery circuit (CiM-P) misc static random access memory (SRAM) misc spin transfer torque magnetic RAM (STT-MRAM) misc Applications of electric power
topic_browse	misc TK4001-4102 misc computation in memory (CiM) misc computation in memory within core array (CiM-A) misc computation in memory within periphery circuit (CiM-P) misc static random access memory (SRAM) misc spin transfer torque magnetic RAM (STT-MRAM) misc Applications of electric power
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title	A Spintronic 2M/7T Computation-in-Memory Cell
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title_full	A Spintronic 2M/7T Computation-in-Memory Cell
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title_sort	spintronic 2m/7t computation-in-memory cell
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title_auth	A Spintronic 2M/7T Computation-in-Memory Cell
abstract	Computing data-intensive applications on the von Neumann architecture lead to significant performance and energy overheads. The concept of computation in memory (CiM) addresses the bottleneck of von Neumann machines by reducing the data movement in the computing system. Emerging resistive non-volatile memory technologies, as well as volatile memories (SRAM and DRAM), can be used to realize architectures based on the CiM paradigm. In this paper, we propose a hybrid cell design to provide the opportunity for CiM by combining the magnetic tunnel junction (MTJ) and the conventional 6T-SRAM cell. The cell performs CiM operations based on stateful in-array computation, which has better scalability for multiple operands compared with stateless computation in the periphery. Various logic operations such as XOR, OR, and IMP can be performed with the proposed design. In addition, the proposed cell can also operate as a conventional memory cell to read and write volatile as well as non-volatile data. The obtained simulation results show that the proposed CiM-A design can increase the performance of regular memory architectures by reducing the delay by 8 times and the energy by 13 times for database query applications consisting of consecutive bitwise operations with minimum overhead.
abstractGer	Computing data-intensive applications on the von Neumann architecture lead to significant performance and energy overheads. The concept of computation in memory (CiM) addresses the bottleneck of von Neumann machines by reducing the data movement in the computing system. Emerging resistive non-volatile memory technologies, as well as volatile memories (SRAM and DRAM), can be used to realize architectures based on the CiM paradigm. In this paper, we propose a hybrid cell design to provide the opportunity for CiM by combining the magnetic tunnel junction (MTJ) and the conventional 6T-SRAM cell. The cell performs CiM operations based on stateful in-array computation, which has better scalability for multiple operands compared with stateless computation in the periphery. Various logic operations such as XOR, OR, and IMP can be performed with the proposed design. In addition, the proposed cell can also operate as a conventional memory cell to read and write volatile as well as non-volatile data. The obtained simulation results show that the proposed CiM-A design can increase the performance of regular memory architectures by reducing the delay by 8 times and the energy by 13 times for database query applications consisting of consecutive bitwise operations with minimum overhead.
abstract_unstemmed	Computing data-intensive applications on the von Neumann architecture lead to significant performance and energy overheads. The concept of computation in memory (CiM) addresses the bottleneck of von Neumann machines by reducing the data movement in the computing system. Emerging resistive non-volatile memory technologies, as well as volatile memories (SRAM and DRAM), can be used to realize architectures based on the CiM paradigm. In this paper, we propose a hybrid cell design to provide the opportunity for CiM by combining the magnetic tunnel junction (MTJ) and the conventional 6T-SRAM cell. The cell performs CiM operations based on stateful in-array computation, which has better scalability for multiple operands compared with stateless computation in the periphery. Various logic operations such as XOR, OR, and IMP can be performed with the proposed design. In addition, the proposed cell can also operate as a conventional memory cell to read and write volatile as well as non-volatile data. The obtained simulation results show that the proposed CiM-A design can increase the performance of regular memory architectures by reducing the delay by 8 times and the energy by 13 times for database query applications consisting of consecutive bitwise operations with minimum overhead.
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title_short	A Spintronic 2M/7T Computation-in-Memory Cell
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