Accelerating DC Circuit Simulation through Feature Selection and LSTM-Based Time-Step Control

Circuit simulation has become increasingly significant in circuit design with the development of very large scale integration, and direct current (DC) analysis, which serves as the basis of circuit behavior analysis, is the foundation for nonlinear electronic circuit simulation. Among the several co...
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Autor*in:	Zhou Jin [verfasserIn] Ziyi Yang [verfasserIn] Haojie Pei [verfasserIn] Xiaru Zha [verfasserIn] Yinuo Bai [verfasserIn] Dan Niu [verfasserIn] Zhenya Zhou [verfasserIn] Xiao Wu [verfasserIn]

Format:	E-Artikel
Sprache:	Englisch

Erschienen:	2023

Schlagwörter:	DC analysis pseudo-transient analysis time-step control deep learning

Übergeordnetes Werk:	In: Electronics - MDPI AG, 2013, 12(2023), 8, p 1927
Übergeordnetes Werk:	volume:12 ; year:2023 ; number:8, p 1927

Links:	Link aufrufen Link aufrufen Link aufrufen Journal toc

DOI / URN:	10.3390/electronics12081927

Katalog-ID:	DOAJ089869745

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520			\|a Circuit simulation has become increasingly significant in circuit design with the development of very large scale integration, and direct current (DC) analysis, which serves as the basis of circuit behavior analysis, is the foundation for nonlinear electronic circuit simulation. Among the several continuation algorithms for DC analysis, pseudo-transient analysis (PTA) methods have gained great success. However, PTA tends to be computationally intensive without a proper time-step control method. In order to improve this problem, we propose a novel time-step control method enhanced by advanced deep learning in this paper. Specifically, a coarse and fine-grained hybrid sampling strategy is introduced to find the optimal time step, which resolves the problem that the optimal time step has no precise definition in PTA theory. After that, a long short-term memory (LSTM) network, with the ability to process temporal information, can be employed to learn the optimal time-step control method based on feature selection and a two-stage data preprocessing strategy, which accelerates DC analysis. Furthermore, random forest (RF) is also used to evaluate feature importance, which can achieve feature selection with reduced dimensions, thereby speeding up the network’s training speed and improving the accuracy of prediction. Experimental results demonstrate a significant speedup: up to 61.32 times.
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spelling	10.3390/electronics12081927 doi (DE-627)DOAJ089869745 (DE-599)DOAJ696036c53aca42ff87ffab62cc25f57d DE-627 ger DE-627 rakwb eng TK7800-8360 Zhou Jin verfasserin aut Accelerating DC Circuit Simulation through Feature Selection and LSTM-Based Time-Step Control 2023 Text txt rdacontent Computermedien c rdamedia Online-Ressource cr rdacarrier Circuit simulation has become increasingly significant in circuit design with the development of very large scale integration, and direct current (DC) analysis, which serves as the basis of circuit behavior analysis, is the foundation for nonlinear electronic circuit simulation. Among the several continuation algorithms for DC analysis, pseudo-transient analysis (PTA) methods have gained great success. However, PTA tends to be computationally intensive without a proper time-step control method. In order to improve this problem, we propose a novel time-step control method enhanced by advanced deep learning in this paper. Specifically, a coarse and fine-grained hybrid sampling strategy is introduced to find the optimal time step, which resolves the problem that the optimal time step has no precise definition in PTA theory. After that, a long short-term memory (LSTM) network, with the ability to process temporal information, can be employed to learn the optimal time-step control method based on feature selection and a two-stage data preprocessing strategy, which accelerates DC analysis. Furthermore, random forest (RF) is also used to evaluate feature importance, which can achieve feature selection with reduced dimensions, thereby speeding up the network’s training speed and improving the accuracy of prediction. Experimental results demonstrate a significant speedup: up to 61.32 times. DC analysis pseudo-transient analysis time-step control deep learning Electronics Ziyi Yang verfasserin aut Haojie Pei verfasserin aut Xiaru Zha verfasserin aut Yinuo Bai verfasserin aut Dan Niu verfasserin aut Zhenya Zhou verfasserin aut Xiao Wu verfasserin aut In Electronics MDPI AG, 2013 12(2023), 8, p 1927 (DE-627)718626478 (DE-600)2662127-7 20799292 nnns volume:12 year:2023 number:8, p 1927 https://doi.org/10.3390/electronics12081927 kostenfrei https://doaj.org/article/696036c53aca42ff87ffab62cc25f57d kostenfrei https://www.mdpi.com/2079-9292/12/8/1927 kostenfrei https://doaj.org/toc/2079-9292 Journal toc kostenfrei GBV_USEFLAG_A SYSFLAG_A GBV_DOAJ GBV_ILN_20 GBV_ILN_22 GBV_ILN_23 GBV_ILN_24 GBV_ILN_39 GBV_ILN_40 GBV_ILN_60 GBV_ILN_62 GBV_ILN_63 GBV_ILN_65 GBV_ILN_69 GBV_ILN_70 GBV_ILN_73 GBV_ILN_95 GBV_ILN_105 GBV_ILN_110 GBV_ILN_151 GBV_ILN_161 GBV_ILN_170 GBV_ILN_213 GBV_ILN_230 GBV_ILN_285 GBV_ILN_293 GBV_ILN_370 GBV_ILN_602 GBV_ILN_2014 GBV_ILN_4012 GBV_ILN_4037 GBV_ILN_4112 GBV_ILN_4125 GBV_ILN_4126 GBV_ILN_4249 GBV_ILN_4305 GBV_ILN_4306 GBV_ILN_4307 GBV_ILN_4313 GBV_ILN_4322 GBV_ILN_4323 GBV_ILN_4324 GBV_ILN_4325 GBV_ILN_4335 GBV_ILN_4338 GBV_ILN_4367 GBV_ILN_4700 AR 12 2023 8, p 1927
allfields_unstemmed	10.3390/electronics12081927 doi (DE-627)DOAJ089869745 (DE-599)DOAJ696036c53aca42ff87ffab62cc25f57d DE-627 ger DE-627 rakwb eng TK7800-8360 Zhou Jin verfasserin aut Accelerating DC Circuit Simulation through Feature Selection and LSTM-Based Time-Step Control 2023 Text txt rdacontent Computermedien c rdamedia Online-Ressource cr rdacarrier Circuit simulation has become increasingly significant in circuit design with the development of very large scale integration, and direct current (DC) analysis, which serves as the basis of circuit behavior analysis, is the foundation for nonlinear electronic circuit simulation. Among the several continuation algorithms for DC analysis, pseudo-transient analysis (PTA) methods have gained great success. However, PTA tends to be computationally intensive without a proper time-step control method. In order to improve this problem, we propose a novel time-step control method enhanced by advanced deep learning in this paper. Specifically, a coarse and fine-grained hybrid sampling strategy is introduced to find the optimal time step, which resolves the problem that the optimal time step has no precise definition in PTA theory. After that, a long short-term memory (LSTM) network, with the ability to process temporal information, can be employed to learn the optimal time-step control method based on feature selection and a two-stage data preprocessing strategy, which accelerates DC analysis. Furthermore, random forest (RF) is also used to evaluate feature importance, which can achieve feature selection with reduced dimensions, thereby speeding up the network’s training speed and improving the accuracy of prediction. Experimental results demonstrate a significant speedup: up to 61.32 times. DC analysis pseudo-transient analysis time-step control deep learning Electronics Ziyi Yang verfasserin aut Haojie Pei verfasserin aut Xiaru Zha verfasserin aut Yinuo Bai verfasserin aut Dan Niu verfasserin aut Zhenya Zhou verfasserin aut Xiao Wu verfasserin aut In Electronics MDPI AG, 2013 12(2023), 8, p 1927 (DE-627)718626478 (DE-600)2662127-7 20799292 nnns volume:12 year:2023 number:8, p 1927 https://doi.org/10.3390/electronics12081927 kostenfrei https://doaj.org/article/696036c53aca42ff87ffab62cc25f57d kostenfrei https://www.mdpi.com/2079-9292/12/8/1927 kostenfrei https://doaj.org/toc/2079-9292 Journal toc kostenfrei GBV_USEFLAG_A SYSFLAG_A GBV_DOAJ GBV_ILN_20 GBV_ILN_22 GBV_ILN_23 GBV_ILN_24 GBV_ILN_39 GBV_ILN_40 GBV_ILN_60 GBV_ILN_62 GBV_ILN_63 GBV_ILN_65 GBV_ILN_69 GBV_ILN_70 GBV_ILN_73 GBV_ILN_95 GBV_ILN_105 GBV_ILN_110 GBV_ILN_151 GBV_ILN_161 GBV_ILN_170 GBV_ILN_213 GBV_ILN_230 GBV_ILN_285 GBV_ILN_293 GBV_ILN_370 GBV_ILN_602 GBV_ILN_2014 GBV_ILN_4012 GBV_ILN_4037 GBV_ILN_4112 GBV_ILN_4125 GBV_ILN_4126 GBV_ILN_4249 GBV_ILN_4305 GBV_ILN_4306 GBV_ILN_4307 GBV_ILN_4313 GBV_ILN_4322 GBV_ILN_4323 GBV_ILN_4324 GBV_ILN_4325 GBV_ILN_4335 GBV_ILN_4338 GBV_ILN_4367 GBV_ILN_4700 AR 12 2023 8, p 1927
allfieldsGer	10.3390/electronics12081927 doi (DE-627)DOAJ089869745 (DE-599)DOAJ696036c53aca42ff87ffab62cc25f57d DE-627 ger DE-627 rakwb eng TK7800-8360 Zhou Jin verfasserin aut Accelerating DC Circuit Simulation through Feature Selection and LSTM-Based Time-Step Control 2023 Text txt rdacontent Computermedien c rdamedia Online-Ressource cr rdacarrier Circuit simulation has become increasingly significant in circuit design with the development of very large scale integration, and direct current (DC) analysis, which serves as the basis of circuit behavior analysis, is the foundation for nonlinear electronic circuit simulation. Among the several continuation algorithms for DC analysis, pseudo-transient analysis (PTA) methods have gained great success. However, PTA tends to be computationally intensive without a proper time-step control method. In order to improve this problem, we propose a novel time-step control method enhanced by advanced deep learning in this paper. Specifically, a coarse and fine-grained hybrid sampling strategy is introduced to find the optimal time step, which resolves the problem that the optimal time step has no precise definition in PTA theory. After that, a long short-term memory (LSTM) network, with the ability to process temporal information, can be employed to learn the optimal time-step control method based on feature selection and a two-stage data preprocessing strategy, which accelerates DC analysis. Furthermore, random forest (RF) is also used to evaluate feature importance, which can achieve feature selection with reduced dimensions, thereby speeding up the network’s training speed and improving the accuracy of prediction. Experimental results demonstrate a significant speedup: up to 61.32 times. DC analysis pseudo-transient analysis time-step control deep learning Electronics Ziyi Yang verfasserin aut Haojie Pei verfasserin aut Xiaru Zha verfasserin aut Yinuo Bai verfasserin aut Dan Niu verfasserin aut Zhenya Zhou verfasserin aut Xiao Wu verfasserin aut In Electronics MDPI AG, 2013 12(2023), 8, p 1927 (DE-627)718626478 (DE-600)2662127-7 20799292 nnns volume:12 year:2023 number:8, p 1927 https://doi.org/10.3390/electronics12081927 kostenfrei https://doaj.org/article/696036c53aca42ff87ffab62cc25f57d kostenfrei https://www.mdpi.com/2079-9292/12/8/1927 kostenfrei https://doaj.org/toc/2079-9292 Journal toc kostenfrei GBV_USEFLAG_A SYSFLAG_A GBV_DOAJ GBV_ILN_20 GBV_ILN_22 GBV_ILN_23 GBV_ILN_24 GBV_ILN_39 GBV_ILN_40 GBV_ILN_60 GBV_ILN_62 GBV_ILN_63 GBV_ILN_65 GBV_ILN_69 GBV_ILN_70 GBV_ILN_73 GBV_ILN_95 GBV_ILN_105 GBV_ILN_110 GBV_ILN_151 GBV_ILN_161 GBV_ILN_170 GBV_ILN_213 GBV_ILN_230 GBV_ILN_285 GBV_ILN_293 GBV_ILN_370 GBV_ILN_602 GBV_ILN_2014 GBV_ILN_4012 GBV_ILN_4037 GBV_ILN_4112 GBV_ILN_4125 GBV_ILN_4126 GBV_ILN_4249 GBV_ILN_4305 GBV_ILN_4306 GBV_ILN_4307 GBV_ILN_4313 GBV_ILN_4322 GBV_ILN_4323 GBV_ILN_4324 GBV_ILN_4325 GBV_ILN_4335 GBV_ILN_4338 GBV_ILN_4367 GBV_ILN_4700 AR 12 2023 8, p 1927
allfieldsSound	10.3390/electronics12081927 doi (DE-627)DOAJ089869745 (DE-599)DOAJ696036c53aca42ff87ffab62cc25f57d DE-627 ger DE-627 rakwb eng TK7800-8360 Zhou Jin verfasserin aut Accelerating DC Circuit Simulation through Feature Selection and LSTM-Based Time-Step Control 2023 Text txt rdacontent Computermedien c rdamedia Online-Ressource cr rdacarrier Circuit simulation has become increasingly significant in circuit design with the development of very large scale integration, and direct current (DC) analysis, which serves as the basis of circuit behavior analysis, is the foundation for nonlinear electronic circuit simulation. Among the several continuation algorithms for DC analysis, pseudo-transient analysis (PTA) methods have gained great success. However, PTA tends to be computationally intensive without a proper time-step control method. In order to improve this problem, we propose a novel time-step control method enhanced by advanced deep learning in this paper. Specifically, a coarse and fine-grained hybrid sampling strategy is introduced to find the optimal time step, which resolves the problem that the optimal time step has no precise definition in PTA theory. After that, a long short-term memory (LSTM) network, with the ability to process temporal information, can be employed to learn the optimal time-step control method based on feature selection and a two-stage data preprocessing strategy, which accelerates DC analysis. Furthermore, random forest (RF) is also used to evaluate feature importance, which can achieve feature selection with reduced dimensions, thereby speeding up the network’s training speed and improving the accuracy of prediction. Experimental results demonstrate a significant speedup: up to 61.32 times. DC analysis pseudo-transient analysis time-step control deep learning Electronics Ziyi Yang verfasserin aut Haojie Pei verfasserin aut Xiaru Zha verfasserin aut Yinuo Bai verfasserin aut Dan Niu verfasserin aut Zhenya Zhou verfasserin aut Xiao Wu verfasserin aut In Electronics MDPI AG, 2013 12(2023), 8, p 1927 (DE-627)718626478 (DE-600)2662127-7 20799292 nnns volume:12 year:2023 number:8, p 1927 https://doi.org/10.3390/electronics12081927 kostenfrei https://doaj.org/article/696036c53aca42ff87ffab62cc25f57d kostenfrei https://www.mdpi.com/2079-9292/12/8/1927 kostenfrei https://doaj.org/toc/2079-9292 Journal toc kostenfrei GBV_USEFLAG_A SYSFLAG_A GBV_DOAJ GBV_ILN_20 GBV_ILN_22 GBV_ILN_23 GBV_ILN_24 GBV_ILN_39 GBV_ILN_40 GBV_ILN_60 GBV_ILN_62 GBV_ILN_63 GBV_ILN_65 GBV_ILN_69 GBV_ILN_70 GBV_ILN_73 GBV_ILN_95 GBV_ILN_105 GBV_ILN_110 GBV_ILN_151 GBV_ILN_161 GBV_ILN_170 GBV_ILN_213 GBV_ILN_230 GBV_ILN_285 GBV_ILN_293 GBV_ILN_370 GBV_ILN_602 GBV_ILN_2014 GBV_ILN_4012 GBV_ILN_4037 GBV_ILN_4112 GBV_ILN_4125 GBV_ILN_4126 GBV_ILN_4249 GBV_ILN_4305 GBV_ILN_4306 GBV_ILN_4307 GBV_ILN_4313 GBV_ILN_4322 GBV_ILN_4323 GBV_ILN_4324 GBV_ILN_4325 GBV_ILN_4335 GBV_ILN_4338 GBV_ILN_4367 GBV_ILN_4700 AR 12 2023 8, p 1927
language	English
source	In Electronics 12(2023), 8, p 1927 volume:12 year:2023 number:8, p 1927
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institution	findex.gbv.de
topic_facet	DC analysis pseudo-transient analysis time-step control deep learning Electronics
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container_title	Electronics
authorswithroles_txt_mv	Zhou Jin @@aut@@ Ziyi Yang @@aut@@ Haojie Pei @@aut@@ Xiaru Zha @@aut@@ Yinuo Bai @@aut@@ Dan Niu @@aut@@ Zhenya Zhou @@aut@@ Xiao Wu @@aut@@
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callnumber-first	T - Technology
author	Zhou Jin
spellingShingle	Zhou Jin misc TK7800-8360 misc DC analysis misc pseudo-transient analysis misc time-step control misc deep learning misc Electronics Accelerating DC Circuit Simulation through Feature Selection and LSTM-Based Time-Step Control
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topic_title	TK7800-8360 Accelerating DC Circuit Simulation through Feature Selection and LSTM-Based Time-Step Control DC analysis pseudo-transient analysis time-step control deep learning
topic	misc TK7800-8360 misc DC analysis misc pseudo-transient analysis misc time-step control misc deep learning misc Electronics
topic_unstemmed	misc TK7800-8360 misc DC analysis misc pseudo-transient analysis misc time-step control misc deep learning misc Electronics
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title	Accelerating DC Circuit Simulation through Feature Selection and LSTM-Based Time-Step Control
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title_full	Accelerating DC Circuit Simulation through Feature Selection and LSTM-Based Time-Step Control
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author_browse	Zhou Jin Ziyi Yang Haojie Pei Xiaru Zha Yinuo Bai Dan Niu Zhenya Zhou Xiao Wu
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title_sort	accelerating dc circuit simulation through feature selection and lstm-based time-step control
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title_auth	Accelerating DC Circuit Simulation through Feature Selection and LSTM-Based Time-Step Control
abstract	Circuit simulation has become increasingly significant in circuit design with the development of very large scale integration, and direct current (DC) analysis, which serves as the basis of circuit behavior analysis, is the foundation for nonlinear electronic circuit simulation. Among the several continuation algorithms for DC analysis, pseudo-transient analysis (PTA) methods have gained great success. However, PTA tends to be computationally intensive without a proper time-step control method. In order to improve this problem, we propose a novel time-step control method enhanced by advanced deep learning in this paper. Specifically, a coarse and fine-grained hybrid sampling strategy is introduced to find the optimal time step, which resolves the problem that the optimal time step has no precise definition in PTA theory. After that, a long short-term memory (LSTM) network, with the ability to process temporal information, can be employed to learn the optimal time-step control method based on feature selection and a two-stage data preprocessing strategy, which accelerates DC analysis. Furthermore, random forest (RF) is also used to evaluate feature importance, which can achieve feature selection with reduced dimensions, thereby speeding up the network’s training speed and improving the accuracy of prediction. Experimental results demonstrate a significant speedup: up to 61.32 times.
abstractGer	Circuit simulation has become increasingly significant in circuit design with the development of very large scale integration, and direct current (DC) analysis, which serves as the basis of circuit behavior analysis, is the foundation for nonlinear electronic circuit simulation. Among the several continuation algorithms for DC analysis, pseudo-transient analysis (PTA) methods have gained great success. However, PTA tends to be computationally intensive without a proper time-step control method. In order to improve this problem, we propose a novel time-step control method enhanced by advanced deep learning in this paper. Specifically, a coarse and fine-grained hybrid sampling strategy is introduced to find the optimal time step, which resolves the problem that the optimal time step has no precise definition in PTA theory. After that, a long short-term memory (LSTM) network, with the ability to process temporal information, can be employed to learn the optimal time-step control method based on feature selection and a two-stage data preprocessing strategy, which accelerates DC analysis. Furthermore, random forest (RF) is also used to evaluate feature importance, which can achieve feature selection with reduced dimensions, thereby speeding up the network’s training speed and improving the accuracy of prediction. Experimental results demonstrate a significant speedup: up to 61.32 times.
abstract_unstemmed	Circuit simulation has become increasingly significant in circuit design with the development of very large scale integration, and direct current (DC) analysis, which serves as the basis of circuit behavior analysis, is the foundation for nonlinear electronic circuit simulation. Among the several continuation algorithms for DC analysis, pseudo-transient analysis (PTA) methods have gained great success. However, PTA tends to be computationally intensive without a proper time-step control method. In order to improve this problem, we propose a novel time-step control method enhanced by advanced deep learning in this paper. Specifically, a coarse and fine-grained hybrid sampling strategy is introduced to find the optimal time step, which resolves the problem that the optimal time step has no precise definition in PTA theory. After that, a long short-term memory (LSTM) network, with the ability to process temporal information, can be employed to learn the optimal time-step control method based on feature selection and a two-stage data preprocessing strategy, which accelerates DC analysis. Furthermore, random forest (RF) is also used to evaluate feature importance, which can achieve feature selection with reduced dimensions, thereby speeding up the network’s training speed and improving the accuracy of prediction. Experimental results demonstrate a significant speedup: up to 61.32 times.
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title_short	Accelerating DC Circuit Simulation through Feature Selection and LSTM-Based Time-Step Control
url	https://doi.org/10.3390/electronics12081927 https://doaj.org/article/696036c53aca42ff87ffab62cc25f57d https://www.mdpi.com/2079-9292/12/8/1927 https://doaj.org/toc/2079-9292
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