Open-Source HW/SW Co-Simulation Using QEMU and GHDL for VHDL-Based SoC Design

Hardware/software co-simulation is a technique that can help design and validate digital circuits controlled by embedded processors. Co-simulation has largely been applied to system-level models, and tools for SystemC or SystemVerilog are readily available, but they are either not compatible or very...
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Gespeichert in:

Autor*in:	Giorgio Biagetti [verfasserIn] Laura Falaschetti [verfasserIn] Paolo Crippa [verfasserIn] Michele Alessandrini [verfasserIn] Claudio Turchetti [verfasserIn]

Format:	E-Artikel
Sprache:	Englisch

Erschienen:	2023

Schlagwörter:	HW/SW co-simulation QEMU VHDL FPGA SoC

Übergeordnetes Werk:	In: Electronics - MDPI AG, 2013, 12(2023), 3986, p 3986
Übergeordnetes Werk:	volume:12 ; year:2023 ; number:3986, p 3986

Links:	Link aufrufen Link aufrufen Link aufrufen Journal toc

DOI / URN:	10.3390/electronics12183986

Katalog-ID:	DOAJ093419031

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language	English
source	In Electronics 12(2023), 3986, p 3986 volume:12 year:2023 number:3986, p 3986
sourceStr	In Electronics 12(2023), 3986, p 3986 volume:12 year:2023 number:3986, p 3986
format_phy_str_mv	Article
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topic_facet	HW/SW co-simulation QEMU VHDL FPGA SoC Electronics
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container_title	Electronics
authorswithroles_txt_mv	Giorgio Biagetti @@aut@@ Laura Falaschetti @@aut@@ Paolo Crippa @@aut@@ Michele Alessandrini @@aut@@ Claudio Turchetti @@aut@@
publishDateDaySort_date	2023-01-01T00:00:00Z
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callnumber-first	T - Technology
author	Giorgio Biagetti
spellingShingle	Giorgio Biagetti misc TK7800-8360 misc HW/SW co-simulation misc QEMU misc VHDL misc FPGA misc SoC misc Electronics Open-Source HW/SW Co-Simulation Using QEMU and GHDL for VHDL-Based SoC Design
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topic_title	TK7800-8360 Open-Source HW/SW Co-Simulation Using QEMU and GHDL for VHDL-Based SoC Design HW/SW co-simulation QEMU VHDL FPGA SoC
topic	misc TK7800-8360 misc HW/SW co-simulation misc QEMU misc VHDL misc FPGA misc SoC misc Electronics
topic_unstemmed	misc TK7800-8360 misc HW/SW co-simulation misc QEMU misc VHDL misc FPGA misc SoC misc Electronics
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title	Open-Source HW/SW Co-Simulation Using QEMU and GHDL for VHDL-Based SoC Design
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title_sort	open-source hw/sw co-simulation using qemu and ghdl for vhdl-based soc design
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title_auth	Open-Source HW/SW Co-Simulation Using QEMU and GHDL for VHDL-Based SoC Design
abstract	Hardware/software co-simulation is a technique that can help design and validate digital circuits controlled by embedded processors. Co-simulation has largely been applied to system-level models, and tools for SystemC or SystemVerilog are readily available, but they are either not compatible or very cumbersome to use with VHDL, the most commonly used language for FPGA design. This paper presents a direct, simple-to-use solution to co-simulate a VHDL design together with the firmware (FW) that controls it. It aims to bring the power of co-simulation to every digital designer, so it uses open-source tools, and the developed code is also open. A small patch applied to the QEMU emulator allows it to communicate with a custom-written VHDL module that exposes a CPU bus to the digital design, controlled by the FW emulated in QEMU. No changes to FW code or VHDL device code are required: with our approach, it is possible to co-simulate the very same code base that would then be implemented into an FPGA, enabling debugging, verification, and tracing capabilities that would not be possible even with the real hardware.
abstractGer	Hardware/software co-simulation is a technique that can help design and validate digital circuits controlled by embedded processors. Co-simulation has largely been applied to system-level models, and tools for SystemC or SystemVerilog are readily available, but they are either not compatible or very cumbersome to use with VHDL, the most commonly used language for FPGA design. This paper presents a direct, simple-to-use solution to co-simulate a VHDL design together with the firmware (FW) that controls it. It aims to bring the power of co-simulation to every digital designer, so it uses open-source tools, and the developed code is also open. A small patch applied to the QEMU emulator allows it to communicate with a custom-written VHDL module that exposes a CPU bus to the digital design, controlled by the FW emulated in QEMU. No changes to FW code or VHDL device code are required: with our approach, it is possible to co-simulate the very same code base that would then be implemented into an FPGA, enabling debugging, verification, and tracing capabilities that would not be possible even with the real hardware.
abstract_unstemmed	Hardware/software co-simulation is a technique that can help design and validate digital circuits controlled by embedded processors. Co-simulation has largely been applied to system-level models, and tools for SystemC or SystemVerilog are readily available, but they are either not compatible or very cumbersome to use with VHDL, the most commonly used language for FPGA design. This paper presents a direct, simple-to-use solution to co-simulate a VHDL design together with the firmware (FW) that controls it. It aims to bring the power of co-simulation to every digital designer, so it uses open-source tools, and the developed code is also open. A small patch applied to the QEMU emulator allows it to communicate with a custom-written VHDL module that exposes a CPU bus to the digital design, controlled by the FW emulated in QEMU. No changes to FW code or VHDL device code are required: with our approach, it is possible to co-simulate the very same code base that would then be implemented into an FPGA, enabling debugging, verification, and tracing capabilities that would not be possible even with the real hardware.
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title_short	Open-Source HW/SW Co-Simulation Using QEMU and GHDL for VHDL-Based SoC Design
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