Truncated squarer with minimum mean-square error
Squaring is an important arithmetic operation required in a multitude of applications. In this paper we present a truncated squarer that, with an n-bit input, produces its output on a number of bits that can be defined at design time in the [n,2n] range. For each configuration, some of the partial p...
Ausführliche Beschreibung
Gespeichert in:
| Autor*in: |
Petra, Nicola [verfasserIn] |
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E-Artikel |
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| Sprache: |
Englisch |
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2014transfer abstract |
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6 |
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Enthalten in: Changes in Cardiorespiratory Fitness and Survival in Patients With or Without Cardiovascular Disease - Kokkinos, Peter ELSEVIER, 2023, Amsterdam [u.a.] |
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| Übergeordnetes Werk: |
volume:45 ; year:2014 ; number:6 ; pages:799-804 ; extent:6 |
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10.1016/j.mejo.2014.02.018 |
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| 520 | |a Squaring is an important arithmetic operation required in a multitude of applications. In this paper we present a truncated squarer that, with an n-bit input, produces its output on a number of bits that can be defined at design time in the [n,2n] range. For each configuration, some of the partial products are unformed, to reduce area and power, and error compensation function is introduced to minimize the mean-square error. As shown by synthesis results in 90nm CMOS, the proposed squarer has similar hardware complexity as previously proposed architectures but provides lower approximation error. | ||
| 520 | |a Squaring is an important arithmetic operation required in a multitude of applications. In this paper we present a truncated squarer that, with an n-bit input, produces its output on a number of bits that can be defined at design time in the [n,2n] range. For each configuration, some of the partial products are unformed, to reduce area and power, and error compensation function is introduced to minimize the mean-square error. As shown by synthesis results in 90nm CMOS, the proposed squarer has similar hardware complexity as previously proposed architectures but provides lower approximation error. | ||
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10.1016/j.mejo.2014.02.018 doi GBVA2014022000013.pica (DE-627)ELV023152664 (ELSEVIER)S0026-2692(14)00055-X DE-627 ger DE-627 rakwb eng 620 620 DE-600 610 VZ 44.85 bkl Petra, Nicola verfasserin aut Truncated squarer with minimum mean-square error 2014transfer abstract 6 nicht spezifiziert zzz rdacontent nicht spezifiziert z rdamedia nicht spezifiziert zu rdacarrier Squaring is an important arithmetic operation required in a multitude of applications. In this paper we present a truncated squarer that, with an n-bit input, produces its output on a number of bits that can be defined at design time in the [n,2n] range. For each configuration, some of the partial products are unformed, to reduce area and power, and error compensation function is introduced to minimize the mean-square error. As shown by synthesis results in 90nm CMOS, the proposed squarer has similar hardware complexity as previously proposed architectures but provides lower approximation error. Squaring is an important arithmetic operation required in a multitude of applications. In this paper we present a truncated squarer that, with an n-bit input, produces its output on a number of bits that can be defined at design time in the [n,2n] range. For each configuration, some of the partial products are unformed, to reduce area and power, and error compensation function is introduced to minimize the mean-square error. As shown by synthesis results in 90nm CMOS, the proposed squarer has similar hardware complexity as previously proposed architectures but provides lower approximation error. Truncated multiplier Elsevier Squarer Elsevier Computer arithmetic Elsevier VLSI systems Elsevier De Caro, Davide oth Garofalo, Valeria oth Napoli, Ettore oth Strollo, Antonio G.M. oth Enthalten in Elsevier Science Kokkinos, Peter ELSEVIER Changes in Cardiorespiratory Fitness and Survival in Patients With or Without Cardiovascular Disease 2023 Amsterdam [u.a.] (DE-627)ELV009440992 volume:45 year:2014 number:6 pages:799-804 extent:6 https://doi.org/10.1016/j.mejo.2014.02.018 Volltext GBV_USEFLAG_U GBV_ELV SYSFLAG_U 44.85 Kardiologie Angiologie VZ AR 45 2014 6 799-804 6 045F 620 |
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10.1016/j.mejo.2014.02.018 doi GBVA2014022000013.pica (DE-627)ELV023152664 (ELSEVIER)S0026-2692(14)00055-X DE-627 ger DE-627 rakwb eng 620 620 DE-600 610 VZ 44.85 bkl Petra, Nicola verfasserin aut Truncated squarer with minimum mean-square error 2014transfer abstract 6 nicht spezifiziert zzz rdacontent nicht spezifiziert z rdamedia nicht spezifiziert zu rdacarrier Squaring is an important arithmetic operation required in a multitude of applications. In this paper we present a truncated squarer that, with an n-bit input, produces its output on a number of bits that can be defined at design time in the [n,2n] range. For each configuration, some of the partial products are unformed, to reduce area and power, and error compensation function is introduced to minimize the mean-square error. As shown by synthesis results in 90nm CMOS, the proposed squarer has similar hardware complexity as previously proposed architectures but provides lower approximation error. Squaring is an important arithmetic operation required in a multitude of applications. In this paper we present a truncated squarer that, with an n-bit input, produces its output on a number of bits that can be defined at design time in the [n,2n] range. For each configuration, some of the partial products are unformed, to reduce area and power, and error compensation function is introduced to minimize the mean-square error. As shown by synthesis results in 90nm CMOS, the proposed squarer has similar hardware complexity as previously proposed architectures but provides lower approximation error. Truncated multiplier Elsevier Squarer Elsevier Computer arithmetic Elsevier VLSI systems Elsevier De Caro, Davide oth Garofalo, Valeria oth Napoli, Ettore oth Strollo, Antonio G.M. oth Enthalten in Elsevier Science Kokkinos, Peter ELSEVIER Changes in Cardiorespiratory Fitness and Survival in Patients With or Without Cardiovascular Disease 2023 Amsterdam [u.a.] (DE-627)ELV009440992 volume:45 year:2014 number:6 pages:799-804 extent:6 https://doi.org/10.1016/j.mejo.2014.02.018 Volltext GBV_USEFLAG_U GBV_ELV SYSFLAG_U 44.85 Kardiologie Angiologie VZ AR 45 2014 6 799-804 6 045F 620 |
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10.1016/j.mejo.2014.02.018 doi GBVA2014022000013.pica (DE-627)ELV023152664 (ELSEVIER)S0026-2692(14)00055-X DE-627 ger DE-627 rakwb eng 620 620 DE-600 610 VZ 44.85 bkl Petra, Nicola verfasserin aut Truncated squarer with minimum mean-square error 2014transfer abstract 6 nicht spezifiziert zzz rdacontent nicht spezifiziert z rdamedia nicht spezifiziert zu rdacarrier Squaring is an important arithmetic operation required in a multitude of applications. In this paper we present a truncated squarer that, with an n-bit input, produces its output on a number of bits that can be defined at design time in the [n,2n] range. For each configuration, some of the partial products are unformed, to reduce area and power, and error compensation function is introduced to minimize the mean-square error. As shown by synthesis results in 90nm CMOS, the proposed squarer has similar hardware complexity as previously proposed architectures but provides lower approximation error. Squaring is an important arithmetic operation required in a multitude of applications. In this paper we present a truncated squarer that, with an n-bit input, produces its output on a number of bits that can be defined at design time in the [n,2n] range. For each configuration, some of the partial products are unformed, to reduce area and power, and error compensation function is introduced to minimize the mean-square error. As shown by synthesis results in 90nm CMOS, the proposed squarer has similar hardware complexity as previously proposed architectures but provides lower approximation error. Truncated multiplier Elsevier Squarer Elsevier Computer arithmetic Elsevier VLSI systems Elsevier De Caro, Davide oth Garofalo, Valeria oth Napoli, Ettore oth Strollo, Antonio G.M. oth Enthalten in Elsevier Science Kokkinos, Peter ELSEVIER Changes in Cardiorespiratory Fitness and Survival in Patients With or Without Cardiovascular Disease 2023 Amsterdam [u.a.] (DE-627)ELV009440992 volume:45 year:2014 number:6 pages:799-804 extent:6 https://doi.org/10.1016/j.mejo.2014.02.018 Volltext GBV_USEFLAG_U GBV_ELV SYSFLAG_U 44.85 Kardiologie Angiologie VZ AR 45 2014 6 799-804 6 045F 620 |
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| abstract |
Squaring is an important arithmetic operation required in a multitude of applications. In this paper we present a truncated squarer that, with an n-bit input, produces its output on a number of bits that can be defined at design time in the [n,2n] range. For each configuration, some of the partial products are unformed, to reduce area and power, and error compensation function is introduced to minimize the mean-square error. As shown by synthesis results in 90nm CMOS, the proposed squarer has similar hardware complexity as previously proposed architectures but provides lower approximation error. |
| abstractGer |
Squaring is an important arithmetic operation required in a multitude of applications. In this paper we present a truncated squarer that, with an n-bit input, produces its output on a number of bits that can be defined at design time in the [n,2n] range. For each configuration, some of the partial products are unformed, to reduce area and power, and error compensation function is introduced to minimize the mean-square error. As shown by synthesis results in 90nm CMOS, the proposed squarer has similar hardware complexity as previously proposed architectures but provides lower approximation error. |
| abstract_unstemmed |
Squaring is an important arithmetic operation required in a multitude of applications. In this paper we present a truncated squarer that, with an n-bit input, produces its output on a number of bits that can be defined at design time in the [n,2n] range. For each configuration, some of the partial products are unformed, to reduce area and power, and error compensation function is introduced to minimize the mean-square error. As shown by synthesis results in 90nm CMOS, the proposed squarer has similar hardware complexity as previously proposed architectures but provides lower approximation error. |
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| container_issue |
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| title_short |
Truncated squarer with minimum mean-square error |
| url |
https://doi.org/10.1016/j.mejo.2014.02.018 |
| remote_bool |
true |
| author2 |
De Caro, Davide Garofalo, Valeria Napoli, Ettore Strollo, Antonio G.M. |
| author2Str |
De Caro, Davide Garofalo, Valeria Napoli, Ettore Strollo, Antonio G.M. |
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| doi_str |
10.1016/j.mejo.2014.02.018 |
| up_date |
2024-07-06T18:08:02.565Z |
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| score |
7.398039 |