iCETD: An improved tag generation design for memory data authentication in embedded processor systems
Security becomes increasingly important in computing systems. Data integrity is of utmost importance. One way to protect data integrity is attaching an identifying tag to individual data. The authenticity of the data can then be checked against its tag. If the data is altered by the adversary, the r...
Ausführliche Beschreibung
Autor*in: |
Liu, Tao [verfasserIn] |
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Englisch |
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2017transfer abstract |
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Umfang: |
9 |
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Übergeordnetes Werk: |
Enthalten in: Functional evaluation of vandetanib metabolism by CYP3A4 variants and potential drug interactions - Han, Mingming ELSEVIER, 2021, Amsterdam [u.a.] |
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Übergeordnetes Werk: |
volume:56 ; year:2017 ; pages:96-104 ; extent:9 |
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DOI / URN: |
10.1016/j.vlsi.2016.10.006 |
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520 | |a Security becomes increasingly important in computing systems. Data integrity is of utmost importance. One way to protect data integrity is attaching an identifying tag to individual data. The authenticity of the data can then be checked against its tag. If the data is altered by the adversary, the related tag becomes invalid and the attack will be detected. The work presented in this paper studies an existing tag design (CETD) for authenticating memory data in embedded processor systems, where data that are stored in the memory or transferred over the bus can be tampered. Compared to other designs, this design offers the flexibility of trading-off between the implementation cost and tag size (hence the level of security); the design is cost effective and can counter the data integrity attack with random values (namely the fake values used to replace the valid data in the attack are random). However, we find that the design is vulnerable when the fake data is not randomly selected. For some data, their tags are not distributed over the full tag value space but rather limited to a much reduced set of values. When those values were chosen as the fake value, the data alteration would likely go undetected. In this article, we analytically investigate this problem and propose a low cost enhancement to ensure the full-range distribution of tag values for each data, hence effectively removing the vulnerability of the original design. | ||
520 | |a Security becomes increasingly important in computing systems. Data integrity is of utmost importance. One way to protect data integrity is attaching an identifying tag to individual data. The authenticity of the data can then be checked against its tag. If the data is altered by the adversary, the related tag becomes invalid and the attack will be detected. The work presented in this paper studies an existing tag design (CETD) for authenticating memory data in embedded processor systems, where data that are stored in the memory or transferred over the bus can be tampered. Compared to other designs, this design offers the flexibility of trading-off between the implementation cost and tag size (hence the level of security); the design is cost effective and can counter the data integrity attack with random values (namely the fake values used to replace the valid data in the attack are random). However, we find that the design is vulnerable when the fake data is not randomly selected. For some data, their tags are not distributed over the full tag value space but rather limited to a much reduced set of values. When those values were chosen as the fake value, the data alteration would likely go undetected. In this article, we analytically investigate this problem and propose a low cost enhancement to ensure the full-range distribution of tag values for each data, hence effectively removing the vulnerability of the original design. | ||
650 | 7 | |a Low cost embedded systems |2 Elsevier | |
650 | 7 | |a Tag design |2 Elsevier | |
650 | 7 | |a Memory data authentication |2 Elsevier | |
700 | 1 | |a Guo, Hui |4 oth | |
700 | 1 | |a Parameswaran, Sri |4 oth | |
700 | 1 | |a Hu, Sharon X. |4 oth | |
773 | 0 | 8 | |i Enthalten in |n Elsevier Science |a Han, Mingming ELSEVIER |t Functional evaluation of vandetanib metabolism by CYP3A4 variants and potential drug interactions |d 2021 |g Amsterdam [u.a.] |w (DE-627)ELV006836798 |
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10.1016/j.vlsi.2016.10.006 doi GBVA2017004000020.pica (DE-627)ELV035722312 (ELSEVIER)S0167-9260(16)30085-2 DE-627 ger DE-627 rakwb eng 510 510 DE-600 570 540 VZ BIODIV DE-30 fid PHARM DE-84 fid 35.70 bkl 44.39 bkl Liu, Tao verfasserin aut iCETD: An improved tag generation design for memory data authentication in embedded processor systems 2017transfer abstract 9 nicht spezifiziert zzz rdacontent nicht spezifiziert z rdamedia nicht spezifiziert zu rdacarrier Security becomes increasingly important in computing systems. Data integrity is of utmost importance. One way to protect data integrity is attaching an identifying tag to individual data. The authenticity of the data can then be checked against its tag. If the data is altered by the adversary, the related tag becomes invalid and the attack will be detected. The work presented in this paper studies an existing tag design (CETD) for authenticating memory data in embedded processor systems, where data that are stored in the memory or transferred over the bus can be tampered. Compared to other designs, this design offers the flexibility of trading-off between the implementation cost and tag size (hence the level of security); the design is cost effective and can counter the data integrity attack with random values (namely the fake values used to replace the valid data in the attack are random). However, we find that the design is vulnerable when the fake data is not randomly selected. For some data, their tags are not distributed over the full tag value space but rather limited to a much reduced set of values. When those values were chosen as the fake value, the data alteration would likely go undetected. In this article, we analytically investigate this problem and propose a low cost enhancement to ensure the full-range distribution of tag values for each data, hence effectively removing the vulnerability of the original design. Security becomes increasingly important in computing systems. Data integrity is of utmost importance. One way to protect data integrity is attaching an identifying tag to individual data. The authenticity of the data can then be checked against its tag. If the data is altered by the adversary, the related tag becomes invalid and the attack will be detected. The work presented in this paper studies an existing tag design (CETD) for authenticating memory data in embedded processor systems, where data that are stored in the memory or transferred over the bus can be tampered. Compared to other designs, this design offers the flexibility of trading-off between the implementation cost and tag size (hence the level of security); the design is cost effective and can counter the data integrity attack with random values (namely the fake values used to replace the valid data in the attack are random). However, we find that the design is vulnerable when the fake data is not randomly selected. For some data, their tags are not distributed over the full tag value space but rather limited to a much reduced set of values. When those values were chosen as the fake value, the data alteration would likely go undetected. In this article, we analytically investigate this problem and propose a low cost enhancement to ensure the full-range distribution of tag values for each data, hence effectively removing the vulnerability of the original design. Low cost embedded systems Elsevier Tag design Elsevier Memory data authentication Elsevier Guo, Hui oth Parameswaran, Sri oth Hu, Sharon X. oth Enthalten in Elsevier Science Han, Mingming ELSEVIER Functional evaluation of vandetanib metabolism by CYP3A4 variants and potential drug interactions 2021 Amsterdam [u.a.] (DE-627)ELV006836798 volume:56 year:2017 pages:96-104 extent:9 https://doi.org/10.1016/j.vlsi.2016.10.006 Volltext GBV_USEFLAG_U GBV_ELV SYSFLAG_U FID-BIODIV FID-PHARM SSG-OLC-PHA SSG-OPC-PHA 35.70 Biochemie: Allgemeines VZ 44.39 Toxikologie VZ AR 56 2017 96-104 9 045F 510 |
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10.1016/j.vlsi.2016.10.006 doi GBVA2017004000020.pica (DE-627)ELV035722312 (ELSEVIER)S0167-9260(16)30085-2 DE-627 ger DE-627 rakwb eng 510 510 DE-600 570 540 VZ BIODIV DE-30 fid PHARM DE-84 fid 35.70 bkl 44.39 bkl Liu, Tao verfasserin aut iCETD: An improved tag generation design for memory data authentication in embedded processor systems 2017transfer abstract 9 nicht spezifiziert zzz rdacontent nicht spezifiziert z rdamedia nicht spezifiziert zu rdacarrier Security becomes increasingly important in computing systems. Data integrity is of utmost importance. One way to protect data integrity is attaching an identifying tag to individual data. The authenticity of the data can then be checked against its tag. If the data is altered by the adversary, the related tag becomes invalid and the attack will be detected. The work presented in this paper studies an existing tag design (CETD) for authenticating memory data in embedded processor systems, where data that are stored in the memory or transferred over the bus can be tampered. Compared to other designs, this design offers the flexibility of trading-off between the implementation cost and tag size (hence the level of security); the design is cost effective and can counter the data integrity attack with random values (namely the fake values used to replace the valid data in the attack are random). However, we find that the design is vulnerable when the fake data is not randomly selected. For some data, their tags are not distributed over the full tag value space but rather limited to a much reduced set of values. When those values were chosen as the fake value, the data alteration would likely go undetected. In this article, we analytically investigate this problem and propose a low cost enhancement to ensure the full-range distribution of tag values for each data, hence effectively removing the vulnerability of the original design. Security becomes increasingly important in computing systems. Data integrity is of utmost importance. One way to protect data integrity is attaching an identifying tag to individual data. The authenticity of the data can then be checked against its tag. If the data is altered by the adversary, the related tag becomes invalid and the attack will be detected. The work presented in this paper studies an existing tag design (CETD) for authenticating memory data in embedded processor systems, where data that are stored in the memory or transferred over the bus can be tampered. Compared to other designs, this design offers the flexibility of trading-off between the implementation cost and tag size (hence the level of security); the design is cost effective and can counter the data integrity attack with random values (namely the fake values used to replace the valid data in the attack are random). However, we find that the design is vulnerable when the fake data is not randomly selected. For some data, their tags are not distributed over the full tag value space but rather limited to a much reduced set of values. When those values were chosen as the fake value, the data alteration would likely go undetected. In this article, we analytically investigate this problem and propose a low cost enhancement to ensure the full-range distribution of tag values for each data, hence effectively removing the vulnerability of the original design. Low cost embedded systems Elsevier Tag design Elsevier Memory data authentication Elsevier Guo, Hui oth Parameswaran, Sri oth Hu, Sharon X. oth Enthalten in Elsevier Science Han, Mingming ELSEVIER Functional evaluation of vandetanib metabolism by CYP3A4 variants and potential drug interactions 2021 Amsterdam [u.a.] (DE-627)ELV006836798 volume:56 year:2017 pages:96-104 extent:9 https://doi.org/10.1016/j.vlsi.2016.10.006 Volltext GBV_USEFLAG_U GBV_ELV SYSFLAG_U FID-BIODIV FID-PHARM SSG-OLC-PHA SSG-OPC-PHA 35.70 Biochemie: Allgemeines VZ 44.39 Toxikologie VZ AR 56 2017 96-104 9 045F 510 |
allfields_unstemmed |
10.1016/j.vlsi.2016.10.006 doi GBVA2017004000020.pica (DE-627)ELV035722312 (ELSEVIER)S0167-9260(16)30085-2 DE-627 ger DE-627 rakwb eng 510 510 DE-600 570 540 VZ BIODIV DE-30 fid PHARM DE-84 fid 35.70 bkl 44.39 bkl Liu, Tao verfasserin aut iCETD: An improved tag generation design for memory data authentication in embedded processor systems 2017transfer abstract 9 nicht spezifiziert zzz rdacontent nicht spezifiziert z rdamedia nicht spezifiziert zu rdacarrier Security becomes increasingly important in computing systems. Data integrity is of utmost importance. One way to protect data integrity is attaching an identifying tag to individual data. The authenticity of the data can then be checked against its tag. If the data is altered by the adversary, the related tag becomes invalid and the attack will be detected. The work presented in this paper studies an existing tag design (CETD) for authenticating memory data in embedded processor systems, where data that are stored in the memory or transferred over the bus can be tampered. Compared to other designs, this design offers the flexibility of trading-off between the implementation cost and tag size (hence the level of security); the design is cost effective and can counter the data integrity attack with random values (namely the fake values used to replace the valid data in the attack are random). However, we find that the design is vulnerable when the fake data is not randomly selected. For some data, their tags are not distributed over the full tag value space but rather limited to a much reduced set of values. When those values were chosen as the fake value, the data alteration would likely go undetected. In this article, we analytically investigate this problem and propose a low cost enhancement to ensure the full-range distribution of tag values for each data, hence effectively removing the vulnerability of the original design. Security becomes increasingly important in computing systems. Data integrity is of utmost importance. One way to protect data integrity is attaching an identifying tag to individual data. The authenticity of the data can then be checked against its tag. If the data is altered by the adversary, the related tag becomes invalid and the attack will be detected. The work presented in this paper studies an existing tag design (CETD) for authenticating memory data in embedded processor systems, where data that are stored in the memory or transferred over the bus can be tampered. Compared to other designs, this design offers the flexibility of trading-off between the implementation cost and tag size (hence the level of security); the design is cost effective and can counter the data integrity attack with random values (namely the fake values used to replace the valid data in the attack are random). However, we find that the design is vulnerable when the fake data is not randomly selected. For some data, their tags are not distributed over the full tag value space but rather limited to a much reduced set of values. When those values were chosen as the fake value, the data alteration would likely go undetected. In this article, we analytically investigate this problem and propose a low cost enhancement to ensure the full-range distribution of tag values for each data, hence effectively removing the vulnerability of the original design. Low cost embedded systems Elsevier Tag design Elsevier Memory data authentication Elsevier Guo, Hui oth Parameswaran, Sri oth Hu, Sharon X. oth Enthalten in Elsevier Science Han, Mingming ELSEVIER Functional evaluation of vandetanib metabolism by CYP3A4 variants and potential drug interactions 2021 Amsterdam [u.a.] (DE-627)ELV006836798 volume:56 year:2017 pages:96-104 extent:9 https://doi.org/10.1016/j.vlsi.2016.10.006 Volltext GBV_USEFLAG_U GBV_ELV SYSFLAG_U FID-BIODIV FID-PHARM SSG-OLC-PHA SSG-OPC-PHA 35.70 Biochemie: Allgemeines VZ 44.39 Toxikologie VZ AR 56 2017 96-104 9 045F 510 |
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10.1016/j.vlsi.2016.10.006 doi GBVA2017004000020.pica (DE-627)ELV035722312 (ELSEVIER)S0167-9260(16)30085-2 DE-627 ger DE-627 rakwb eng 510 510 DE-600 570 540 VZ BIODIV DE-30 fid PHARM DE-84 fid 35.70 bkl 44.39 bkl Liu, Tao verfasserin aut iCETD: An improved tag generation design for memory data authentication in embedded processor systems 2017transfer abstract 9 nicht spezifiziert zzz rdacontent nicht spezifiziert z rdamedia nicht spezifiziert zu rdacarrier Security becomes increasingly important in computing systems. Data integrity is of utmost importance. One way to protect data integrity is attaching an identifying tag to individual data. The authenticity of the data can then be checked against its tag. If the data is altered by the adversary, the related tag becomes invalid and the attack will be detected. The work presented in this paper studies an existing tag design (CETD) for authenticating memory data in embedded processor systems, where data that are stored in the memory or transferred over the bus can be tampered. Compared to other designs, this design offers the flexibility of trading-off between the implementation cost and tag size (hence the level of security); the design is cost effective and can counter the data integrity attack with random values (namely the fake values used to replace the valid data in the attack are random). However, we find that the design is vulnerable when the fake data is not randomly selected. For some data, their tags are not distributed over the full tag value space but rather limited to a much reduced set of values. When those values were chosen as the fake value, the data alteration would likely go undetected. In this article, we analytically investigate this problem and propose a low cost enhancement to ensure the full-range distribution of tag values for each data, hence effectively removing the vulnerability of the original design. Security becomes increasingly important in computing systems. Data integrity is of utmost importance. One way to protect data integrity is attaching an identifying tag to individual data. The authenticity of the data can then be checked against its tag. If the data is altered by the adversary, the related tag becomes invalid and the attack will be detected. The work presented in this paper studies an existing tag design (CETD) for authenticating memory data in embedded processor systems, where data that are stored in the memory or transferred over the bus can be tampered. Compared to other designs, this design offers the flexibility of trading-off between the implementation cost and tag size (hence the level of security); the design is cost effective and can counter the data integrity attack with random values (namely the fake values used to replace the valid data in the attack are random). However, we find that the design is vulnerable when the fake data is not randomly selected. For some data, their tags are not distributed over the full tag value space but rather limited to a much reduced set of values. When those values were chosen as the fake value, the data alteration would likely go undetected. In this article, we analytically investigate this problem and propose a low cost enhancement to ensure the full-range distribution of tag values for each data, hence effectively removing the vulnerability of the original design. Low cost embedded systems Elsevier Tag design Elsevier Memory data authentication Elsevier Guo, Hui oth Parameswaran, Sri oth Hu, Sharon X. oth Enthalten in Elsevier Science Han, Mingming ELSEVIER Functional evaluation of vandetanib metabolism by CYP3A4 variants and potential drug interactions 2021 Amsterdam [u.a.] (DE-627)ELV006836798 volume:56 year:2017 pages:96-104 extent:9 https://doi.org/10.1016/j.vlsi.2016.10.006 Volltext GBV_USEFLAG_U GBV_ELV SYSFLAG_U FID-BIODIV FID-PHARM SSG-OLC-PHA SSG-OPC-PHA 35.70 Biochemie: Allgemeines VZ 44.39 Toxikologie VZ AR 56 2017 96-104 9 045F 510 |
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10.1016/j.vlsi.2016.10.006 doi GBVA2017004000020.pica (DE-627)ELV035722312 (ELSEVIER)S0167-9260(16)30085-2 DE-627 ger DE-627 rakwb eng 510 510 DE-600 570 540 VZ BIODIV DE-30 fid PHARM DE-84 fid 35.70 bkl 44.39 bkl Liu, Tao verfasserin aut iCETD: An improved tag generation design for memory data authentication in embedded processor systems 2017transfer abstract 9 nicht spezifiziert zzz rdacontent nicht spezifiziert z rdamedia nicht spezifiziert zu rdacarrier Security becomes increasingly important in computing systems. Data integrity is of utmost importance. One way to protect data integrity is attaching an identifying tag to individual data. The authenticity of the data can then be checked against its tag. If the data is altered by the adversary, the related tag becomes invalid and the attack will be detected. The work presented in this paper studies an existing tag design (CETD) for authenticating memory data in embedded processor systems, where data that are stored in the memory or transferred over the bus can be tampered. Compared to other designs, this design offers the flexibility of trading-off between the implementation cost and tag size (hence the level of security); the design is cost effective and can counter the data integrity attack with random values (namely the fake values used to replace the valid data in the attack are random). However, we find that the design is vulnerable when the fake data is not randomly selected. For some data, their tags are not distributed over the full tag value space but rather limited to a much reduced set of values. When those values were chosen as the fake value, the data alteration would likely go undetected. In this article, we analytically investigate this problem and propose a low cost enhancement to ensure the full-range distribution of tag values for each data, hence effectively removing the vulnerability of the original design. Security becomes increasingly important in computing systems. Data integrity is of utmost importance. One way to protect data integrity is attaching an identifying tag to individual data. The authenticity of the data can then be checked against its tag. If the data is altered by the adversary, the related tag becomes invalid and the attack will be detected. The work presented in this paper studies an existing tag design (CETD) for authenticating memory data in embedded processor systems, where data that are stored in the memory or transferred over the bus can be tampered. Compared to other designs, this design offers the flexibility of trading-off between the implementation cost and tag size (hence the level of security); the design is cost effective and can counter the data integrity attack with random values (namely the fake values used to replace the valid data in the attack are random). However, we find that the design is vulnerable when the fake data is not randomly selected. For some data, their tags are not distributed over the full tag value space but rather limited to a much reduced set of values. When those values were chosen as the fake value, the data alteration would likely go undetected. In this article, we analytically investigate this problem and propose a low cost enhancement to ensure the full-range distribution of tag values for each data, hence effectively removing the vulnerability of the original design. Low cost embedded systems Elsevier Tag design Elsevier Memory data authentication Elsevier Guo, Hui oth Parameswaran, Sri oth Hu, Sharon X. oth Enthalten in Elsevier Science Han, Mingming ELSEVIER Functional evaluation of vandetanib metabolism by CYP3A4 variants and potential drug interactions 2021 Amsterdam [u.a.] (DE-627)ELV006836798 volume:56 year:2017 pages:96-104 extent:9 https://doi.org/10.1016/j.vlsi.2016.10.006 Volltext GBV_USEFLAG_U GBV_ELV SYSFLAG_U FID-BIODIV FID-PHARM SSG-OLC-PHA SSG-OPC-PHA 35.70 Biochemie: Allgemeines VZ 44.39 Toxikologie VZ AR 56 2017 96-104 9 045F 510 |
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iCETD: An improved tag generation design for memory data authentication in embedded processor systems |
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Security becomes increasingly important in computing systems. Data integrity is of utmost importance. One way to protect data integrity is attaching an identifying tag to individual data. The authenticity of the data can then be checked against its tag. If the data is altered by the adversary, the related tag becomes invalid and the attack will be detected. The work presented in this paper studies an existing tag design (CETD) for authenticating memory data in embedded processor systems, where data that are stored in the memory or transferred over the bus can be tampered. Compared to other designs, this design offers the flexibility of trading-off between the implementation cost and tag size (hence the level of security); the design is cost effective and can counter the data integrity attack with random values (namely the fake values used to replace the valid data in the attack are random). However, we find that the design is vulnerable when the fake data is not randomly selected. For some data, their tags are not distributed over the full tag value space but rather limited to a much reduced set of values. When those values were chosen as the fake value, the data alteration would likely go undetected. In this article, we analytically investigate this problem and propose a low cost enhancement to ensure the full-range distribution of tag values for each data, hence effectively removing the vulnerability of the original design. |
abstractGer |
Security becomes increasingly important in computing systems. Data integrity is of utmost importance. One way to protect data integrity is attaching an identifying tag to individual data. The authenticity of the data can then be checked against its tag. If the data is altered by the adversary, the related tag becomes invalid and the attack will be detected. The work presented in this paper studies an existing tag design (CETD) for authenticating memory data in embedded processor systems, where data that are stored in the memory or transferred over the bus can be tampered. Compared to other designs, this design offers the flexibility of trading-off between the implementation cost and tag size (hence the level of security); the design is cost effective and can counter the data integrity attack with random values (namely the fake values used to replace the valid data in the attack are random). However, we find that the design is vulnerable when the fake data is not randomly selected. For some data, their tags are not distributed over the full tag value space but rather limited to a much reduced set of values. When those values were chosen as the fake value, the data alteration would likely go undetected. In this article, we analytically investigate this problem and propose a low cost enhancement to ensure the full-range distribution of tag values for each data, hence effectively removing the vulnerability of the original design. |
abstract_unstemmed |
Security becomes increasingly important in computing systems. Data integrity is of utmost importance. One way to protect data integrity is attaching an identifying tag to individual data. The authenticity of the data can then be checked against its tag. If the data is altered by the adversary, the related tag becomes invalid and the attack will be detected. The work presented in this paper studies an existing tag design (CETD) for authenticating memory data in embedded processor systems, where data that are stored in the memory or transferred over the bus can be tampered. Compared to other designs, this design offers the flexibility of trading-off between the implementation cost and tag size (hence the level of security); the design is cost effective and can counter the data integrity attack with random values (namely the fake values used to replace the valid data in the attack are random). However, we find that the design is vulnerable when the fake data is not randomly selected. For some data, their tags are not distributed over the full tag value space but rather limited to a much reduced set of values. When those values were chosen as the fake value, the data alteration would likely go undetected. In this article, we analytically investigate this problem and propose a low cost enhancement to ensure the full-range distribution of tag values for each data, hence effectively removing the vulnerability of the original design. |
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iCETD: An improved tag generation design for memory data authentication in embedded processor systems |
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