A 12-bit single slope ADC with multi-step structure and ramp calibration technique for image sensors

This paper presents a novel multi-step single slope analog to digital converter (MS SS ADC). The proposed ADC splits the 12-bit conversion into 3 steps, including 1-bit half section decision, 4-bit coarse conversion, and finally 8-bit fine conversion with 1-bit redundancy. The conversion step is sub...
Ausführliche Beschreibung

Gespeichert in:

Autor*in:	Li, Hao [verfasserIn] Liu, Dongsheng [verfasserIn] Liang, Yingxiang [verfasserIn] Hu, Ang [verfasserIn] Nie, Zheng [verfasserIn] Zhang, Chengcheng [verfasserIn] Li, Kaiyue [verfasserIn] Niu, Guangda [verfasserIn] Gao, Liang [verfasserIn] Tang, Jiang [verfasserIn]

Format:	E-Artikel
Sprache:	Englisch

Erschienen:	2023

Schlagwörter:	Image sensor Multi-step ADC Ramp generator Ramp calibration technique SS ADC

Übergeordnetes Werk:	Enthalten in: Microelectronics journal - Amsterdam [u.a.] : Elsevier Science, 1989, 139
Übergeordnetes Werk:	volume:139

DOI / URN:	10.1016/j.mejo.2023.105919

Katalog-ID:	ELV062320459

Internformat


LEADER	01000caa a22002652 4500
001	ELV062320459
003	DE-627
005	20230927072139.0
007	cr uuu---uuuuu
008	230829s2023 xx \|\|\|\|\|o 00\| \|\|eng c
024	7		\|a 10.1016/j.mejo.2023.105919 \|2 doi
035			\|a (DE-627)ELV062320459
035			\|a (ELSEVIER)S0026-2692(23)00232-X
040			\|a DE-627 \|b ger \|c DE-627 \|e rda
041			\|a eng
082	0	4	\|a 620 \|q VZ
084			\|a 53.55 \|2 bkl
084			\|a 53.52 \|2 bkl
084			\|a 33.61 \|2 bkl
084			\|a 33.72 \|2 bkl
100	1		\|a Li, Hao \|e verfasserin \|4 aut
245	1	0	\|a A 12-bit single slope ADC with multi-step structure and ramp calibration technique for image sensors
264		1	\|c 2023
336			\|a nicht spezifiziert \|b zzz \|2 rdacontent
337			\|a Computermedien \|b c \|2 rdamedia
338			\|a Online-Ressource \|b cr \|2 rdacarrier
520			\|a This paper presents a novel multi-step single slope analog to digital converter (MS SS ADC). The proposed ADC splits the 12-bit conversion into 3 steps, including 1-bit half section decision, 4-bit coarse conversion, and finally 8-bit fine conversion with 1-bit redundancy. The conversion step is substantially reduced from conventional 4096 to 276. The linearity of the ADC is guaranteed by a stable common mode voltage of the comparator varying only within 31.25 mV. Moreover, two high-accuracy ramp calibration techniques are utilized to correct the current variation in the fine ramp and the slope error between the coarse and fine ramps. A hybrid comparator is utilized in the ADC to save power while maintaining the performance. The ADC is designed and simulated in 0.18 μm CMOS process with 7.5 μm width. The differential nonlinearity and integral nonlinearity of the proposed ADC are reduced from +0.3/-1 LSB and +3.1/-2.55 LSB to +0.3/-0.3 LSB and +1/-0.45 LSB at 61.7 kS/s sample rate by the calibrations.
650		4	\|a Image sensor
650		4	\|a Multi-step ADC
650		4	\|a Ramp generator
650		4	\|a Ramp calibration technique
650		4	\|a SS ADC
700	1		\|a Liu, Dongsheng \|e verfasserin \|4 aut
700	1		\|a Liang, Yingxiang \|e verfasserin \|4 aut
700	1		\|a Hu, Ang \|e verfasserin \|4 aut
700	1		\|a Nie, Zheng \|e verfasserin \|4 aut
700	1		\|a Zhang, Chengcheng \|e verfasserin \|4 aut
700	1		\|a Li, Kaiyue \|e verfasserin \|4 aut
700	1		\|a Niu, Guangda \|e verfasserin \|4 aut
700	1		\|a Gao, Liang \|e verfasserin \|4 aut
700	1		\|a Tang, Jiang \|e verfasserin \|4 aut
773	0	8	\|i Enthalten in \|t Microelectronics journal \|d Amsterdam [u.a.] : Elsevier Science, 1989 \|g 139 \|h Online-Ressource \|w (DE-627)320405079 \|w (DE-600)2000567-2 \|w (DE-576)259484350 \|7 nnns
773	1	8	\|g volume:139
912			\|a GBV_USEFLAG_U
912			\|a GBV_ELV
912			\|a SYSFLAG_U
912			\|a GBV_ILN_20
912			\|a GBV_ILN_22
912			\|a GBV_ILN_23
912			\|a GBV_ILN_24
912			\|a GBV_ILN_31
912			\|a GBV_ILN_32
912			\|a GBV_ILN_40
912			\|a GBV_ILN_60
912			\|a GBV_ILN_62
912			\|a GBV_ILN_65
912			\|a GBV_ILN_69
912			\|a GBV_ILN_70
912			\|a GBV_ILN_73
912			\|a GBV_ILN_74
912			\|a GBV_ILN_90
912			\|a GBV_ILN_95
912			\|a GBV_ILN_100
912			\|a GBV_ILN_105
912			\|a GBV_ILN_110
912			\|a GBV_ILN_150
912			\|a GBV_ILN_151
912			\|a GBV_ILN_187
912			\|a GBV_ILN_213
912			\|a GBV_ILN_224
912			\|a GBV_ILN_230
912			\|a GBV_ILN_370
912			\|a GBV_ILN_602
912			\|a GBV_ILN_702
912			\|a GBV_ILN_2001
912			\|a GBV_ILN_2003
912			\|a GBV_ILN_2004
912			\|a GBV_ILN_2005
912			\|a GBV_ILN_2007
912			\|a GBV_ILN_2008
912			\|a GBV_ILN_2009
912			\|a GBV_ILN_2010
912			\|a GBV_ILN_2011
912			\|a GBV_ILN_2014
912			\|a GBV_ILN_2015
912			\|a GBV_ILN_2020
912			\|a GBV_ILN_2021
912			\|a GBV_ILN_2025
912			\|a GBV_ILN_2026
912			\|a GBV_ILN_2027
912			\|a GBV_ILN_2034
912			\|a GBV_ILN_2044
912			\|a GBV_ILN_2048
912			\|a GBV_ILN_2049
912			\|a GBV_ILN_2050
912			\|a GBV_ILN_2055
912			\|a GBV_ILN_2056
912			\|a GBV_ILN_2059
912			\|a GBV_ILN_2061
912			\|a GBV_ILN_2064
912			\|a GBV_ILN_2088
912			\|a GBV_ILN_2106
912			\|a GBV_ILN_2110
912			\|a GBV_ILN_2111
912			\|a GBV_ILN_2112
912			\|a GBV_ILN_2122
912			\|a GBV_ILN_2129
912			\|a GBV_ILN_2143
912			\|a GBV_ILN_2152
912			\|a GBV_ILN_2153
912			\|a GBV_ILN_2190
912			\|a GBV_ILN_2232
912			\|a GBV_ILN_2336
912			\|a GBV_ILN_2470
912			\|a GBV_ILN_2507
912			\|a GBV_ILN_4035
912			\|a GBV_ILN_4037
912			\|a GBV_ILN_4112
912			\|a GBV_ILN_4125
912			\|a GBV_ILN_4242
912			\|a GBV_ILN_4249
912			\|a GBV_ILN_4251
912			\|a GBV_ILN_4305
912			\|a GBV_ILN_4306
912			\|a GBV_ILN_4307
912			\|a GBV_ILN_4313
912			\|a GBV_ILN_4322
912			\|a GBV_ILN_4323
912			\|a GBV_ILN_4324
912			\|a GBV_ILN_4325
912			\|a GBV_ILN_4326
912			\|a GBV_ILN_4333
912			\|a GBV_ILN_4334
912			\|a GBV_ILN_4338
912			\|a GBV_ILN_4393
912			\|a GBV_ILN_4700
936	b	k	\|a 53.55 \|j Mikroelektronik \|q VZ
936	b	k	\|a 53.52 \|j Elektronische Schaltungen \|q VZ
936	b	k	\|a 33.61 \|j Festkörperphysik \|q VZ
936	b	k	\|a 33.72 \|j Halbleiterphysik \|q VZ
951			\|a AR
952			\|d 139

Indexfelder

author_variant	h l hl d l dl y l yl a h ah z n zn c z cz k l kl g n gn l g lg j t jt
matchkey_str	lihaoliudongshengliangyingxianghuangniez:2023----:1btigelpacihutsesrcuenrmclbaine
hierarchy_sort_str	2023
bklnumber	53.55 53.52 33.61 33.72
publishDate	2023
allfields	10.1016/j.mejo.2023.105919 doi (DE-627)ELV062320459 (ELSEVIER)S0026-2692(23)00232-X DE-627 ger DE-627 rda eng 620 VZ 53.55 bkl 53.52 bkl 33.61 bkl 33.72 bkl Li, Hao verfasserin aut A 12-bit single slope ADC with multi-step structure and ramp calibration technique for image sensors 2023 nicht spezifiziert zzz rdacontent Computermedien c rdamedia Online-Ressource cr rdacarrier This paper presents a novel multi-step single slope analog to digital converter (MS SS ADC). The proposed ADC splits the 12-bit conversion into 3 steps, including 1-bit half section decision, 4-bit coarse conversion, and finally 8-bit fine conversion with 1-bit redundancy. The conversion step is substantially reduced from conventional 4096 to 276. The linearity of the ADC is guaranteed by a stable common mode voltage of the comparator varying only within 31.25 mV. Moreover, two high-accuracy ramp calibration techniques are utilized to correct the current variation in the fine ramp and the slope error between the coarse and fine ramps. A hybrid comparator is utilized in the ADC to save power while maintaining the performance. The ADC is designed and simulated in 0.18 μm CMOS process with 7.5 μm width. The differential nonlinearity and integral nonlinearity of the proposed ADC are reduced from +0.3/-1 LSB and +3.1/-2.55 LSB to +0.3/-0.3 LSB and +1/-0.45 LSB at 61.7 kS/s sample rate by the calibrations. Image sensor Multi-step ADC Ramp generator Ramp calibration technique SS ADC Liu, Dongsheng verfasserin aut Liang, Yingxiang verfasserin aut Hu, Ang verfasserin aut Nie, Zheng verfasserin aut Zhang, Chengcheng verfasserin aut Li, Kaiyue verfasserin aut Niu, Guangda verfasserin aut Gao, Liang verfasserin aut Tang, Jiang verfasserin aut Enthalten in Microelectronics journal Amsterdam [u.a.] : Elsevier Science, 1989 139 Online-Ressource (DE-627)320405079 (DE-600)2000567-2 (DE-576)259484350 nnns volume:139 GBV_USEFLAG_U GBV_ELV SYSFLAG_U GBV_ILN_20 GBV_ILN_22 GBV_ILN_23 GBV_ILN_24 GBV_ILN_31 GBV_ILN_32 GBV_ILN_40 GBV_ILN_60 GBV_ILN_62 GBV_ILN_65 GBV_ILN_69 GBV_ILN_70 GBV_ILN_73 GBV_ILN_74 GBV_ILN_90 GBV_ILN_95 GBV_ILN_100 GBV_ILN_105 GBV_ILN_110 GBV_ILN_150 GBV_ILN_151 GBV_ILN_187 GBV_ILN_213 GBV_ILN_224 GBV_ILN_230 GBV_ILN_370 GBV_ILN_602 GBV_ILN_702 GBV_ILN_2001 GBV_ILN_2003 GBV_ILN_2004 GBV_ILN_2005 GBV_ILN_2007 GBV_ILN_2008 GBV_ILN_2009 GBV_ILN_2010 GBV_ILN_2011 GBV_ILN_2014 GBV_ILN_2015 GBV_ILN_2020 GBV_ILN_2021 GBV_ILN_2025 GBV_ILN_2026 GBV_ILN_2027 GBV_ILN_2034 GBV_ILN_2044 GBV_ILN_2048 GBV_ILN_2049 GBV_ILN_2050 GBV_ILN_2055 GBV_ILN_2056 GBV_ILN_2059 GBV_ILN_2061 GBV_ILN_2064 GBV_ILN_2088 GBV_ILN_2106 GBV_ILN_2110 GBV_ILN_2111 GBV_ILN_2112 GBV_ILN_2122 GBV_ILN_2129 GBV_ILN_2143 GBV_ILN_2152 GBV_ILN_2153 GBV_ILN_2190 GBV_ILN_2232 GBV_ILN_2336 GBV_ILN_2470 GBV_ILN_2507 GBV_ILN_4035 GBV_ILN_4037 GBV_ILN_4112 GBV_ILN_4125 GBV_ILN_4242 GBV_ILN_4249 GBV_ILN_4251 GBV_ILN_4305 GBV_ILN_4306 GBV_ILN_4307 GBV_ILN_4313 GBV_ILN_4322 GBV_ILN_4323 GBV_ILN_4324 GBV_ILN_4325 GBV_ILN_4326 GBV_ILN_4333 GBV_ILN_4334 GBV_ILN_4338 GBV_ILN_4393 GBV_ILN_4700 53.55 Mikroelektronik VZ 53.52 Elektronische Schaltungen VZ 33.61 Festkörperphysik VZ 33.72 Halbleiterphysik VZ AR 139
spelling	10.1016/j.mejo.2023.105919 doi (DE-627)ELV062320459 (ELSEVIER)S0026-2692(23)00232-X DE-627 ger DE-627 rda eng 620 VZ 53.55 bkl 53.52 bkl 33.61 bkl 33.72 bkl Li, Hao verfasserin aut A 12-bit single slope ADC with multi-step structure and ramp calibration technique for image sensors 2023 nicht spezifiziert zzz rdacontent Computermedien c rdamedia Online-Ressource cr rdacarrier This paper presents a novel multi-step single slope analog to digital converter (MS SS ADC). The proposed ADC splits the 12-bit conversion into 3 steps, including 1-bit half section decision, 4-bit coarse conversion, and finally 8-bit fine conversion with 1-bit redundancy. The conversion step is substantially reduced from conventional 4096 to 276. The linearity of the ADC is guaranteed by a stable common mode voltage of the comparator varying only within 31.25 mV. Moreover, two high-accuracy ramp calibration techniques are utilized to correct the current variation in the fine ramp and the slope error between the coarse and fine ramps. A hybrid comparator is utilized in the ADC to save power while maintaining the performance. The ADC is designed and simulated in 0.18 μm CMOS process with 7.5 μm width. The differential nonlinearity and integral nonlinearity of the proposed ADC are reduced from +0.3/-1 LSB and +3.1/-2.55 LSB to +0.3/-0.3 LSB and +1/-0.45 LSB at 61.7 kS/s sample rate by the calibrations. Image sensor Multi-step ADC Ramp generator Ramp calibration technique SS ADC Liu, Dongsheng verfasserin aut Liang, Yingxiang verfasserin aut Hu, Ang verfasserin aut Nie, Zheng verfasserin aut Zhang, Chengcheng verfasserin aut Li, Kaiyue verfasserin aut Niu, Guangda verfasserin aut Gao, Liang verfasserin aut Tang, Jiang verfasserin aut Enthalten in Microelectronics journal Amsterdam [u.a.] : Elsevier Science, 1989 139 Online-Ressource (DE-627)320405079 (DE-600)2000567-2 (DE-576)259484350 nnns volume:139 GBV_USEFLAG_U GBV_ELV SYSFLAG_U GBV_ILN_20 GBV_ILN_22 GBV_ILN_23 GBV_ILN_24 GBV_ILN_31 GBV_ILN_32 GBV_ILN_40 GBV_ILN_60 GBV_ILN_62 GBV_ILN_65 GBV_ILN_69 GBV_ILN_70 GBV_ILN_73 GBV_ILN_74 GBV_ILN_90 GBV_ILN_95 GBV_ILN_100 GBV_ILN_105 GBV_ILN_110 GBV_ILN_150 GBV_ILN_151 GBV_ILN_187 GBV_ILN_213 GBV_ILN_224 GBV_ILN_230 GBV_ILN_370 GBV_ILN_602 GBV_ILN_702 GBV_ILN_2001 GBV_ILN_2003 GBV_ILN_2004 GBV_ILN_2005 GBV_ILN_2007 GBV_ILN_2008 GBV_ILN_2009 GBV_ILN_2010 GBV_ILN_2011 GBV_ILN_2014 GBV_ILN_2015 GBV_ILN_2020 GBV_ILN_2021 GBV_ILN_2025 GBV_ILN_2026 GBV_ILN_2027 GBV_ILN_2034 GBV_ILN_2044 GBV_ILN_2048 GBV_ILN_2049 GBV_ILN_2050 GBV_ILN_2055 GBV_ILN_2056 GBV_ILN_2059 GBV_ILN_2061 GBV_ILN_2064 GBV_ILN_2088 GBV_ILN_2106 GBV_ILN_2110 GBV_ILN_2111 GBV_ILN_2112 GBV_ILN_2122 GBV_ILN_2129 GBV_ILN_2143 GBV_ILN_2152 GBV_ILN_2153 GBV_ILN_2190 GBV_ILN_2232 GBV_ILN_2336 GBV_ILN_2470 GBV_ILN_2507 GBV_ILN_4035 GBV_ILN_4037 GBV_ILN_4112 GBV_ILN_4125 GBV_ILN_4242 GBV_ILN_4249 GBV_ILN_4251 GBV_ILN_4305 GBV_ILN_4306 GBV_ILN_4307 GBV_ILN_4313 GBV_ILN_4322 GBV_ILN_4323 GBV_ILN_4324 GBV_ILN_4325 GBV_ILN_4326 GBV_ILN_4333 GBV_ILN_4334 GBV_ILN_4338 GBV_ILN_4393 GBV_ILN_4700 53.55 Mikroelektronik VZ 53.52 Elektronische Schaltungen VZ 33.61 Festkörperphysik VZ 33.72 Halbleiterphysik VZ AR 139
allfields_unstemmed	10.1016/j.mejo.2023.105919 doi (DE-627)ELV062320459 (ELSEVIER)S0026-2692(23)00232-X DE-627 ger DE-627 rda eng 620 VZ 53.55 bkl 53.52 bkl 33.61 bkl 33.72 bkl Li, Hao verfasserin aut A 12-bit single slope ADC with multi-step structure and ramp calibration technique for image sensors 2023 nicht spezifiziert zzz rdacontent Computermedien c rdamedia Online-Ressource cr rdacarrier This paper presents a novel multi-step single slope analog to digital converter (MS SS ADC). The proposed ADC splits the 12-bit conversion into 3 steps, including 1-bit half section decision, 4-bit coarse conversion, and finally 8-bit fine conversion with 1-bit redundancy. The conversion step is substantially reduced from conventional 4096 to 276. The linearity of the ADC is guaranteed by a stable common mode voltage of the comparator varying only within 31.25 mV. Moreover, two high-accuracy ramp calibration techniques are utilized to correct the current variation in the fine ramp and the slope error between the coarse and fine ramps. A hybrid comparator is utilized in the ADC to save power while maintaining the performance. The ADC is designed and simulated in 0.18 μm CMOS process with 7.5 μm width. The differential nonlinearity and integral nonlinearity of the proposed ADC are reduced from +0.3/-1 LSB and +3.1/-2.55 LSB to +0.3/-0.3 LSB and +1/-0.45 LSB at 61.7 kS/s sample rate by the calibrations. Image sensor Multi-step ADC Ramp generator Ramp calibration technique SS ADC Liu, Dongsheng verfasserin aut Liang, Yingxiang verfasserin aut Hu, Ang verfasserin aut Nie, Zheng verfasserin aut Zhang, Chengcheng verfasserin aut Li, Kaiyue verfasserin aut Niu, Guangda verfasserin aut Gao, Liang verfasserin aut Tang, Jiang verfasserin aut Enthalten in Microelectronics journal Amsterdam [u.a.] : Elsevier Science, 1989 139 Online-Ressource (DE-627)320405079 (DE-600)2000567-2 (DE-576)259484350 nnns volume:139 GBV_USEFLAG_U GBV_ELV SYSFLAG_U GBV_ILN_20 GBV_ILN_22 GBV_ILN_23 GBV_ILN_24 GBV_ILN_31 GBV_ILN_32 GBV_ILN_40 GBV_ILN_60 GBV_ILN_62 GBV_ILN_65 GBV_ILN_69 GBV_ILN_70 GBV_ILN_73 GBV_ILN_74 GBV_ILN_90 GBV_ILN_95 GBV_ILN_100 GBV_ILN_105 GBV_ILN_110 GBV_ILN_150 GBV_ILN_151 GBV_ILN_187 GBV_ILN_213 GBV_ILN_224 GBV_ILN_230 GBV_ILN_370 GBV_ILN_602 GBV_ILN_702 GBV_ILN_2001 GBV_ILN_2003 GBV_ILN_2004 GBV_ILN_2005 GBV_ILN_2007 GBV_ILN_2008 GBV_ILN_2009 GBV_ILN_2010 GBV_ILN_2011 GBV_ILN_2014 GBV_ILN_2015 GBV_ILN_2020 GBV_ILN_2021 GBV_ILN_2025 GBV_ILN_2026 GBV_ILN_2027 GBV_ILN_2034 GBV_ILN_2044 GBV_ILN_2048 GBV_ILN_2049 GBV_ILN_2050 GBV_ILN_2055 GBV_ILN_2056 GBV_ILN_2059 GBV_ILN_2061 GBV_ILN_2064 GBV_ILN_2088 GBV_ILN_2106 GBV_ILN_2110 GBV_ILN_2111 GBV_ILN_2112 GBV_ILN_2122 GBV_ILN_2129 GBV_ILN_2143 GBV_ILN_2152 GBV_ILN_2153 GBV_ILN_2190 GBV_ILN_2232 GBV_ILN_2336 GBV_ILN_2470 GBV_ILN_2507 GBV_ILN_4035 GBV_ILN_4037 GBV_ILN_4112 GBV_ILN_4125 GBV_ILN_4242 GBV_ILN_4249 GBV_ILN_4251 GBV_ILN_4305 GBV_ILN_4306 GBV_ILN_4307 GBV_ILN_4313 GBV_ILN_4322 GBV_ILN_4323 GBV_ILN_4324 GBV_ILN_4325 GBV_ILN_4326 GBV_ILN_4333 GBV_ILN_4334 GBV_ILN_4338 GBV_ILN_4393 GBV_ILN_4700 53.55 Mikroelektronik VZ 53.52 Elektronische Schaltungen VZ 33.61 Festkörperphysik VZ 33.72 Halbleiterphysik VZ AR 139
allfieldsGer	10.1016/j.mejo.2023.105919 doi (DE-627)ELV062320459 (ELSEVIER)S0026-2692(23)00232-X DE-627 ger DE-627 rda eng 620 VZ 53.55 bkl 53.52 bkl 33.61 bkl 33.72 bkl Li, Hao verfasserin aut A 12-bit single slope ADC with multi-step structure and ramp calibration technique for image sensors 2023 nicht spezifiziert zzz rdacontent Computermedien c rdamedia Online-Ressource cr rdacarrier This paper presents a novel multi-step single slope analog to digital converter (MS SS ADC). The proposed ADC splits the 12-bit conversion into 3 steps, including 1-bit half section decision, 4-bit coarse conversion, and finally 8-bit fine conversion with 1-bit redundancy. The conversion step is substantially reduced from conventional 4096 to 276. The linearity of the ADC is guaranteed by a stable common mode voltage of the comparator varying only within 31.25 mV. Moreover, two high-accuracy ramp calibration techniques are utilized to correct the current variation in the fine ramp and the slope error between the coarse and fine ramps. A hybrid comparator is utilized in the ADC to save power while maintaining the performance. The ADC is designed and simulated in 0.18 μm CMOS process with 7.5 μm width. The differential nonlinearity and integral nonlinearity of the proposed ADC are reduced from +0.3/-1 LSB and +3.1/-2.55 LSB to +0.3/-0.3 LSB and +1/-0.45 LSB at 61.7 kS/s sample rate by the calibrations. Image sensor Multi-step ADC Ramp generator Ramp calibration technique SS ADC Liu, Dongsheng verfasserin aut Liang, Yingxiang verfasserin aut Hu, Ang verfasserin aut Nie, Zheng verfasserin aut Zhang, Chengcheng verfasserin aut Li, Kaiyue verfasserin aut Niu, Guangda verfasserin aut Gao, Liang verfasserin aut Tang, Jiang verfasserin aut Enthalten in Microelectronics journal Amsterdam [u.a.] : Elsevier Science, 1989 139 Online-Ressource (DE-627)320405079 (DE-600)2000567-2 (DE-576)259484350 nnns volume:139 GBV_USEFLAG_U GBV_ELV SYSFLAG_U GBV_ILN_20 GBV_ILN_22 GBV_ILN_23 GBV_ILN_24 GBV_ILN_31 GBV_ILN_32 GBV_ILN_40 GBV_ILN_60 GBV_ILN_62 GBV_ILN_65 GBV_ILN_69 GBV_ILN_70 GBV_ILN_73 GBV_ILN_74 GBV_ILN_90 GBV_ILN_95 GBV_ILN_100 GBV_ILN_105 GBV_ILN_110 GBV_ILN_150 GBV_ILN_151 GBV_ILN_187 GBV_ILN_213 GBV_ILN_224 GBV_ILN_230 GBV_ILN_370 GBV_ILN_602 GBV_ILN_702 GBV_ILN_2001 GBV_ILN_2003 GBV_ILN_2004 GBV_ILN_2005 GBV_ILN_2007 GBV_ILN_2008 GBV_ILN_2009 GBV_ILN_2010 GBV_ILN_2011 GBV_ILN_2014 GBV_ILN_2015 GBV_ILN_2020 GBV_ILN_2021 GBV_ILN_2025 GBV_ILN_2026 GBV_ILN_2027 GBV_ILN_2034 GBV_ILN_2044 GBV_ILN_2048 GBV_ILN_2049 GBV_ILN_2050 GBV_ILN_2055 GBV_ILN_2056 GBV_ILN_2059 GBV_ILN_2061 GBV_ILN_2064 GBV_ILN_2088 GBV_ILN_2106 GBV_ILN_2110 GBV_ILN_2111 GBV_ILN_2112 GBV_ILN_2122 GBV_ILN_2129 GBV_ILN_2143 GBV_ILN_2152 GBV_ILN_2153 GBV_ILN_2190 GBV_ILN_2232 GBV_ILN_2336 GBV_ILN_2470 GBV_ILN_2507 GBV_ILN_4035 GBV_ILN_4037 GBV_ILN_4112 GBV_ILN_4125 GBV_ILN_4242 GBV_ILN_4249 GBV_ILN_4251 GBV_ILN_4305 GBV_ILN_4306 GBV_ILN_4307 GBV_ILN_4313 GBV_ILN_4322 GBV_ILN_4323 GBV_ILN_4324 GBV_ILN_4325 GBV_ILN_4326 GBV_ILN_4333 GBV_ILN_4334 GBV_ILN_4338 GBV_ILN_4393 GBV_ILN_4700 53.55 Mikroelektronik VZ 53.52 Elektronische Schaltungen VZ 33.61 Festkörperphysik VZ 33.72 Halbleiterphysik VZ AR 139
allfieldsSound	10.1016/j.mejo.2023.105919 doi (DE-627)ELV062320459 (ELSEVIER)S0026-2692(23)00232-X DE-627 ger DE-627 rda eng 620 VZ 53.55 bkl 53.52 bkl 33.61 bkl 33.72 bkl Li, Hao verfasserin aut A 12-bit single slope ADC with multi-step structure and ramp calibration technique for image sensors 2023 nicht spezifiziert zzz rdacontent Computermedien c rdamedia Online-Ressource cr rdacarrier This paper presents a novel multi-step single slope analog to digital converter (MS SS ADC). The proposed ADC splits the 12-bit conversion into 3 steps, including 1-bit half section decision, 4-bit coarse conversion, and finally 8-bit fine conversion with 1-bit redundancy. The conversion step is substantially reduced from conventional 4096 to 276. The linearity of the ADC is guaranteed by a stable common mode voltage of the comparator varying only within 31.25 mV. Moreover, two high-accuracy ramp calibration techniques are utilized to correct the current variation in the fine ramp and the slope error between the coarse and fine ramps. A hybrid comparator is utilized in the ADC to save power while maintaining the performance. The ADC is designed and simulated in 0.18 μm CMOS process with 7.5 μm width. The differential nonlinearity and integral nonlinearity of the proposed ADC are reduced from +0.3/-1 LSB and +3.1/-2.55 LSB to +0.3/-0.3 LSB and +1/-0.45 LSB at 61.7 kS/s sample rate by the calibrations. Image sensor Multi-step ADC Ramp generator Ramp calibration technique SS ADC Liu, Dongsheng verfasserin aut Liang, Yingxiang verfasserin aut Hu, Ang verfasserin aut Nie, Zheng verfasserin aut Zhang, Chengcheng verfasserin aut Li, Kaiyue verfasserin aut Niu, Guangda verfasserin aut Gao, Liang verfasserin aut Tang, Jiang verfasserin aut Enthalten in Microelectronics journal Amsterdam [u.a.] : Elsevier Science, 1989 139 Online-Ressource (DE-627)320405079 (DE-600)2000567-2 (DE-576)259484350 nnns volume:139 GBV_USEFLAG_U GBV_ELV SYSFLAG_U GBV_ILN_20 GBV_ILN_22 GBV_ILN_23 GBV_ILN_24 GBV_ILN_31 GBV_ILN_32 GBV_ILN_40 GBV_ILN_60 GBV_ILN_62 GBV_ILN_65 GBV_ILN_69 GBV_ILN_70 GBV_ILN_73 GBV_ILN_74 GBV_ILN_90 GBV_ILN_95 GBV_ILN_100 GBV_ILN_105 GBV_ILN_110 GBV_ILN_150 GBV_ILN_151 GBV_ILN_187 GBV_ILN_213 GBV_ILN_224 GBV_ILN_230 GBV_ILN_370 GBV_ILN_602 GBV_ILN_702 GBV_ILN_2001 GBV_ILN_2003 GBV_ILN_2004 GBV_ILN_2005 GBV_ILN_2007 GBV_ILN_2008 GBV_ILN_2009 GBV_ILN_2010 GBV_ILN_2011 GBV_ILN_2014 GBV_ILN_2015 GBV_ILN_2020 GBV_ILN_2021 GBV_ILN_2025 GBV_ILN_2026 GBV_ILN_2027 GBV_ILN_2034 GBV_ILN_2044 GBV_ILN_2048 GBV_ILN_2049 GBV_ILN_2050 GBV_ILN_2055 GBV_ILN_2056 GBV_ILN_2059 GBV_ILN_2061 GBV_ILN_2064 GBV_ILN_2088 GBV_ILN_2106 GBV_ILN_2110 GBV_ILN_2111 GBV_ILN_2112 GBV_ILN_2122 GBV_ILN_2129 GBV_ILN_2143 GBV_ILN_2152 GBV_ILN_2153 GBV_ILN_2190 GBV_ILN_2232 GBV_ILN_2336 GBV_ILN_2470 GBV_ILN_2507 GBV_ILN_4035 GBV_ILN_4037 GBV_ILN_4112 GBV_ILN_4125 GBV_ILN_4242 GBV_ILN_4249 GBV_ILN_4251 GBV_ILN_4305 GBV_ILN_4306 GBV_ILN_4307 GBV_ILN_4313 GBV_ILN_4322 GBV_ILN_4323 GBV_ILN_4324 GBV_ILN_4325 GBV_ILN_4326 GBV_ILN_4333 GBV_ILN_4334 GBV_ILN_4338 GBV_ILN_4393 GBV_ILN_4700 53.55 Mikroelektronik VZ 53.52 Elektronische Schaltungen VZ 33.61 Festkörperphysik VZ 33.72 Halbleiterphysik VZ AR 139
language	English
source	Enthalten in Microelectronics journal 139 volume:139
sourceStr	Enthalten in Microelectronics journal 139 volume:139
format_phy_str_mv	Article
bklname	Mikroelektronik Elektronische Schaltungen Festkörperphysik Halbleiterphysik
institution	findex.gbv.de
topic_facet	Image sensor Multi-step ADC Ramp generator Ramp calibration technique SS ADC
dewey-raw	620
isfreeaccess_bool	false
container_title	Microelectronics journal
authorswithroles_txt_mv	Li, Hao @@aut@@ Liu, Dongsheng @@aut@@ Liang, Yingxiang @@aut@@ Hu, Ang @@aut@@ Nie, Zheng @@aut@@ Zhang, Chengcheng @@aut@@ Li, Kaiyue @@aut@@ Niu, Guangda @@aut@@ Gao, Liang @@aut@@ Tang, Jiang @@aut@@
publishDateDaySort_date	2023-01-01T00:00:00Z
hierarchy_top_id	320405079
dewey-sort	3620
id	ELV062320459
language_de	englisch
fullrecord	<?xml version="1.0" encoding="UTF-8"?><collection xmlns="http://www.loc.gov/MARC21/slim"><record><leader>01000caa a22002652 4500</leader><controlfield tag="001">ELV062320459</controlfield><controlfield tag="003">DE-627</controlfield><controlfield tag="005">20230927072139.0</controlfield><controlfield tag="007">cr uuu---uuuuu</controlfield><controlfield tag="008">230829s2023 xx \|\|\|\|\|o 00\| \|\|eng c</controlfield><datafield tag="024" ind1="7" ind2=" "><subfield code="a">10.1016/j.mejo.2023.105919</subfield><subfield code="2">doi</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(DE-627)ELV062320459</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(ELSEVIER)S0026-2692(23)00232-X</subfield></datafield><datafield tag="040" ind1=" " ind2=" "><subfield code="a">DE-627</subfield><subfield code="b">ger</subfield><subfield code="c">DE-627</subfield><subfield code="e">rda</subfield></datafield><datafield tag="041" ind1=" " ind2=" "><subfield code="a">eng</subfield></datafield><datafield tag="082" ind1="0" ind2="4"><subfield code="a">620</subfield><subfield code="q">VZ</subfield></datafield><datafield tag="084" ind1=" " ind2=" "><subfield code="a">53.55</subfield><subfield code="2">bkl</subfield></datafield><datafield tag="084" ind1=" " ind2=" "><subfield code="a">53.52</subfield><subfield code="2">bkl</subfield></datafield><datafield tag="084" ind1=" " ind2=" "><subfield code="a">33.61</subfield><subfield code="2">bkl</subfield></datafield><datafield tag="084" ind1=" " ind2=" "><subfield code="a">33.72</subfield><subfield code="2">bkl</subfield></datafield><datafield tag="100" ind1="1" ind2=" "><subfield code="a">Li, Hao</subfield><subfield code="e">verfasserin</subfield><subfield code="4">aut</subfield></datafield><datafield tag="245" ind1="1" ind2="0"><subfield code="a">A 12-bit single slope ADC with multi-step structure and ramp calibration technique for image sensors</subfield></datafield><datafield tag="264" ind1=" " ind2="1"><subfield code="c">2023</subfield></datafield><datafield tag="336" ind1=" " ind2=" "><subfield code="a">nicht spezifiziert</subfield><subfield code="b">zzz</subfield><subfield code="2">rdacontent</subfield></datafield><datafield tag="337" ind1=" " ind2=" "><subfield code="a">Computermedien</subfield><subfield code="b">c</subfield><subfield code="2">rdamedia</subfield></datafield><datafield tag="338" ind1=" " ind2=" "><subfield code="a">Online-Ressource</subfield><subfield code="b">cr</subfield><subfield code="2">rdacarrier</subfield></datafield><datafield tag="520" ind1=" " ind2=" "><subfield code="a">This paper presents a novel multi-step single slope analog to digital converter (MS SS ADC). The proposed ADC splits the 12-bit conversion into 3 steps, including 1-bit half section decision, 4-bit coarse conversion, and finally 8-bit fine conversion with 1-bit redundancy. The conversion step is substantially reduced from conventional 4096 to 276. The linearity of the ADC is guaranteed by a stable common mode voltage of the comparator varying only within 31.25 mV. Moreover, two high-accuracy ramp calibration techniques are utilized to correct the current variation in the fine ramp and the slope error between the coarse and fine ramps. A hybrid comparator is utilized in the ADC to save power while maintaining the performance. The ADC is designed and simulated in 0.18 μm CMOS process with 7.5 μm width. The differential nonlinearity and integral nonlinearity of the proposed ADC are reduced from +0.3/-1 LSB and +3.1/-2.55 LSB to +0.3/-0.3 LSB and +1/-0.45 LSB at 61.7 kS/s sample rate by the calibrations.</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Image sensor</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Multi-step ADC</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Ramp generator</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Ramp calibration technique</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">SS ADC</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Liu, Dongsheng</subfield><subfield code="e">verfasserin</subfield><subfield code="4">aut</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Liang, Yingxiang</subfield><subfield code="e">verfasserin</subfield><subfield code="4">aut</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Hu, Ang</subfield><subfield code="e">verfasserin</subfield><subfield code="4">aut</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Nie, Zheng</subfield><subfield code="e">verfasserin</subfield><subfield code="4">aut</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Zhang, Chengcheng</subfield><subfield code="e">verfasserin</subfield><subfield code="4">aut</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Li, Kaiyue</subfield><subfield code="e">verfasserin</subfield><subfield code="4">aut</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Niu, Guangda</subfield><subfield code="e">verfasserin</subfield><subfield code="4">aut</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Gao, Liang</subfield><subfield code="e">verfasserin</subfield><subfield code="4">aut</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Tang, Jiang</subfield><subfield code="e">verfasserin</subfield><subfield code="4">aut</subfield></datafield><datafield tag="773" ind1="0" ind2="8"><subfield code="i">Enthalten in</subfield><subfield code="t">Microelectronics journal</subfield><subfield code="d">Amsterdam [u.a.] : Elsevier Science, 1989</subfield><subfield code="g">139</subfield><subfield code="h">Online-Ressource</subfield><subfield code="w">(DE-627)320405079</subfield><subfield code="w">(DE-600)2000567-2</subfield><subfield code="w">(DE-576)259484350</subfield><subfield code="7">nnns</subfield></datafield><datafield tag="773" ind1="1" ind2="8"><subfield code="g">volume:139</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_USEFLAG_U</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ELV</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">SYSFLAG_U</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_20</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_22</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_23</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_24</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_31</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_32</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_40</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_60</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_62</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_65</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_69</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_70</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_73</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_74</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_90</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_95</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_100</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_105</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_110</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_150</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_151</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_187</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_213</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_224</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_230</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_370</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_602</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_702</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_2001</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_2003</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_2004</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_2005</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_2007</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_2008</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_2009</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_2010</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_2011</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_2014</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_2015</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_2020</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_2021</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_2025</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_2026</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_2027</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_2034</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_2044</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_2048</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_2049</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_2050</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_2055</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_2056</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_2059</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_2061</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_2064</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_2088</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_2106</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_2110</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_2111</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_2112</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_2122</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_2129</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_2143</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_2152</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_2153</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_2190</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_2232</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_2336</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_2470</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_2507</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_4035</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_4037</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_4112</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_4125</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_4242</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_4249</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_4251</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_4305</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_4306</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_4307</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_4313</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_4322</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_4323</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_4324</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_4325</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_4326</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_4333</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_4334</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_4338</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_4393</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_4700</subfield></datafield><datafield tag="936" ind1="b" ind2="k"><subfield code="a">53.55</subfield><subfield code="j">Mikroelektronik</subfield><subfield code="q">VZ</subfield></datafield><datafield tag="936" ind1="b" ind2="k"><subfield code="a">53.52</subfield><subfield code="j">Elektronische Schaltungen</subfield><subfield code="q">VZ</subfield></datafield><datafield tag="936" ind1="b" ind2="k"><subfield code="a">33.61</subfield><subfield code="j">Festkörperphysik</subfield><subfield code="q">VZ</subfield></datafield><datafield tag="936" ind1="b" ind2="k"><subfield code="a">33.72</subfield><subfield code="j">Halbleiterphysik</subfield><subfield code="q">VZ</subfield></datafield><datafield tag="951" ind1=" " ind2=" "><subfield code="a">AR</subfield></datafield><datafield tag="952" ind1=" " ind2=" "><subfield code="d">139</subfield></datafield></record></collection>
author	Li, Hao
spellingShingle	Li, Hao ddc 620 bkl 53.55 bkl 53.52 bkl 33.61 bkl 33.72 misc Image sensor misc Multi-step ADC misc Ramp generator misc Ramp calibration technique misc SS ADC A 12-bit single slope ADC with multi-step structure and ramp calibration technique for image sensors
authorStr	Li, Hao
ppnlink_with_tag_str_mv	@@773@@(DE-627)320405079
format	electronic Article
dewey-ones	620 - Engineering & allied operations
delete_txt_mv	keep
author_role	aut aut aut aut aut aut aut aut aut aut
collection	elsevier
remote_str	true
illustrated	Not Illustrated
topic_title	620 VZ 53.55 bkl 53.52 bkl 33.61 bkl 33.72 bkl A 12-bit single slope ADC with multi-step structure and ramp calibration technique for image sensors Image sensor Multi-step ADC Ramp generator Ramp calibration technique SS ADC
topic	ddc 620 bkl 53.55 bkl 53.52 bkl 33.61 bkl 33.72 misc Image sensor misc Multi-step ADC misc Ramp generator misc Ramp calibration technique misc SS ADC
topic_unstemmed	ddc 620 bkl 53.55 bkl 53.52 bkl 33.61 bkl 33.72 misc Image sensor misc Multi-step ADC misc Ramp generator misc Ramp calibration technique misc SS ADC
topic_browse	ddc 620 bkl 53.55 bkl 53.52 bkl 33.61 bkl 33.72 misc Image sensor misc Multi-step ADC misc Ramp generator misc Ramp calibration technique misc SS ADC
format_facet	Elektronische Aufsätze Aufsätze Elektronische Ressource
format_main_str_mv	Text Zeitschrift/Artikel
carriertype_str_mv	cr
hierarchy_parent_title	Microelectronics journal
hierarchy_parent_id	320405079
dewey-tens	620 - Engineering
hierarchy_top_title	Microelectronics journal
isfreeaccess_txt	false
familylinks_str_mv	(DE-627)320405079 (DE-600)2000567-2 (DE-576)259484350
title	A 12-bit single slope ADC with multi-step structure and ramp calibration technique for image sensors
ctrlnum	(DE-627)ELV062320459 (ELSEVIER)S0026-2692(23)00232-X
title_full	A 12-bit single slope ADC with multi-step structure and ramp calibration technique for image sensors
author_sort	Li, Hao
journal	Microelectronics journal
journalStr	Microelectronics journal
lang_code	eng
isOA_bool	false
dewey-hundreds	600 - Technology
recordtype	marc
publishDateSort	2023
contenttype_str_mv	zzz
author_browse	Li, Hao Liu, Dongsheng Liang, Yingxiang Hu, Ang Nie, Zheng Zhang, Chengcheng Li, Kaiyue Niu, Guangda Gao, Liang Tang, Jiang
container_volume	139
class	620 VZ 53.55 bkl 53.52 bkl 33.61 bkl 33.72 bkl
format_se	Elektronische Aufsätze
author-letter	Li, Hao
doi_str_mv	10.1016/j.mejo.2023.105919
dewey-full	620
author2-role	verfasserin
title_sort	a 12-bit single slope adc with multi-step structure and ramp calibration technique for image sensors
title_auth	A 12-bit single slope ADC with multi-step structure and ramp calibration technique for image sensors
abstract	This paper presents a novel multi-step single slope analog to digital converter (MS SS ADC). The proposed ADC splits the 12-bit conversion into 3 steps, including 1-bit half section decision, 4-bit coarse conversion, and finally 8-bit fine conversion with 1-bit redundancy. The conversion step is substantially reduced from conventional 4096 to 276. The linearity of the ADC is guaranteed by a stable common mode voltage of the comparator varying only within 31.25 mV. Moreover, two high-accuracy ramp calibration techniques are utilized to correct the current variation in the fine ramp and the slope error between the coarse and fine ramps. A hybrid comparator is utilized in the ADC to save power while maintaining the performance. The ADC is designed and simulated in 0.18 μm CMOS process with 7.5 μm width. The differential nonlinearity and integral nonlinearity of the proposed ADC are reduced from +0.3/-1 LSB and +3.1/-2.55 LSB to +0.3/-0.3 LSB and +1/-0.45 LSB at 61.7 kS/s sample rate by the calibrations.
abstractGer	This paper presents a novel multi-step single slope analog to digital converter (MS SS ADC). The proposed ADC splits the 12-bit conversion into 3 steps, including 1-bit half section decision, 4-bit coarse conversion, and finally 8-bit fine conversion with 1-bit redundancy. The conversion step is substantially reduced from conventional 4096 to 276. The linearity of the ADC is guaranteed by a stable common mode voltage of the comparator varying only within 31.25 mV. Moreover, two high-accuracy ramp calibration techniques are utilized to correct the current variation in the fine ramp and the slope error between the coarse and fine ramps. A hybrid comparator is utilized in the ADC to save power while maintaining the performance. The ADC is designed and simulated in 0.18 μm CMOS process with 7.5 μm width. The differential nonlinearity and integral nonlinearity of the proposed ADC are reduced from +0.3/-1 LSB and +3.1/-2.55 LSB to +0.3/-0.3 LSB and +1/-0.45 LSB at 61.7 kS/s sample rate by the calibrations.
abstract_unstemmed	This paper presents a novel multi-step single slope analog to digital converter (MS SS ADC). The proposed ADC splits the 12-bit conversion into 3 steps, including 1-bit half section decision, 4-bit coarse conversion, and finally 8-bit fine conversion with 1-bit redundancy. The conversion step is substantially reduced from conventional 4096 to 276. The linearity of the ADC is guaranteed by a stable common mode voltage of the comparator varying only within 31.25 mV. Moreover, two high-accuracy ramp calibration techniques are utilized to correct the current variation in the fine ramp and the slope error between the coarse and fine ramps. A hybrid comparator is utilized in the ADC to save power while maintaining the performance. The ADC is designed and simulated in 0.18 μm CMOS process with 7.5 μm width. The differential nonlinearity and integral nonlinearity of the proposed ADC are reduced from +0.3/-1 LSB and +3.1/-2.55 LSB to +0.3/-0.3 LSB and +1/-0.45 LSB at 61.7 kS/s sample rate by the calibrations.
collection_details	GBV_USEFLAG_U GBV_ELV SYSFLAG_U GBV_ILN_20 GBV_ILN_22 GBV_ILN_23 GBV_ILN_24 GBV_ILN_31 GBV_ILN_32 GBV_ILN_40 GBV_ILN_60 GBV_ILN_62 GBV_ILN_65 GBV_ILN_69 GBV_ILN_70 GBV_ILN_73 GBV_ILN_74 GBV_ILN_90 GBV_ILN_95 GBV_ILN_100 GBV_ILN_105 GBV_ILN_110 GBV_ILN_150 GBV_ILN_151 GBV_ILN_187 GBV_ILN_213 GBV_ILN_224 GBV_ILN_230 GBV_ILN_370 GBV_ILN_602 GBV_ILN_702 GBV_ILN_2001 GBV_ILN_2003 GBV_ILN_2004 GBV_ILN_2005 GBV_ILN_2007 GBV_ILN_2008 GBV_ILN_2009 GBV_ILN_2010 GBV_ILN_2011 GBV_ILN_2014 GBV_ILN_2015 GBV_ILN_2020 GBV_ILN_2021 GBV_ILN_2025 GBV_ILN_2026 GBV_ILN_2027 GBV_ILN_2034 GBV_ILN_2044 GBV_ILN_2048 GBV_ILN_2049 GBV_ILN_2050 GBV_ILN_2055 GBV_ILN_2056 GBV_ILN_2059 GBV_ILN_2061 GBV_ILN_2064 GBV_ILN_2088 GBV_ILN_2106 GBV_ILN_2110 GBV_ILN_2111 GBV_ILN_2112 GBV_ILN_2122 GBV_ILN_2129 GBV_ILN_2143 GBV_ILN_2152 GBV_ILN_2153 GBV_ILN_2190 GBV_ILN_2232 GBV_ILN_2336 GBV_ILN_2470 GBV_ILN_2507 GBV_ILN_4035 GBV_ILN_4037 GBV_ILN_4112 GBV_ILN_4125 GBV_ILN_4242 GBV_ILN_4249 GBV_ILN_4251 GBV_ILN_4305 GBV_ILN_4306 GBV_ILN_4307 GBV_ILN_4313 GBV_ILN_4322 GBV_ILN_4323 GBV_ILN_4324 GBV_ILN_4325 GBV_ILN_4326 GBV_ILN_4333 GBV_ILN_4334 GBV_ILN_4338 GBV_ILN_4393 GBV_ILN_4700
title_short	A 12-bit single slope ADC with multi-step structure and ramp calibration technique for image sensors
remote_bool	true
author2	Liu, Dongsheng Liang, Yingxiang Hu, Ang Nie, Zheng Zhang, Chengcheng Li, Kaiyue Niu, Guangda Gao, Liang Tang, Jiang
author2Str	Liu, Dongsheng Liang, Yingxiang Hu, Ang Nie, Zheng Zhang, Chengcheng Li, Kaiyue Niu, Guangda Gao, Liang Tang, Jiang
ppnlink	320405079
mediatype_str_mv	c
isOA_txt	false
hochschulschrift_bool	false
doi_str	10.1016/j.mejo.2023.105919
up_date	2024-07-06T18:39:11.502Z
_version_	1803856014479458304
fullrecord_marcxml	<?xml version="1.0" encoding="UTF-8"?><collection xmlns="http://www.loc.gov/MARC21/slim"><record><leader>01000caa a22002652 4500</leader><controlfield tag="001">ELV062320459</controlfield><controlfield tag="003">DE-627</controlfield><controlfield tag="005">20230927072139.0</controlfield><controlfield tag="007">cr uuu---uuuuu</controlfield><controlfield tag="008">230829s2023 xx \|\|\|\|\|o 00\| \|\|eng c</controlfield><datafield tag="024" ind1="7" ind2=" "><subfield code="a">10.1016/j.mejo.2023.105919</subfield><subfield code="2">doi</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(DE-627)ELV062320459</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(ELSEVIER)S0026-2692(23)00232-X</subfield></datafield><datafield tag="040" ind1=" " ind2=" "><subfield code="a">DE-627</subfield><subfield code="b">ger</subfield><subfield code="c">DE-627</subfield><subfield code="e">rda</subfield></datafield><datafield tag="041" ind1=" " ind2=" "><subfield code="a">eng</subfield></datafield><datafield tag="082" ind1="0" ind2="4"><subfield code="a">620</subfield><subfield code="q">VZ</subfield></datafield><datafield tag="084" ind1=" " ind2=" "><subfield code="a">53.55</subfield><subfield code="2">bkl</subfield></datafield><datafield tag="084" ind1=" " ind2=" "><subfield code="a">53.52</subfield><subfield code="2">bkl</subfield></datafield><datafield tag="084" ind1=" " ind2=" "><subfield code="a">33.61</subfield><subfield code="2">bkl</subfield></datafield><datafield tag="084" ind1=" " ind2=" "><subfield code="a">33.72</subfield><subfield code="2">bkl</subfield></datafield><datafield tag="100" ind1="1" ind2=" "><subfield code="a">Li, Hao</subfield><subfield code="e">verfasserin</subfield><subfield code="4">aut</subfield></datafield><datafield tag="245" ind1="1" ind2="0"><subfield code="a">A 12-bit single slope ADC with multi-step structure and ramp calibration technique for image sensors</subfield></datafield><datafield tag="264" ind1=" " ind2="1"><subfield code="c">2023</subfield></datafield><datafield tag="336" ind1=" " ind2=" "><subfield code="a">nicht spezifiziert</subfield><subfield code="b">zzz</subfield><subfield code="2">rdacontent</subfield></datafield><datafield tag="337" ind1=" " ind2=" "><subfield code="a">Computermedien</subfield><subfield code="b">c</subfield><subfield code="2">rdamedia</subfield></datafield><datafield tag="338" ind1=" " ind2=" "><subfield code="a">Online-Ressource</subfield><subfield code="b">cr</subfield><subfield code="2">rdacarrier</subfield></datafield><datafield tag="520" ind1=" " ind2=" "><subfield code="a">This paper presents a novel multi-step single slope analog to digital converter (MS SS ADC). The proposed ADC splits the 12-bit conversion into 3 steps, including 1-bit half section decision, 4-bit coarse conversion, and finally 8-bit fine conversion with 1-bit redundancy. The conversion step is substantially reduced from conventional 4096 to 276. The linearity of the ADC is guaranteed by a stable common mode voltage of the comparator varying only within 31.25 mV. Moreover, two high-accuracy ramp calibration techniques are utilized to correct the current variation in the fine ramp and the slope error between the coarse and fine ramps. A hybrid comparator is utilized in the ADC to save power while maintaining the performance. The ADC is designed and simulated in 0.18 μm CMOS process with 7.5 μm width. The differential nonlinearity and integral nonlinearity of the proposed ADC are reduced from +0.3/-1 LSB and +3.1/-2.55 LSB to +0.3/-0.3 LSB and +1/-0.45 LSB at 61.7 kS/s sample rate by the calibrations.</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Image sensor</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Multi-step ADC</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Ramp generator</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Ramp calibration technique</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">SS ADC</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Liu, Dongsheng</subfield><subfield code="e">verfasserin</subfield><subfield code="4">aut</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Liang, Yingxiang</subfield><subfield code="e">verfasserin</subfield><subfield code="4">aut</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Hu, Ang</subfield><subfield code="e">verfasserin</subfield><subfield code="4">aut</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Nie, Zheng</subfield><subfield code="e">verfasserin</subfield><subfield code="4">aut</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Zhang, Chengcheng</subfield><subfield code="e">verfasserin</subfield><subfield code="4">aut</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Li, Kaiyue</subfield><subfield code="e">verfasserin</subfield><subfield code="4">aut</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Niu, Guangda</subfield><subfield code="e">verfasserin</subfield><subfield code="4">aut</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Gao, Liang</subfield><subfield code="e">verfasserin</subfield><subfield code="4">aut</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Tang, Jiang</subfield><subfield code="e">verfasserin</subfield><subfield code="4">aut</subfield></datafield><datafield tag="773" ind1="0" ind2="8"><subfield code="i">Enthalten in</subfield><subfield code="t">Microelectronics journal</subfield><subfield code="d">Amsterdam [u.a.] : Elsevier Science, 1989</subfield><subfield code="g">139</subfield><subfield code="h">Online-Ressource</subfield><subfield code="w">(DE-627)320405079</subfield><subfield code="w">(DE-600)2000567-2</subfield><subfield code="w">(DE-576)259484350</subfield><subfield code="7">nnns</subfield></datafield><datafield tag="773" ind1="1" ind2="8"><subfield code="g">volume:139</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_USEFLAG_U</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ELV</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">SYSFLAG_U</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_20</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_22</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_23</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_24</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_31</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_32</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_40</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_60</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_62</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_65</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_69</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_70</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_73</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_74</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_90</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_95</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_100</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_105</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_110</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_150</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_151</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_187</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_213</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_224</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_230</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_370</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_602</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_702</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_2001</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_2003</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_2004</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_2005</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_2007</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_2008</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_2009</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_2010</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_2011</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_2014</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_2015</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_2020</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_2021</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_2025</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_2026</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_2027</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_2034</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_2044</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_2048</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_2049</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_2050</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_2055</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_2056</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_2059</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_2061</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_2064</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_2088</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_2106</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_2110</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_2111</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_2112</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_2122</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_2129</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_2143</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_2152</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_2153</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_2190</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_2232</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_2336</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_2470</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_2507</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_4035</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_4037</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_4112</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_4125</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_4242</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_4249</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_4251</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_4305</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_4306</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_4307</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_4313</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_4322</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_4323</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_4324</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_4325</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_4326</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_4333</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_4334</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_4338</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_4393</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_4700</subfield></datafield><datafield tag="936" ind1="b" ind2="k"><subfield code="a">53.55</subfield><subfield code="j">Mikroelektronik</subfield><subfield code="q">VZ</subfield></datafield><datafield tag="936" ind1="b" ind2="k"><subfield code="a">53.52</subfield><subfield code="j">Elektronische Schaltungen</subfield><subfield code="q">VZ</subfield></datafield><datafield tag="936" ind1="b" ind2="k"><subfield code="a">33.61</subfield><subfield code="j">Festkörperphysik</subfield><subfield code="q">VZ</subfield></datafield><datafield tag="936" ind1="b" ind2="k"><subfield code="a">33.72</subfield><subfield code="j">Halbleiterphysik</subfield><subfield code="q">VZ</subfield></datafield><datafield tag="951" ind1=" " ind2=" "><subfield code="a">AR</subfield></datafield><datafield tag="952" ind1=" " ind2=" "><subfield code="d">139</subfield></datafield></record></collection>
score	7.40108

Nicht das Richtige dabei?

Schreiben Sie uns!

A 12-bit single slope ADC with multi-step structure and ramp calibration technique for image sensors

Nicht das Richtige dabei?

Zugang & Verfügbarkeit

Vorhandene Bände

Nicht das Richtige dabei?