Investigating Power Reduction for NoC-Based Spiking Neural Network Platforms using Channel Encoding
Recent focus has been placed on exploring the possibility to switch from parallel to serial data links between NoC routers in order to improve signal integrity in the communication channel. However, moving streams of data between the parallel path of the internal router and external serial-channel l...
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| Autor*in: |
McDonnell, Neil [verfasserIn] Carrillo, Snaider [author] Harkin, Jim [author] McDaid, Liam [author] |
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| Format: |
E-Artikel |
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| Sprache: |
Englisch |
| Erschienen: |
2012 |
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| Schlagwörter: |
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| Umfang: |
Online-Ressource |
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| Reproduktion: |
IGI Global InfoSci Journals Archive 2000 - 2012 |
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| Übergeordnetes Werk: |
In: International journal of adaptive, resilient and autonomic systems - Hershey, Pa : IGI Global, 2010, 3(2012), 4, Seite 1-16 |
| Übergeordnetes Werk: |
volume:3 ; year:2012 ; number:4 ; pages:1-16 |
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| DOI / URN: |
10.4018/jaras.2012100101 |
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NLEJ244447934 |
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| 520 | |a Recent focus has been placed on exploring the possibility to switch from parallel to serial data links between NoC routers in order to improve signal integrity in the communication channel. However, moving streams of data between the parallel path of the internal router and external serial-channel links between them consumes additional power. One challenge is encoding the data and minimise the switching activity of data in the serial links in order to reduce the additional power dissipation; while under real-time and minimal hardware constraints. Consequently, proposed is a novel low area/power decision circuit for NoC channel encoding which identifies in real-time packets for encoding and extends the existing SILENT encoders/decoders to further minimise power consumption and demonstrates the power performance savings of the decision circuit and modified (en)decoders using example test traffic with the EMBRACE NoC router, a mixed signal spiking neural network (SNNs) embedded platform | ||
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10.4018/jaras.2012100101 doi (DE-627)NLEJ244447934 (VZGNL)10.4018/jaras.2012100101 DE-627 ger DE-627 rakwb eng McDonnell, Neil verfasserin aut Investigating Power Reduction for NoC-Based Spiking Neural Network Platforms using Channel Encoding 2012 Online-Ressource nicht spezifiziert zzz rdacontent nicht spezifiziert z rdamedia nicht spezifiziert zu rdacarrier Recent focus has been placed on exploring the possibility to switch from parallel to serial data links between NoC routers in order to improve signal integrity in the communication channel. However, moving streams of data between the parallel path of the internal router and external serial-channel links between them consumes additional power. One challenge is encoding the data and minimise the switching activity of data in the serial links in order to reduce the additional power dissipation; while under real-time and minimal hardware constraints. Consequently, proposed is a novel low area/power decision circuit for NoC channel encoding which identifies in real-time packets for encoding and extends the existing SILENT encoders/decoders to further minimise power consumption and demonstrates the power performance savings of the decision circuit and modified (en)decoders using example test traffic with the EMBRACE NoC router, a mixed signal spiking neural network (SNNs) embedded platform IGI Global InfoSci Journals Archive 2000 - 2012 Channel Encoding EMBRACE Architecture Low Powered Signalling Networks-On-Chip Spiking Neural Networks Carrillo, Snaider author aut Harkin, Jim author aut McDaid, Liam author oth In International journal of adaptive, resilient and autonomic systems Hershey, Pa : IGI Global, 2010 3(2012), 4, Seite 1-16 Online-Ressource (DE-627)NLEJ244418640 (DE-600)2695784-X 1947-9239 nnns volume:3 year:2012 number:4 pages:1-16 http://services.igi-global.com/resolvedoi/resolve.aspx?doi=10.4018/jaras.2012100101 X:IGIG Verlag Deutschlandweit zugänglich http://services.igi-global.com/resolvedoi/resolve.aspx?doi=10.4018/jaras.2012100101&buylink=true text/html Abstract Deutschlandweit zugänglich ZDB-1-GIS GBV_NL_ARTICLE AR 3 2012 4 1-16 |
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10.4018/jaras.2012100101 doi (DE-627)NLEJ244447934 (VZGNL)10.4018/jaras.2012100101 DE-627 ger DE-627 rakwb eng McDonnell, Neil verfasserin aut Investigating Power Reduction for NoC-Based Spiking Neural Network Platforms using Channel Encoding 2012 Online-Ressource nicht spezifiziert zzz rdacontent nicht spezifiziert z rdamedia nicht spezifiziert zu rdacarrier Recent focus has been placed on exploring the possibility to switch from parallel to serial data links between NoC routers in order to improve signal integrity in the communication channel. However, moving streams of data between the parallel path of the internal router and external serial-channel links between them consumes additional power. One challenge is encoding the data and minimise the switching activity of data in the serial links in order to reduce the additional power dissipation; while under real-time and minimal hardware constraints. Consequently, proposed is a novel low area/power decision circuit for NoC channel encoding which identifies in real-time packets for encoding and extends the existing SILENT encoders/decoders to further minimise power consumption and demonstrates the power performance savings of the decision circuit and modified (en)decoders using example test traffic with the EMBRACE NoC router, a mixed signal spiking neural network (SNNs) embedded platform IGI Global InfoSci Journals Archive 2000 - 2012 Channel Encoding EMBRACE Architecture Low Powered Signalling Networks-On-Chip Spiking Neural Networks Carrillo, Snaider author aut Harkin, Jim author aut McDaid, Liam author oth In International journal of adaptive, resilient and autonomic systems Hershey, Pa : IGI Global, 2010 3(2012), 4, Seite 1-16 Online-Ressource (DE-627)NLEJ244418640 (DE-600)2695784-X 1947-9239 nnns volume:3 year:2012 number:4 pages:1-16 http://services.igi-global.com/resolvedoi/resolve.aspx?doi=10.4018/jaras.2012100101 X:IGIG Verlag Deutschlandweit zugänglich http://services.igi-global.com/resolvedoi/resolve.aspx?doi=10.4018/jaras.2012100101&buylink=true text/html Abstract Deutschlandweit zugänglich ZDB-1-GIS GBV_NL_ARTICLE AR 3 2012 4 1-16 |
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10.4018/jaras.2012100101 doi (DE-627)NLEJ244447934 (VZGNL)10.4018/jaras.2012100101 DE-627 ger DE-627 rakwb eng McDonnell, Neil verfasserin aut Investigating Power Reduction for NoC-Based Spiking Neural Network Platforms using Channel Encoding 2012 Online-Ressource nicht spezifiziert zzz rdacontent nicht spezifiziert z rdamedia nicht spezifiziert zu rdacarrier Recent focus has been placed on exploring the possibility to switch from parallel to serial data links between NoC routers in order to improve signal integrity in the communication channel. However, moving streams of data between the parallel path of the internal router and external serial-channel links between them consumes additional power. One challenge is encoding the data and minimise the switching activity of data in the serial links in order to reduce the additional power dissipation; while under real-time and minimal hardware constraints. Consequently, proposed is a novel low area/power decision circuit for NoC channel encoding which identifies in real-time packets for encoding and extends the existing SILENT encoders/decoders to further minimise power consumption and demonstrates the power performance savings of the decision circuit and modified (en)decoders using example test traffic with the EMBRACE NoC router, a mixed signal spiking neural network (SNNs) embedded platform IGI Global InfoSci Journals Archive 2000 - 2012 Channel Encoding EMBRACE Architecture Low Powered Signalling Networks-On-Chip Spiking Neural Networks Carrillo, Snaider author aut Harkin, Jim author aut McDaid, Liam author oth In International journal of adaptive, resilient and autonomic systems Hershey, Pa : IGI Global, 2010 3(2012), 4, Seite 1-16 Online-Ressource (DE-627)NLEJ244418640 (DE-600)2695784-X 1947-9239 nnns volume:3 year:2012 number:4 pages:1-16 http://services.igi-global.com/resolvedoi/resolve.aspx?doi=10.4018/jaras.2012100101 X:IGIG Verlag Deutschlandweit zugänglich http://services.igi-global.com/resolvedoi/resolve.aspx?doi=10.4018/jaras.2012100101&buylink=true text/html Abstract Deutschlandweit zugänglich ZDB-1-GIS GBV_NL_ARTICLE AR 3 2012 4 1-16 |
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10.4018/jaras.2012100101 doi (DE-627)NLEJ244447934 (VZGNL)10.4018/jaras.2012100101 DE-627 ger DE-627 rakwb eng McDonnell, Neil verfasserin aut Investigating Power Reduction for NoC-Based Spiking Neural Network Platforms using Channel Encoding 2012 Online-Ressource nicht spezifiziert zzz rdacontent nicht spezifiziert z rdamedia nicht spezifiziert zu rdacarrier Recent focus has been placed on exploring the possibility to switch from parallel to serial data links between NoC routers in order to improve signal integrity in the communication channel. However, moving streams of data between the parallel path of the internal router and external serial-channel links between them consumes additional power. One challenge is encoding the data and minimise the switching activity of data in the serial links in order to reduce the additional power dissipation; while under real-time and minimal hardware constraints. Consequently, proposed is a novel low area/power decision circuit for NoC channel encoding which identifies in real-time packets for encoding and extends the existing SILENT encoders/decoders to further minimise power consumption and demonstrates the power performance savings of the decision circuit and modified (en)decoders using example test traffic with the EMBRACE NoC router, a mixed signal spiking neural network (SNNs) embedded platform IGI Global InfoSci Journals Archive 2000 - 2012 Channel Encoding EMBRACE Architecture Low Powered Signalling Networks-On-Chip Spiking Neural Networks Carrillo, Snaider author aut Harkin, Jim author aut McDaid, Liam author oth In International journal of adaptive, resilient and autonomic systems Hershey, Pa : IGI Global, 2010 3(2012), 4, Seite 1-16 Online-Ressource (DE-627)NLEJ244418640 (DE-600)2695784-X 1947-9239 nnns volume:3 year:2012 number:4 pages:1-16 http://services.igi-global.com/resolvedoi/resolve.aspx?doi=10.4018/jaras.2012100101 X:IGIG Verlag Deutschlandweit zugänglich http://services.igi-global.com/resolvedoi/resolve.aspx?doi=10.4018/jaras.2012100101&buylink=true text/html Abstract Deutschlandweit zugänglich ZDB-1-GIS GBV_NL_ARTICLE AR 3 2012 4 1-16 |
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10.4018/jaras.2012100101 doi (DE-627)NLEJ244447934 (VZGNL)10.4018/jaras.2012100101 DE-627 ger DE-627 rakwb eng McDonnell, Neil verfasserin aut Investigating Power Reduction for NoC-Based Spiking Neural Network Platforms using Channel Encoding 2012 Online-Ressource nicht spezifiziert zzz rdacontent nicht spezifiziert z rdamedia nicht spezifiziert zu rdacarrier Recent focus has been placed on exploring the possibility to switch from parallel to serial data links between NoC routers in order to improve signal integrity in the communication channel. However, moving streams of data between the parallel path of the internal router and external serial-channel links between them consumes additional power. One challenge is encoding the data and minimise the switching activity of data in the serial links in order to reduce the additional power dissipation; while under real-time and minimal hardware constraints. Consequently, proposed is a novel low area/power decision circuit for NoC channel encoding which identifies in real-time packets for encoding and extends the existing SILENT encoders/decoders to further minimise power consumption and demonstrates the power performance savings of the decision circuit and modified (en)decoders using example test traffic with the EMBRACE NoC router, a mixed signal spiking neural network (SNNs) embedded platform IGI Global InfoSci Journals Archive 2000 - 2012 Channel Encoding EMBRACE Architecture Low Powered Signalling Networks-On-Chip Spiking Neural Networks Carrillo, Snaider author aut Harkin, Jim author aut McDaid, Liam author oth In International journal of adaptive, resilient and autonomic systems Hershey, Pa : IGI Global, 2010 3(2012), 4, Seite 1-16 Online-Ressource (DE-627)NLEJ244418640 (DE-600)2695784-X 1947-9239 nnns volume:3 year:2012 number:4 pages:1-16 http://services.igi-global.com/resolvedoi/resolve.aspx?doi=10.4018/jaras.2012100101 X:IGIG Verlag Deutschlandweit zugänglich http://services.igi-global.com/resolvedoi/resolve.aspx?doi=10.4018/jaras.2012100101&buylink=true text/html Abstract Deutschlandweit zugänglich ZDB-1-GIS GBV_NL_ARTICLE AR 3 2012 4 1-16 |
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Recent focus has been placed on exploring the possibility to switch from parallel to serial data links between NoC routers in order to improve signal integrity in the communication channel. However, moving streams of data between the parallel path of the internal router and external serial-channel links between them consumes additional power. One challenge is encoding the data and minimise the switching activity of data in the serial links in order to reduce the additional power dissipation; while under real-time and minimal hardware constraints. Consequently, proposed is a novel low area/power decision circuit for NoC channel encoding which identifies in real-time packets for encoding and extends the existing SILENT encoders/decoders to further minimise power consumption and demonstrates the power performance savings of the decision circuit and modified (en)decoders using example test traffic with the EMBRACE NoC router, a mixed signal spiking neural network (SNNs) embedded platform |
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Recent focus has been placed on exploring the possibility to switch from parallel to serial data links between NoC routers in order to improve signal integrity in the communication channel. However, moving streams of data between the parallel path of the internal router and external serial-channel links between them consumes additional power. One challenge is encoding the data and minimise the switching activity of data in the serial links in order to reduce the additional power dissipation; while under real-time and minimal hardware constraints. Consequently, proposed is a novel low area/power decision circuit for NoC channel encoding which identifies in real-time packets for encoding and extends the existing SILENT encoders/decoders to further minimise power consumption and demonstrates the power performance savings of the decision circuit and modified (en)decoders using example test traffic with the EMBRACE NoC router, a mixed signal spiking neural network (SNNs) embedded platform |
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Recent focus has been placed on exploring the possibility to switch from parallel to serial data links between NoC routers in order to improve signal integrity in the communication channel. However, moving streams of data between the parallel path of the internal router and external serial-channel links between them consumes additional power. One challenge is encoding the data and minimise the switching activity of data in the serial links in order to reduce the additional power dissipation; while under real-time and minimal hardware constraints. Consequently, proposed is a novel low area/power decision circuit for NoC channel encoding which identifies in real-time packets for encoding and extends the existing SILENT encoders/decoders to further minimise power consumption and demonstrates the power performance savings of the decision circuit and modified (en)decoders using example test traffic with the EMBRACE NoC router, a mixed signal spiking neural network (SNNs) embedded platform |
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Investigating Power Reduction for NoC-Based Spiking Neural Network Platforms using Channel Encoding |
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Carrillo, Snaider Harkin, Jim McDaid, Liam |
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