Silicon Devices - Impurity-Profile-Based Threshold-Voltage Model of Pocket-Implanted MOSFETs for Circuit Simulation
Autor*in: |
Ueno, H. [verfasserIn] |
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2002 |
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7 |
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Enthalten in: IEEE transactions on electron devices - New York, NY : IEEE, 1963, 49(2002), 10, Seite 1783-1789 |
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volume:49 ; year:2002 ; number:10 ; pages:1783-1789 ; extent:7 |
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SW021016 (DE-627)OLC1631748750 (DE-599)GBVOLC1631748750 DE-627 ger DE-627 rakwb 620 Ueno, H. verfasserin aut Silicon Devices - Impurity-Profile-Based Threshold-Voltage Model of Pocket-Implanted MOSFETs for Circuit Simulation 2002 7 Text txt rdacontent ohne Hilfsmittel zu benutzen n rdamedia Band nc rdacarrier Kitamaru, D. oth Morikawa, K. oth Tanaka, M. oth Miura-Mattausch, M. oth Mattausch, H.J. oth Kumashiro, S. oth Yamaguchi, T. oth Yamashita, K. oth Nakayama, N. oth Enthalten in IEEE transactions on electron devices New York, NY : IEEE, 1963 49(2002), 10, Seite 1783-1789 (DE-627)129602922 (DE-600)241634-7 (DE-576)015096734 0018-9383 nnns volume:49 year:2002 number:10 pages:1783-1789 extent:7 GBV_USEFLAG_A SYSFLAG_A GBV_OLC SSG-OLC-TEC SSG-OLC-MAT GBV_ILN_20 GBV_ILN_21 GBV_ILN_23 GBV_ILN_24 GBV_ILN_32 GBV_ILN_70 GBV_ILN_100 GBV_ILN_170 GBV_ILN_2002 GBV_ILN_2004 GBV_ILN_2006 GBV_ILN_2014 GBV_ILN_2015 GBV_ILN_2016 GBV_ILN_2020 GBV_ILN_2021 GBV_ILN_4036 GBV_ILN_4266 GBV_ILN_4305 GBV_ILN_4306 GBV_ILN_4307 GBV_ILN_4309 GBV_ILN_4310 GBV_ILN_4313 GBV_ILN_4315 GBV_ILN_4317 GBV_ILN_4318 GBV_ILN_4319 GBV_ILN_4700 AR 49 2002 10 1783-1789 7 |
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SW021016 (DE-627)OLC1631748750 (DE-599)GBVOLC1631748750 DE-627 ger DE-627 rakwb 620 Ueno, H. verfasserin aut Silicon Devices - Impurity-Profile-Based Threshold-Voltage Model of Pocket-Implanted MOSFETs for Circuit Simulation 2002 7 Text txt rdacontent ohne Hilfsmittel zu benutzen n rdamedia Band nc rdacarrier Kitamaru, D. oth Morikawa, K. oth Tanaka, M. oth Miura-Mattausch, M. oth Mattausch, H.J. oth Kumashiro, S. oth Yamaguchi, T. oth Yamashita, K. oth Nakayama, N. oth Enthalten in IEEE transactions on electron devices New York, NY : IEEE, 1963 49(2002), 10, Seite 1783-1789 (DE-627)129602922 (DE-600)241634-7 (DE-576)015096734 0018-9383 nnns volume:49 year:2002 number:10 pages:1783-1789 extent:7 GBV_USEFLAG_A SYSFLAG_A GBV_OLC SSG-OLC-TEC SSG-OLC-MAT GBV_ILN_20 GBV_ILN_21 GBV_ILN_23 GBV_ILN_24 GBV_ILN_32 GBV_ILN_70 GBV_ILN_100 GBV_ILN_170 GBV_ILN_2002 GBV_ILN_2004 GBV_ILN_2006 GBV_ILN_2014 GBV_ILN_2015 GBV_ILN_2016 GBV_ILN_2020 GBV_ILN_2021 GBV_ILN_4036 GBV_ILN_4266 GBV_ILN_4305 GBV_ILN_4306 GBV_ILN_4307 GBV_ILN_4309 GBV_ILN_4310 GBV_ILN_4313 GBV_ILN_4315 GBV_ILN_4317 GBV_ILN_4318 GBV_ILN_4319 GBV_ILN_4700 AR 49 2002 10 1783-1789 7 |
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SW021016 (DE-627)OLC1631748750 (DE-599)GBVOLC1631748750 DE-627 ger DE-627 rakwb 620 Ueno, H. verfasserin aut Silicon Devices - Impurity-Profile-Based Threshold-Voltage Model of Pocket-Implanted MOSFETs for Circuit Simulation 2002 7 Text txt rdacontent ohne Hilfsmittel zu benutzen n rdamedia Band nc rdacarrier Kitamaru, D. oth Morikawa, K. oth Tanaka, M. oth Miura-Mattausch, M. oth Mattausch, H.J. oth Kumashiro, S. oth Yamaguchi, T. oth Yamashita, K. oth Nakayama, N. oth Enthalten in IEEE transactions on electron devices New York, NY : IEEE, 1963 49(2002), 10, Seite 1783-1789 (DE-627)129602922 (DE-600)241634-7 (DE-576)015096734 0018-9383 nnns volume:49 year:2002 number:10 pages:1783-1789 extent:7 GBV_USEFLAG_A SYSFLAG_A GBV_OLC SSG-OLC-TEC SSG-OLC-MAT GBV_ILN_20 GBV_ILN_21 GBV_ILN_23 GBV_ILN_24 GBV_ILN_32 GBV_ILN_70 GBV_ILN_100 GBV_ILN_170 GBV_ILN_2002 GBV_ILN_2004 GBV_ILN_2006 GBV_ILN_2014 GBV_ILN_2015 GBV_ILN_2016 GBV_ILN_2020 GBV_ILN_2021 GBV_ILN_4036 GBV_ILN_4266 GBV_ILN_4305 GBV_ILN_4306 GBV_ILN_4307 GBV_ILN_4309 GBV_ILN_4310 GBV_ILN_4313 GBV_ILN_4315 GBV_ILN_4317 GBV_ILN_4318 GBV_ILN_4319 GBV_ILN_4700 AR 49 2002 10 1783-1789 7 |
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SW021016 (DE-627)OLC1631748750 (DE-599)GBVOLC1631748750 DE-627 ger DE-627 rakwb 620 Ueno, H. verfasserin aut Silicon Devices - Impurity-Profile-Based Threshold-Voltage Model of Pocket-Implanted MOSFETs for Circuit Simulation 2002 7 Text txt rdacontent ohne Hilfsmittel zu benutzen n rdamedia Band nc rdacarrier Kitamaru, D. oth Morikawa, K. oth Tanaka, M. oth Miura-Mattausch, M. oth Mattausch, H.J. oth Kumashiro, S. oth Yamaguchi, T. oth Yamashita, K. oth Nakayama, N. oth Enthalten in IEEE transactions on electron devices New York, NY : IEEE, 1963 49(2002), 10, Seite 1783-1789 (DE-627)129602922 (DE-600)241634-7 (DE-576)015096734 0018-9383 nnns volume:49 year:2002 number:10 pages:1783-1789 extent:7 GBV_USEFLAG_A SYSFLAG_A GBV_OLC SSG-OLC-TEC SSG-OLC-MAT GBV_ILN_20 GBV_ILN_21 GBV_ILN_23 GBV_ILN_24 GBV_ILN_32 GBV_ILN_70 GBV_ILN_100 GBV_ILN_170 GBV_ILN_2002 GBV_ILN_2004 GBV_ILN_2006 GBV_ILN_2014 GBV_ILN_2015 GBV_ILN_2016 GBV_ILN_2020 GBV_ILN_2021 GBV_ILN_4036 GBV_ILN_4266 GBV_ILN_4305 GBV_ILN_4306 GBV_ILN_4307 GBV_ILN_4309 GBV_ILN_4310 GBV_ILN_4313 GBV_ILN_4315 GBV_ILN_4317 GBV_ILN_4318 GBV_ILN_4319 GBV_ILN_4700 AR 49 2002 10 1783-1789 7 |
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Silicon Devices - Impurity-Profile-Based Threshold-Voltage Model of Pocket-Implanted MOSFETs for Circuit Simulation |
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Silicon Devices - Impurity-Profile-Based Threshold-Voltage Model of Pocket-Implanted MOSFETs for Circuit Simulation |
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Kitamaru, D. Morikawa, K. Tanaka, M. Miura-Mattausch, M. Mattausch, H.J. Kumashiro, S. Yamaguchi, T. Yamashita, K. Nakayama, N. |
author2Str |
Kitamaru, D. Morikawa, K. Tanaka, M. Miura-Mattausch, M. Mattausch, H.J. Kumashiro, S. Yamaguchi, T. Yamashita, K. Nakayama, N. |
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2024-07-03T14:23:57.683Z |
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