SIGMA: A VLSI Systolic Array Implementation of a Galois Field GF(2m) Based Multiplication and Division Algorithm

Gespeichert in:

Autor*in:	Kovac, M. [verfasserIn] Ranganathan, N. Varanasi, M.

Format:	Artikel

Erschienen:	1993

Umfang:	9

Übergeordnetes Werk:	Enthalten in: IEEE transactions on very large scale integration (VLSI) systems - New York, NY : Institute of Electrical and Electronics Engineers, 1993, 1(1993), 1, Seite 22-30
Übergeordnetes Werk:	volume:1 ; year:1993 ; number:1 ; pages:22-30 ; extent:9

Katalog-ID:	OLC1707360405

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title_sort	sigma: a vlsi systolic array implementation of a galois field gf(2m) based multiplication and division algorithm
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