Memory Hierarchies, Pipelines, and Buses for Future Architectures in Time-Critical Embedded Systems

Gespeichert in:

Autor*in:	Wilhelm, R. [verfasserIn] Grund, D. Reineke, J. Schlickling, M. Pister, M. Ferdinand, C.

Format:	Artikel

Erschienen:	2009

Umfang:	13

Übergeordnetes Werk:	Enthalten in: IEEE transactions on computer-aided design of integrated circuits and systems - New York, NY : Institute of Electrical and Electronics Engineers, 1982, 28(2009), 7, Seite 966-978
Übergeordnetes Werk:	volume:28 ; year:2009 ; number:7 ; pages:966-978 ; extent:13

Katalog-ID:	OLC1822273080

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allfieldsGer	sw090723 (DE-627)OLC1822273080 (DE-599)GBVOLC1822273080 DE-627 ger DE-627 rakwb 620 Wilhelm, R. verfasserin aut Memory Hierarchies, Pipelines, and Buses for Future Architectures in Time-Critical Embedded Systems 2009 13 Text txt rdacontent ohne Hilfsmittel zu benutzen n rdamedia Band nc rdacarrier Grund, D. oth Reineke, J. oth Schlickling, M. oth Pister, M. oth Ferdinand, C. oth Enthalten in IEEE transactions on computer-aided design of integrated circuits and systems New York, NY : Institute of Electrical and Electronics Engineers, 1982 28(2009), 7, Seite 966-978 (DE-627)13041705X (DE-600)627344-0 (DE-576)015919471 0278-0070 nnns volume:28 year:2009 number:7 pages:966-978 extent:13 GBV_USEFLAG_A SYSFLAG_A GBV_OLC SSG-OLC-TEC SSG-OLC-PHY SSG-OLC-MAT GBV_ILN_70 GBV_ILN_120 GBV_ILN_285 GBV_ILN_2002 GBV_ILN_2004 GBV_ILN_2010 GBV_ILN_2014 GBV_ILN_2020 GBV_ILN_2244 GBV_ILN_4313 AR 28 2009 7 966-978 13
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