A 9.6 Gb/s 0.96 mW/Gb/s Forwarded Clock Receiver With High Jitter Tolerance Using Mixing Cell Integrated Injection-Locked Oscillator
This paper presents a forwarded-clock receiver using a mixing cell integrated injection-locked oscillator (MIILO) and an I/Q generator based on injection-locked oscillator (IQGILO). By using MIILO, jitter tolerance is enhanced by about 1.8 times at high frequency compared to using a conventional inj...
Ausführliche Beschreibung
Gespeichert in:
| Autor*in: |
Kim, Young-Ju [verfasserIn] |
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| Format: |
Artikel |
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| Sprache: |
Englisch |
| Erschienen: |
2015 |
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| Schlagwörter: |
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| Übergeordnetes Werk: |
Enthalten in: IEEE transactions on circuits and systems / 1 - New York, NY : Institute of Electrical and Electronics Engineers, 1992, 62(2015), 10, Seite 2495-2503 |
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| Übergeordnetes Werk: |
volume:62 ; year:2015 ; number:10 ; pages:2495-2503 |
| Links: |
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| DOI / URN: |
10.1109/TCSI.2015.2459557 |
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| Katalog-ID: |
OLC1959252461 |
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| 100 | 1 | |a Kim, Young-Ju |e verfasserin |4 aut | |
| 245 | 1 | 2 | |a A 9.6 Gb/s 0.96 mW/Gb/s Forwarded Clock Receiver With High Jitter Tolerance Using Mixing Cell Integrated Injection-Locked Oscillator |
| 264 | 1 | |c 2015 | |
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| 520 | |a This paper presents a forwarded-clock receiver using a mixing cell integrated injection-locked oscillator (MIILO) and an I/Q generator based on injection-locked oscillator (IQGILO). By using MIILO, jitter tolerance is enhanced by about 1.8 times at high frequency compared to using a conventional injection-locked oscillator. In addition, the proposed receiver is robust against power supply induced jitter (PSIJ) caused by a clock distribution network because jitter tracking bandwidth of IQGILO is always lower than peak frequency of PSIJ regardless of latency mismatch between data and clock. The test chip achieves 9.6 Gb/s data rate with 0.96 mW/Gb/s and occupies only 0.0162 {\rm mm}^{2} in a 1 V 65 nm CMOS. | ||
| 650 | 4 | |a injection-locked oscillator | |
| 650 | 4 | |a Data-jitter mixer | |
| 650 | 4 | |a Timing | |
| 650 | 4 | |a Jitter | |
| 650 | 4 | |a Computer architecture | |
| 650 | 4 | |a forwarded clock receiver | |
| 650 | 4 | |a Clocks | |
| 650 | 4 | |a Correlation | |
| 650 | 4 | |a jitter correlation | |
| 650 | 4 | |a quarter-rate clocking | |
| 650 | 4 | |a Microprocessors | |
| 650 | 4 | |a Receivers | |
| 700 | 1 | |a Chung, Sang-Hye |4 oth | |
| 700 | 1 | |a Ha, Kyung-Soo |4 oth | |
| 700 | 1 | |a Bae, Seung-Jun |4 oth | |
| 700 | 1 | |a Kim, Lee-Sup |4 oth | |
| 773 | 0 | 8 | |i Enthalten in |t IEEE transactions on circuits and systems / 1 |d New York, NY : Institute of Electrical and Electronics Engineers, 1992 |g 62(2015), 10, Seite 2495-2503 |w (DE-627)131043080 |w (DE-600)1100194-X |w (DE-576)02804679X |x 1549-8328 |7 nnns |
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| 856 | 4 | 1 | |u http://dx.doi.org/10.1109/TCSI.2015.2459557 |3 Volltext |
| 856 | 4 | 2 | |u http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=7234952 |
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| 952 | |d 62 |j 2015 |e 10 |h 2495-2503 | ||
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10.1109/TCSI.2015.2459557 doi PQ20160617 (DE-627)OLC1959252461 (DE-599)GBVOLC1959252461 (PRQ)i1693-36e414fcff47bb5f1800b1bf3a9f4c96bda1ac758f32992ecd1c1b9ebca52d150 (KEY)021396692015000006200100249596gbs096mwgbsforwardedclockreceiverwithhighjittert DE-627 ger DE-627 rakwb eng 000 620 DNB Kim, Young-Ju verfasserin aut A 9.6 Gb/s 0.96 mW/Gb/s Forwarded Clock Receiver With High Jitter Tolerance Using Mixing Cell Integrated Injection-Locked Oscillator 2015 Text txt rdacontent ohne Hilfsmittel zu benutzen n rdamedia Band nc rdacarrier This paper presents a forwarded-clock receiver using a mixing cell integrated injection-locked oscillator (MIILO) and an I/Q generator based on injection-locked oscillator (IQGILO). By using MIILO, jitter tolerance is enhanced by about 1.8 times at high frequency compared to using a conventional injection-locked oscillator. In addition, the proposed receiver is robust against power supply induced jitter (PSIJ) caused by a clock distribution network because jitter tracking bandwidth of IQGILO is always lower than peak frequency of PSIJ regardless of latency mismatch between data and clock. The test chip achieves 9.6 Gb/s data rate with 0.96 mW/Gb/s and occupies only 0.0162 {\rm mm}^{2} in a 1 V 65 nm CMOS. injection-locked oscillator Data-jitter mixer Timing Jitter Computer architecture forwarded clock receiver Clocks Correlation jitter correlation quarter-rate clocking Microprocessors Receivers Chung, Sang-Hye oth Ha, Kyung-Soo oth Bae, Seung-Jun oth Kim, Lee-Sup oth Enthalten in IEEE transactions on circuits and systems / 1 New York, NY : Institute of Electrical and Electronics Engineers, 1992 62(2015), 10, Seite 2495-2503 (DE-627)131043080 (DE-600)1100194-X (DE-576)02804679X 1549-8328 nnns volume:62 year:2015 number:10 pages:2495-2503 http://dx.doi.org/10.1109/TCSI.2015.2459557 Volltext http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=7234952 http://search.proquest.com/docview/1729175340 GBV_USEFLAG_A SYSFLAG_A GBV_OLC SSG-OLC-TEC SSG-OLC-MAT GBV_ILN_30 GBV_ILN_70 GBV_ILN_2002 GBV_ILN_2005 GBV_ILN_2059 AR 62 2015 10 2495-2503 |
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10.1109/TCSI.2015.2459557 doi PQ20160617 (DE-627)OLC1959252461 (DE-599)GBVOLC1959252461 (PRQ)i1693-36e414fcff47bb5f1800b1bf3a9f4c96bda1ac758f32992ecd1c1b9ebca52d150 (KEY)021396692015000006200100249596gbs096mwgbsforwardedclockreceiverwithhighjittert DE-627 ger DE-627 rakwb eng 000 620 DNB Kim, Young-Ju verfasserin aut A 9.6 Gb/s 0.96 mW/Gb/s Forwarded Clock Receiver With High Jitter Tolerance Using Mixing Cell Integrated Injection-Locked Oscillator 2015 Text txt rdacontent ohne Hilfsmittel zu benutzen n rdamedia Band nc rdacarrier This paper presents a forwarded-clock receiver using a mixing cell integrated injection-locked oscillator (MIILO) and an I/Q generator based on injection-locked oscillator (IQGILO). By using MIILO, jitter tolerance is enhanced by about 1.8 times at high frequency compared to using a conventional injection-locked oscillator. In addition, the proposed receiver is robust against power supply induced jitter (PSIJ) caused by a clock distribution network because jitter tracking bandwidth of IQGILO is always lower than peak frequency of PSIJ regardless of latency mismatch between data and clock. The test chip achieves 9.6 Gb/s data rate with 0.96 mW/Gb/s and occupies only 0.0162 {\rm mm}^{2} in a 1 V 65 nm CMOS. injection-locked oscillator Data-jitter mixer Timing Jitter Computer architecture forwarded clock receiver Clocks Correlation jitter correlation quarter-rate clocking Microprocessors Receivers Chung, Sang-Hye oth Ha, Kyung-Soo oth Bae, Seung-Jun oth Kim, Lee-Sup oth Enthalten in IEEE transactions on circuits and systems / 1 New York, NY : Institute of Electrical and Electronics Engineers, 1992 62(2015), 10, Seite 2495-2503 (DE-627)131043080 (DE-600)1100194-X (DE-576)02804679X 1549-8328 nnns volume:62 year:2015 number:10 pages:2495-2503 http://dx.doi.org/10.1109/TCSI.2015.2459557 Volltext http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=7234952 http://search.proquest.com/docview/1729175340 GBV_USEFLAG_A SYSFLAG_A GBV_OLC SSG-OLC-TEC SSG-OLC-MAT GBV_ILN_30 GBV_ILN_70 GBV_ILN_2002 GBV_ILN_2005 GBV_ILN_2059 AR 62 2015 10 2495-2503 |
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10.1109/TCSI.2015.2459557 doi PQ20160617 (DE-627)OLC1959252461 (DE-599)GBVOLC1959252461 (PRQ)i1693-36e414fcff47bb5f1800b1bf3a9f4c96bda1ac758f32992ecd1c1b9ebca52d150 (KEY)021396692015000006200100249596gbs096mwgbsforwardedclockreceiverwithhighjittert DE-627 ger DE-627 rakwb eng 000 620 DNB Kim, Young-Ju verfasserin aut A 9.6 Gb/s 0.96 mW/Gb/s Forwarded Clock Receiver With High Jitter Tolerance Using Mixing Cell Integrated Injection-Locked Oscillator 2015 Text txt rdacontent ohne Hilfsmittel zu benutzen n rdamedia Band nc rdacarrier This paper presents a forwarded-clock receiver using a mixing cell integrated injection-locked oscillator (MIILO) and an I/Q generator based on injection-locked oscillator (IQGILO). By using MIILO, jitter tolerance is enhanced by about 1.8 times at high frequency compared to using a conventional injection-locked oscillator. In addition, the proposed receiver is robust against power supply induced jitter (PSIJ) caused by a clock distribution network because jitter tracking bandwidth of IQGILO is always lower than peak frequency of PSIJ regardless of latency mismatch between data and clock. The test chip achieves 9.6 Gb/s data rate with 0.96 mW/Gb/s and occupies only 0.0162 {\rm mm}^{2} in a 1 V 65 nm CMOS. injection-locked oscillator Data-jitter mixer Timing Jitter Computer architecture forwarded clock receiver Clocks Correlation jitter correlation quarter-rate clocking Microprocessors Receivers Chung, Sang-Hye oth Ha, Kyung-Soo oth Bae, Seung-Jun oth Kim, Lee-Sup oth Enthalten in IEEE transactions on circuits and systems / 1 New York, NY : Institute of Electrical and Electronics Engineers, 1992 62(2015), 10, Seite 2495-2503 (DE-627)131043080 (DE-600)1100194-X (DE-576)02804679X 1549-8328 nnns volume:62 year:2015 number:10 pages:2495-2503 http://dx.doi.org/10.1109/TCSI.2015.2459557 Volltext http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=7234952 http://search.proquest.com/docview/1729175340 GBV_USEFLAG_A SYSFLAG_A GBV_OLC SSG-OLC-TEC SSG-OLC-MAT GBV_ILN_30 GBV_ILN_70 GBV_ILN_2002 GBV_ILN_2005 GBV_ILN_2059 AR 62 2015 10 2495-2503 |
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10.1109/TCSI.2015.2459557 doi PQ20160617 (DE-627)OLC1959252461 (DE-599)GBVOLC1959252461 (PRQ)i1693-36e414fcff47bb5f1800b1bf3a9f4c96bda1ac758f32992ecd1c1b9ebca52d150 (KEY)021396692015000006200100249596gbs096mwgbsforwardedclockreceiverwithhighjittert DE-627 ger DE-627 rakwb eng 000 620 DNB Kim, Young-Ju verfasserin aut A 9.6 Gb/s 0.96 mW/Gb/s Forwarded Clock Receiver With High Jitter Tolerance Using Mixing Cell Integrated Injection-Locked Oscillator 2015 Text txt rdacontent ohne Hilfsmittel zu benutzen n rdamedia Band nc rdacarrier This paper presents a forwarded-clock receiver using a mixing cell integrated injection-locked oscillator (MIILO) and an I/Q generator based on injection-locked oscillator (IQGILO). By using MIILO, jitter tolerance is enhanced by about 1.8 times at high frequency compared to using a conventional injection-locked oscillator. In addition, the proposed receiver is robust against power supply induced jitter (PSIJ) caused by a clock distribution network because jitter tracking bandwidth of IQGILO is always lower than peak frequency of PSIJ regardless of latency mismatch between data and clock. The test chip achieves 9.6 Gb/s data rate with 0.96 mW/Gb/s and occupies only 0.0162 {\rm mm}^{2} in a 1 V 65 nm CMOS. injection-locked oscillator Data-jitter mixer Timing Jitter Computer architecture forwarded clock receiver Clocks Correlation jitter correlation quarter-rate clocking Microprocessors Receivers Chung, Sang-Hye oth Ha, Kyung-Soo oth Bae, Seung-Jun oth Kim, Lee-Sup oth Enthalten in IEEE transactions on circuits and systems / 1 New York, NY : Institute of Electrical and Electronics Engineers, 1992 62(2015), 10, Seite 2495-2503 (DE-627)131043080 (DE-600)1100194-X (DE-576)02804679X 1549-8328 nnns volume:62 year:2015 number:10 pages:2495-2503 http://dx.doi.org/10.1109/TCSI.2015.2459557 Volltext http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=7234952 http://search.proquest.com/docview/1729175340 GBV_USEFLAG_A SYSFLAG_A GBV_OLC SSG-OLC-TEC SSG-OLC-MAT GBV_ILN_30 GBV_ILN_70 GBV_ILN_2002 GBV_ILN_2005 GBV_ILN_2059 AR 62 2015 10 2495-2503 |
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10.1109/TCSI.2015.2459557 doi PQ20160617 (DE-627)OLC1959252461 (DE-599)GBVOLC1959252461 (PRQ)i1693-36e414fcff47bb5f1800b1bf3a9f4c96bda1ac758f32992ecd1c1b9ebca52d150 (KEY)021396692015000006200100249596gbs096mwgbsforwardedclockreceiverwithhighjittert DE-627 ger DE-627 rakwb eng 000 620 DNB Kim, Young-Ju verfasserin aut A 9.6 Gb/s 0.96 mW/Gb/s Forwarded Clock Receiver With High Jitter Tolerance Using Mixing Cell Integrated Injection-Locked Oscillator 2015 Text txt rdacontent ohne Hilfsmittel zu benutzen n rdamedia Band nc rdacarrier This paper presents a forwarded-clock receiver using a mixing cell integrated injection-locked oscillator (MIILO) and an I/Q generator based on injection-locked oscillator (IQGILO). By using MIILO, jitter tolerance is enhanced by about 1.8 times at high frequency compared to using a conventional injection-locked oscillator. In addition, the proposed receiver is robust against power supply induced jitter (PSIJ) caused by a clock distribution network because jitter tracking bandwidth of IQGILO is always lower than peak frequency of PSIJ regardless of latency mismatch between data and clock. The test chip achieves 9.6 Gb/s data rate with 0.96 mW/Gb/s and occupies only 0.0162 {\rm mm}^{2} in a 1 V 65 nm CMOS. injection-locked oscillator Data-jitter mixer Timing Jitter Computer architecture forwarded clock receiver Clocks Correlation jitter correlation quarter-rate clocking Microprocessors Receivers Chung, Sang-Hye oth Ha, Kyung-Soo oth Bae, Seung-Jun oth Kim, Lee-Sup oth Enthalten in IEEE transactions on circuits and systems / 1 New York, NY : Institute of Electrical and Electronics Engineers, 1992 62(2015), 10, Seite 2495-2503 (DE-627)131043080 (DE-600)1100194-X (DE-576)02804679X 1549-8328 nnns volume:62 year:2015 number:10 pages:2495-2503 http://dx.doi.org/10.1109/TCSI.2015.2459557 Volltext http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=7234952 http://search.proquest.com/docview/1729175340 GBV_USEFLAG_A SYSFLAG_A GBV_OLC SSG-OLC-TEC SSG-OLC-MAT GBV_ILN_30 GBV_ILN_70 GBV_ILN_2002 GBV_ILN_2005 GBV_ILN_2059 AR 62 2015 10 2495-2503 |
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9.6 gb/s 0.96 mw/gb/s forwarded clock receiver with high jitter tolerance using mixing cell integrated injection-locked oscillator |
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A 9.6 Gb/s 0.96 mW/Gb/s Forwarded Clock Receiver With High Jitter Tolerance Using Mixing Cell Integrated Injection-Locked Oscillator |
| abstract |
This paper presents a forwarded-clock receiver using a mixing cell integrated injection-locked oscillator (MIILO) and an I/Q generator based on injection-locked oscillator (IQGILO). By using MIILO, jitter tolerance is enhanced by about 1.8 times at high frequency compared to using a conventional injection-locked oscillator. In addition, the proposed receiver is robust against power supply induced jitter (PSIJ) caused by a clock distribution network because jitter tracking bandwidth of IQGILO is always lower than peak frequency of PSIJ regardless of latency mismatch between data and clock. The test chip achieves 9.6 Gb/s data rate with 0.96 mW/Gb/s and occupies only 0.0162 {\rm mm}^{2} in a 1 V 65 nm CMOS. |
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This paper presents a forwarded-clock receiver using a mixing cell integrated injection-locked oscillator (MIILO) and an I/Q generator based on injection-locked oscillator (IQGILO). By using MIILO, jitter tolerance is enhanced by about 1.8 times at high frequency compared to using a conventional injection-locked oscillator. In addition, the proposed receiver is robust against power supply induced jitter (PSIJ) caused by a clock distribution network because jitter tracking bandwidth of IQGILO is always lower than peak frequency of PSIJ regardless of latency mismatch between data and clock. The test chip achieves 9.6 Gb/s data rate with 0.96 mW/Gb/s and occupies only 0.0162 {\rm mm}^{2} in a 1 V 65 nm CMOS. |
| abstract_unstemmed |
This paper presents a forwarded-clock receiver using a mixing cell integrated injection-locked oscillator (MIILO) and an I/Q generator based on injection-locked oscillator (IQGILO). By using MIILO, jitter tolerance is enhanced by about 1.8 times at high frequency compared to using a conventional injection-locked oscillator. In addition, the proposed receiver is robust against power supply induced jitter (PSIJ) caused by a clock distribution network because jitter tracking bandwidth of IQGILO is always lower than peak frequency of PSIJ regardless of latency mismatch between data and clock. The test chip achieves 9.6 Gb/s data rate with 0.96 mW/Gb/s and occupies only 0.0162 {\rm mm}^{2} in a 1 V 65 nm CMOS. |
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A 9.6 Gb/s 0.96 mW/Gb/s Forwarded Clock Receiver With High Jitter Tolerance Using Mixing Cell Integrated Injection-Locked Oscillator |
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