Development of an Ultralow-Power Injection-Locked PSK Receiver Architecture
The development of a novel receiver topology for ultralow-power applications, such as radio-frequency (RF) identification and wireless sensor networks, is presented in this brief. The receiver makes use of an injection-locked oscillator, which can also be used as an exact time reference. By applying...
Ausführliche Beschreibung
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| Autor*in: |
De Smedt, Valentijn [verfasserIn] |
|---|
| Format: |
Artikel |
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| Sprache: |
Englisch |
| Erschienen: |
2015 |
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| Schlagwörter: |
radio-frequency identification ultralow-power injection-locked PSK receiver architecture development |
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| Übergeordnetes Werk: |
Enthalten in: IEEE transactions on circuits and systems / 2 - New York, NY : Institute of Electrical and Electronics Engineers, 1992, 62(2015), 1, Seite 31-35 |
|---|---|
| Übergeordnetes Werk: |
volume:62 ; year:2015 ; number:1 ; pages:31-35 |
| Links: |
|---|
| DOI / URN: |
10.1109/TCSII.2014.2362631 |
|---|
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OLC195925474X |
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| 520 | |a The development of a novel receiver topology for ultralow-power applications, such as radio-frequency (RF) identification and wireless sensor networks, is presented in this brief. The receiver makes use of an injection-locked oscillator, which can also be used as an exact time reference. By applying phase steps to the injected RF signal, the injection-locked oscillator temporarily loses its lock condition. This can be detected by a simple digital phase detector. By modulating the time between these phase steps, a bit stream is encoded and the circuit is used as a low-data-rate receiver. Since the circuit overhead, as compared to the injection-locked time reference itself, only consists of a few digital gates, the architecture is suitable for use in ultralow-power applications. Starting from Adler's equation for injection-locked oscillators, the behavior of the receiver is theoretically explained and the maximum data bandwidth is determined. This is compared to simulation results and measured data of a 40-nm CMOS implementation. | ||
| 650 | 4 | |a RFID | |
| 650 | 4 | |a digital gates | |
| 650 | 4 | |a Adler equation | |
| 650 | 4 | |a Adler's equation | |
| 650 | 4 | |a WSN | |
| 650 | 4 | |a Topology | |
| 650 | 4 | |a injection locked oscillators | |
| 650 | 4 | |a digital phase detector | |
| 650 | 4 | |a receiver topology | |
| 650 | 4 | |a radio-frequency identification | |
| 650 | 4 | |a injection-locked oscillators | |
| 650 | 4 | |a radiofrequency identification | |
| 650 | 4 | |a phase shift keying | |
| 650 | 4 | |a Injection-locking | |
| 650 | 4 | |a wireless sensor networks | |
| 650 | 4 | |a Lowpower | |
| 650 | 4 | |a exact time reference | |
| 650 | 4 | |a Detectors | |
| 650 | 4 | |a radio receivers | |
| 650 | 4 | |a CMOS integrated circuits | |
| 650 | 4 | |a Clocks | |
| 650 | 4 | |a ultralow-power injection-locked PSK receiver architecture development | |
| 650 | 4 | |a low-data-rate receiver | |
| 650 | 4 | |a bit stream | |
| 650 | 4 | |a circuit overhead | |
| 650 | 4 | |a logic gates | |
| 650 | 4 | |a 40-nm CMOS implementation | |
| 650 | 4 | |a Receivers | |
| 650 | 4 | |a Television broadcasting | |
| 650 | 4 | |a Measurement | |
| 650 | 4 | |a Integrated circuits | |
| 650 | 4 | |a Oscillators (Electronics) | |
| 650 | 4 | |a Complementary metal oxide semiconductors | |
| 650 | 4 | |a Design and construction | |
| 650 | 4 | |a Usage | |
| 650 | 4 | |a Semiconductor chips | |
| 650 | 4 | |a Bandwidth | |
| 700 | 1 | |a Gielen, Georges |4 oth | |
| 700 | 1 | |a Dehaene, Wim |4 oth | |
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10.1109/TCSII.2014.2362631 doi PQ20160617 (DE-627)OLC195925474X (DE-599)GBVOLC195925474X (PRQ)c2647-ebb859a790f8e14f54783c4167a8bb998819f7ffb96f6451e5a46a69881c1dba0 (KEY)0213975820150000062000100031developmentofanultralowpowerinjectionlockedpskrece DE-627 ger DE-627 rakwb eng 000 620 DNB De Smedt, Valentijn verfasserin aut Development of an Ultralow-Power Injection-Locked PSK Receiver Architecture 2015 Text txt rdacontent ohne Hilfsmittel zu benutzen n rdamedia Band nc rdacarrier The development of a novel receiver topology for ultralow-power applications, such as radio-frequency (RF) identification and wireless sensor networks, is presented in this brief. The receiver makes use of an injection-locked oscillator, which can also be used as an exact time reference. By applying phase steps to the injected RF signal, the injection-locked oscillator temporarily loses its lock condition. This can be detected by a simple digital phase detector. By modulating the time between these phase steps, a bit stream is encoded and the circuit is used as a low-data-rate receiver. Since the circuit overhead, as compared to the injection-locked time reference itself, only consists of a few digital gates, the architecture is suitable for use in ultralow-power applications. Starting from Adler's equation for injection-locked oscillators, the behavior of the receiver is theoretically explained and the maximum data bandwidth is determined. This is compared to simulation results and measured data of a 40-nm CMOS implementation. RFID digital gates Adler equation Adler's equation WSN Topology injection locked oscillators digital phase detector receiver topology radio-frequency identification injection-locked oscillators radiofrequency identification phase shift keying Injection-locking wireless sensor networks Lowpower exact time reference Detectors radio receivers CMOS integrated circuits Clocks ultralow-power injection-locked PSK receiver architecture development low-data-rate receiver bit stream circuit overhead logic gates 40-nm CMOS implementation Receivers Television broadcasting Measurement Integrated circuits Oscillators (Electronics) Complementary metal oxide semiconductors Design and construction Usage Semiconductor chips Bandwidth Gielen, Georges oth Dehaene, Wim oth Enthalten in IEEE transactions on circuits and systems / 2 New York, NY : Institute of Electrical and Electronics Engineers, 1992 62(2015), 1, Seite 31-35 (DE-627)131044753 (DE-600)1100793-X (DE-576)028047451 1549-7747 nnns volume:62 year:2015 number:1 pages:31-35 http://dx.doi.org/10.1109/TCSII.2014.2362631 Volltext http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=6922513 http://search.proquest.com/docview/1642128075 GBV_USEFLAG_A SYSFLAG_A GBV_OLC SSG-OLC-TEC SSG-OLC-MAT GBV_ILN_70 GBV_ILN_2002 GBV_ILN_2005 AR 62 2015 1 31-35 |
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10.1109/TCSII.2014.2362631 doi PQ20160617 (DE-627)OLC195925474X (DE-599)GBVOLC195925474X (PRQ)c2647-ebb859a790f8e14f54783c4167a8bb998819f7ffb96f6451e5a46a69881c1dba0 (KEY)0213975820150000062000100031developmentofanultralowpowerinjectionlockedpskrece DE-627 ger DE-627 rakwb eng 000 620 DNB De Smedt, Valentijn verfasserin aut Development of an Ultralow-Power Injection-Locked PSK Receiver Architecture 2015 Text txt rdacontent ohne Hilfsmittel zu benutzen n rdamedia Band nc rdacarrier The development of a novel receiver topology for ultralow-power applications, such as radio-frequency (RF) identification and wireless sensor networks, is presented in this brief. The receiver makes use of an injection-locked oscillator, which can also be used as an exact time reference. By applying phase steps to the injected RF signal, the injection-locked oscillator temporarily loses its lock condition. This can be detected by a simple digital phase detector. By modulating the time between these phase steps, a bit stream is encoded and the circuit is used as a low-data-rate receiver. Since the circuit overhead, as compared to the injection-locked time reference itself, only consists of a few digital gates, the architecture is suitable for use in ultralow-power applications. Starting from Adler's equation for injection-locked oscillators, the behavior of the receiver is theoretically explained and the maximum data bandwidth is determined. This is compared to simulation results and measured data of a 40-nm CMOS implementation. RFID digital gates Adler equation Adler's equation WSN Topology injection locked oscillators digital phase detector receiver topology radio-frequency identification injection-locked oscillators radiofrequency identification phase shift keying Injection-locking wireless sensor networks Lowpower exact time reference Detectors radio receivers CMOS integrated circuits Clocks ultralow-power injection-locked PSK receiver architecture development low-data-rate receiver bit stream circuit overhead logic gates 40-nm CMOS implementation Receivers Television broadcasting Measurement Integrated circuits Oscillators (Electronics) Complementary metal oxide semiconductors Design and construction Usage Semiconductor chips Bandwidth Gielen, Georges oth Dehaene, Wim oth Enthalten in IEEE transactions on circuits and systems / 2 New York, NY : Institute of Electrical and Electronics Engineers, 1992 62(2015), 1, Seite 31-35 (DE-627)131044753 (DE-600)1100793-X (DE-576)028047451 1549-7747 nnns volume:62 year:2015 number:1 pages:31-35 http://dx.doi.org/10.1109/TCSII.2014.2362631 Volltext http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=6922513 http://search.proquest.com/docview/1642128075 GBV_USEFLAG_A SYSFLAG_A GBV_OLC SSG-OLC-TEC SSG-OLC-MAT GBV_ILN_70 GBV_ILN_2002 GBV_ILN_2005 AR 62 2015 1 31-35 |
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10.1109/TCSII.2014.2362631 doi PQ20160617 (DE-627)OLC195925474X (DE-599)GBVOLC195925474X (PRQ)c2647-ebb859a790f8e14f54783c4167a8bb998819f7ffb96f6451e5a46a69881c1dba0 (KEY)0213975820150000062000100031developmentofanultralowpowerinjectionlockedpskrece DE-627 ger DE-627 rakwb eng 000 620 DNB De Smedt, Valentijn verfasserin aut Development of an Ultralow-Power Injection-Locked PSK Receiver Architecture 2015 Text txt rdacontent ohne Hilfsmittel zu benutzen n rdamedia Band nc rdacarrier The development of a novel receiver topology for ultralow-power applications, such as radio-frequency (RF) identification and wireless sensor networks, is presented in this brief. The receiver makes use of an injection-locked oscillator, which can also be used as an exact time reference. By applying phase steps to the injected RF signal, the injection-locked oscillator temporarily loses its lock condition. This can be detected by a simple digital phase detector. By modulating the time between these phase steps, a bit stream is encoded and the circuit is used as a low-data-rate receiver. Since the circuit overhead, as compared to the injection-locked time reference itself, only consists of a few digital gates, the architecture is suitable for use in ultralow-power applications. Starting from Adler's equation for injection-locked oscillators, the behavior of the receiver is theoretically explained and the maximum data bandwidth is determined. This is compared to simulation results and measured data of a 40-nm CMOS implementation. RFID digital gates Adler equation Adler's equation WSN Topology injection locked oscillators digital phase detector receiver topology radio-frequency identification injection-locked oscillators radiofrequency identification phase shift keying Injection-locking wireless sensor networks Lowpower exact time reference Detectors radio receivers CMOS integrated circuits Clocks ultralow-power injection-locked PSK receiver architecture development low-data-rate receiver bit stream circuit overhead logic gates 40-nm CMOS implementation Receivers Television broadcasting Measurement Integrated circuits Oscillators (Electronics) Complementary metal oxide semiconductors Design and construction Usage Semiconductor chips Bandwidth Gielen, Georges oth Dehaene, Wim oth Enthalten in IEEE transactions on circuits and systems / 2 New York, NY : Institute of Electrical and Electronics Engineers, 1992 62(2015), 1, Seite 31-35 (DE-627)131044753 (DE-600)1100793-X (DE-576)028047451 1549-7747 nnns volume:62 year:2015 number:1 pages:31-35 http://dx.doi.org/10.1109/TCSII.2014.2362631 Volltext http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=6922513 http://search.proquest.com/docview/1642128075 GBV_USEFLAG_A SYSFLAG_A GBV_OLC SSG-OLC-TEC SSG-OLC-MAT GBV_ILN_70 GBV_ILN_2002 GBV_ILN_2005 AR 62 2015 1 31-35 |
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10.1109/TCSII.2014.2362631 doi PQ20160617 (DE-627)OLC195925474X (DE-599)GBVOLC195925474X (PRQ)c2647-ebb859a790f8e14f54783c4167a8bb998819f7ffb96f6451e5a46a69881c1dba0 (KEY)0213975820150000062000100031developmentofanultralowpowerinjectionlockedpskrece DE-627 ger DE-627 rakwb eng 000 620 DNB De Smedt, Valentijn verfasserin aut Development of an Ultralow-Power Injection-Locked PSK Receiver Architecture 2015 Text txt rdacontent ohne Hilfsmittel zu benutzen n rdamedia Band nc rdacarrier The development of a novel receiver topology for ultralow-power applications, such as radio-frequency (RF) identification and wireless sensor networks, is presented in this brief. The receiver makes use of an injection-locked oscillator, which can also be used as an exact time reference. By applying phase steps to the injected RF signal, the injection-locked oscillator temporarily loses its lock condition. This can be detected by a simple digital phase detector. By modulating the time between these phase steps, a bit stream is encoded and the circuit is used as a low-data-rate receiver. Since the circuit overhead, as compared to the injection-locked time reference itself, only consists of a few digital gates, the architecture is suitable for use in ultralow-power applications. Starting from Adler's equation for injection-locked oscillators, the behavior of the receiver is theoretically explained and the maximum data bandwidth is determined. This is compared to simulation results and measured data of a 40-nm CMOS implementation. RFID digital gates Adler equation Adler's equation WSN Topology injection locked oscillators digital phase detector receiver topology radio-frequency identification injection-locked oscillators radiofrequency identification phase shift keying Injection-locking wireless sensor networks Lowpower exact time reference Detectors radio receivers CMOS integrated circuits Clocks ultralow-power injection-locked PSK receiver architecture development low-data-rate receiver bit stream circuit overhead logic gates 40-nm CMOS implementation Receivers Television broadcasting Measurement Integrated circuits Oscillators (Electronics) Complementary metal oxide semiconductors Design and construction Usage Semiconductor chips Bandwidth Gielen, Georges oth Dehaene, Wim oth Enthalten in IEEE transactions on circuits and systems / 2 New York, NY : Institute of Electrical and Electronics Engineers, 1992 62(2015), 1, Seite 31-35 (DE-627)131044753 (DE-600)1100793-X (DE-576)028047451 1549-7747 nnns volume:62 year:2015 number:1 pages:31-35 http://dx.doi.org/10.1109/TCSII.2014.2362631 Volltext http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=6922513 http://search.proquest.com/docview/1642128075 GBV_USEFLAG_A SYSFLAG_A GBV_OLC SSG-OLC-TEC SSG-OLC-MAT GBV_ILN_70 GBV_ILN_2002 GBV_ILN_2005 AR 62 2015 1 31-35 |
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10.1109/TCSII.2014.2362631 doi PQ20160617 (DE-627)OLC195925474X (DE-599)GBVOLC195925474X (PRQ)c2647-ebb859a790f8e14f54783c4167a8bb998819f7ffb96f6451e5a46a69881c1dba0 (KEY)0213975820150000062000100031developmentofanultralowpowerinjectionlockedpskrece DE-627 ger DE-627 rakwb eng 000 620 DNB De Smedt, Valentijn verfasserin aut Development of an Ultralow-Power Injection-Locked PSK Receiver Architecture 2015 Text txt rdacontent ohne Hilfsmittel zu benutzen n rdamedia Band nc rdacarrier The development of a novel receiver topology for ultralow-power applications, such as radio-frequency (RF) identification and wireless sensor networks, is presented in this brief. The receiver makes use of an injection-locked oscillator, which can also be used as an exact time reference. By applying phase steps to the injected RF signal, the injection-locked oscillator temporarily loses its lock condition. This can be detected by a simple digital phase detector. By modulating the time between these phase steps, a bit stream is encoded and the circuit is used as a low-data-rate receiver. Since the circuit overhead, as compared to the injection-locked time reference itself, only consists of a few digital gates, the architecture is suitable for use in ultralow-power applications. Starting from Adler's equation for injection-locked oscillators, the behavior of the receiver is theoretically explained and the maximum data bandwidth is determined. This is compared to simulation results and measured data of a 40-nm CMOS implementation. RFID digital gates Adler equation Adler's equation WSN Topology injection locked oscillators digital phase detector receiver topology radio-frequency identification injection-locked oscillators radiofrequency identification phase shift keying Injection-locking wireless sensor networks Lowpower exact time reference Detectors radio receivers CMOS integrated circuits Clocks ultralow-power injection-locked PSK receiver architecture development low-data-rate receiver bit stream circuit overhead logic gates 40-nm CMOS implementation Receivers Television broadcasting Measurement Integrated circuits Oscillators (Electronics) Complementary metal oxide semiconductors Design and construction Usage Semiconductor chips Bandwidth Gielen, Georges oth Dehaene, Wim oth Enthalten in IEEE transactions on circuits and systems / 2 New York, NY : Institute of Electrical and Electronics Engineers, 1992 62(2015), 1, Seite 31-35 (DE-627)131044753 (DE-600)1100793-X (DE-576)028047451 1549-7747 nnns volume:62 year:2015 number:1 pages:31-35 http://dx.doi.org/10.1109/TCSII.2014.2362631 Volltext http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=6922513 http://search.proquest.com/docview/1642128075 GBV_USEFLAG_A SYSFLAG_A GBV_OLC SSG-OLC-TEC SSG-OLC-MAT GBV_ILN_70 GBV_ILN_2002 GBV_ILN_2005 AR 62 2015 1 31-35 |
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000 620 DNB Development of an Ultralow-Power Injection-Locked PSK Receiver Architecture RFID digital gates Adler equation Adler's equation WSN Topology injection locked oscillators digital phase detector receiver topology radio-frequency identification injection-locked oscillators radiofrequency identification phase shift keying Injection-locking wireless sensor networks Lowpower exact time reference Detectors radio receivers CMOS integrated circuits Clocks ultralow-power injection-locked PSK receiver architecture development low-data-rate receiver bit stream circuit overhead logic gates 40-nm CMOS implementation Receivers Television broadcasting Measurement Integrated circuits Oscillators (Electronics) Complementary metal oxide semiconductors Design and construction Usage Semiconductor chips Bandwidth |
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Development of an Ultralow-Power Injection-Locked PSK Receiver Architecture |
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The development of a novel receiver topology for ultralow-power applications, such as radio-frequency (RF) identification and wireless sensor networks, is presented in this brief. The receiver makes use of an injection-locked oscillator, which can also be used as an exact time reference. By applying phase steps to the injected RF signal, the injection-locked oscillator temporarily loses its lock condition. This can be detected by a simple digital phase detector. By modulating the time between these phase steps, a bit stream is encoded and the circuit is used as a low-data-rate receiver. Since the circuit overhead, as compared to the injection-locked time reference itself, only consists of a few digital gates, the architecture is suitable for use in ultralow-power applications. Starting from Adler's equation for injection-locked oscillators, the behavior of the receiver is theoretically explained and the maximum data bandwidth is determined. This is compared to simulation results and measured data of a 40-nm CMOS implementation. |
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The development of a novel receiver topology for ultralow-power applications, such as radio-frequency (RF) identification and wireless sensor networks, is presented in this brief. The receiver makes use of an injection-locked oscillator, which can also be used as an exact time reference. By applying phase steps to the injected RF signal, the injection-locked oscillator temporarily loses its lock condition. This can be detected by a simple digital phase detector. By modulating the time between these phase steps, a bit stream is encoded and the circuit is used as a low-data-rate receiver. Since the circuit overhead, as compared to the injection-locked time reference itself, only consists of a few digital gates, the architecture is suitable for use in ultralow-power applications. Starting from Adler's equation for injection-locked oscillators, the behavior of the receiver is theoretically explained and the maximum data bandwidth is determined. This is compared to simulation results and measured data of a 40-nm CMOS implementation. |
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The development of a novel receiver topology for ultralow-power applications, such as radio-frequency (RF) identification and wireless sensor networks, is presented in this brief. The receiver makes use of an injection-locked oscillator, which can also be used as an exact time reference. By applying phase steps to the injected RF signal, the injection-locked oscillator temporarily loses its lock condition. This can be detected by a simple digital phase detector. By modulating the time between these phase steps, a bit stream is encoded and the circuit is used as a low-data-rate receiver. Since the circuit overhead, as compared to the injection-locked time reference itself, only consists of a few digital gates, the architecture is suitable for use in ultralow-power applications. Starting from Adler's equation for injection-locked oscillators, the behavior of the receiver is theoretically explained and the maximum data bandwidth is determined. This is compared to simulation results and measured data of a 40-nm CMOS implementation. |
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