Measurements of Matching and Noise Performance of a Prototype Readout Chip in 40 nm CMOS Process for Hybrid Pixel Detectors

The paper presents a prototype integrated circuit built in a 40 nm CMOS process for readout of a hybrid pixel detector. The core of the IC constitutes a matrix of 18 ×24 pixels with the pixel size of 100 μm ×100 μm. The paper explains the functionality and the architecture of the IC, which is design...
Ausführliche Beschreibung

Gespeichert in:
Autor*in:

Maj, P [verfasserIn]

Grybos, P

Szczygiel, R

Kmon, P

Kleczek, R

Drozd, A

Otfinowski, P

Deptuch, G

Format:

Artikel

Sprache:

Englisch

Erschienen:

2015

Schlagwörter:

CMOS process

Transistors

photon counting

Integrated circuits

Photonics

Detectors

CMOS integrated circuits

standard single photon counting mode

Capacitance

hybrid pixel detectors

prototype integrated circuit

interpixel communication

readout electronics

Analog circuits

matching

x-ray detectors

Resistance

effective threshold dispersion

prototype readout chip

Noise

X-ray detection

Complementary metal oxide semiconductors

Analysis

Semiconductor chips

Übergeordnetes Werk:

Enthalten in: IEEE transactions on nuclear science - New York, NY : IEEE, 1963, 62(2015), 1, Seite 359-367

Übergeordnetes Werk:

volume:62 ; year:2015 ; number:1 ; pages:359-367

Links:

Volltext
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DOI / URN:

10.1109/TNS.2014.2385595

Katalog-ID:

OLC1966226861

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