Measurements of Matching and Noise Performance of a Prototype Readout Chip in 40 nm CMOS Process for Hybrid Pixel Detectors
The paper presents a prototype integrated circuit built in a 40 nm CMOS process for readout of a hybrid pixel detector. The core of the IC constitutes a matrix of 18 ×24 pixels with the pixel size of 100 μm ×100 μm. The paper explains the functionality and the architecture of the IC, which is design...
Ausführliche Beschreibung
Autor*in: |
Maj, P [verfasserIn] |
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Format: |
Artikel |
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Sprache: |
Englisch |
Erschienen: |
2015 |
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Schlagwörter: |
standard single photon counting mode effective threshold dispersion |
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Übergeordnetes Werk: |
Enthalten in: IEEE transactions on nuclear science - New York, NY : IEEE, 1963, 62(2015), 1, Seite 359-367 |
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Übergeordnetes Werk: |
volume:62 ; year:2015 ; number:1 ; pages:359-367 |
Links: |
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DOI / URN: |
10.1109/TNS.2014.2385595 |
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Katalog-ID: |
OLC1966226861 |
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520 | |a The paper presents a prototype integrated circuit built in a 40 nm CMOS process for readout of a hybrid pixel detector. The core of the IC constitutes a matrix of 18 ×24 pixels with the pixel size of 100 μm ×100 μm. The paper explains the functionality and the architecture of the IC, which is designed to operate in both the standard single photon counting mode and the single photon counting mode with interpixel communication to mitigate negative effects of charge sharing. This article focuses on the measurement results of the IC operating in the standard single photon counting mode. The measured ENC is 84e - rms (for the peaking time of 48 ns), the gain is 79.7 μV/e - , while the effective threshold dispersion is 21e - rms. | ||
650 | 4 | |a CMOS process | |
650 | 4 | |a Transistors | |
650 | 4 | |a photon counting | |
650 | 4 | |a Integrated circuits | |
650 | 4 | |a Photonics | |
650 | 4 | |a Detectors | |
650 | 4 | |a CMOS integrated circuits | |
650 | 4 | |a standard single photon counting mode | |
650 | 4 | |a Capacitance | |
650 | 4 | |a hybrid pixel detectors | |
650 | 4 | |a prototype integrated circuit | |
650 | 4 | |a interpixel communication | |
650 | 4 | |a readout electronics | |
650 | 4 | |a Analog circuits | |
650 | 4 | |a matching | |
650 | 4 | |a x-ray detectors | |
650 | 4 | |a Resistance | |
650 | 4 | |a effective threshold dispersion | |
650 | 4 | |a prototype readout chip | |
650 | 4 | |a Noise | |
650 | 4 | |a X-ray detection | |
650 | 4 | |a Complementary metal oxide semiconductors | |
650 | 4 | |a Analysis | |
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700 | 1 | |a Kleczek, R |4 oth | |
700 | 1 | |a Drozd, A |4 oth | |
700 | 1 | |a Otfinowski, P |4 oth | |
700 | 1 | |a Deptuch, G |4 oth | |
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10.1109/TNS.2014.2385595 doi PQ20160617 (DE-627)OLC1966226861 (DE-599)GBVOLC1966226861 (PRQ)c1292-cee6b1c543a5191014aeec672b29f163f4180eb41ee46b2678f2fc49ae3b5b860 (KEY)0054996720150000062000100359measurementsofmatchingandnoiseperformanceofaprotot DE-627 ger DE-627 rakwb eng 620 DNB Maj, P verfasserin aut Measurements of Matching and Noise Performance of a Prototype Readout Chip in 40 nm CMOS Process for Hybrid Pixel Detectors 2015 Text txt rdacontent ohne Hilfsmittel zu benutzen n rdamedia Band nc rdacarrier The paper presents a prototype integrated circuit built in a 40 nm CMOS process for readout of a hybrid pixel detector. The core of the IC constitutes a matrix of 18 ×24 pixels with the pixel size of 100 μm ×100 μm. The paper explains the functionality and the architecture of the IC, which is designed to operate in both the standard single photon counting mode and the single photon counting mode with interpixel communication to mitigate negative effects of charge sharing. This article focuses on the measurement results of the IC operating in the standard single photon counting mode. The measured ENC is 84e - rms (for the peaking time of 48 ns), the gain is 79.7 μV/e - , while the effective threshold dispersion is 21e - rms. CMOS process Transistors photon counting Integrated circuits Photonics Detectors CMOS integrated circuits standard single photon counting mode Capacitance hybrid pixel detectors prototype integrated circuit interpixel communication readout electronics Analog circuits matching x-ray detectors Resistance effective threshold dispersion prototype readout chip Noise X-ray detection Complementary metal oxide semiconductors Analysis Semiconductor chips Grybos, P oth Szczygiel, R oth Kmon, P oth Kleczek, R oth Drozd, A oth Otfinowski, P oth Deptuch, G oth Enthalten in IEEE transactions on nuclear science New York, NY : IEEE, 1963 62(2015), 1, Seite 359-367 (DE-627)129547352 (DE-600)218510-6 (DE-576)014998238 0018-9499 nnns volume:62 year:2015 number:1 pages:359-367 http://dx.doi.org/10.1109/TNS.2014.2385595 Volltext http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=7027239 GBV_USEFLAG_A SYSFLAG_A GBV_OLC SSG-OLC-TEC SSG-OLC-PHY SSG-OLC-PHA GBV_ILN_70 AR 62 2015 1 359-367 |
spelling |
10.1109/TNS.2014.2385595 doi PQ20160617 (DE-627)OLC1966226861 (DE-599)GBVOLC1966226861 (PRQ)c1292-cee6b1c543a5191014aeec672b29f163f4180eb41ee46b2678f2fc49ae3b5b860 (KEY)0054996720150000062000100359measurementsofmatchingandnoiseperformanceofaprotot DE-627 ger DE-627 rakwb eng 620 DNB Maj, P verfasserin aut Measurements of Matching and Noise Performance of a Prototype Readout Chip in 40 nm CMOS Process for Hybrid Pixel Detectors 2015 Text txt rdacontent ohne Hilfsmittel zu benutzen n rdamedia Band nc rdacarrier The paper presents a prototype integrated circuit built in a 40 nm CMOS process for readout of a hybrid pixel detector. The core of the IC constitutes a matrix of 18 ×24 pixels with the pixel size of 100 μm ×100 μm. The paper explains the functionality and the architecture of the IC, which is designed to operate in both the standard single photon counting mode and the single photon counting mode with interpixel communication to mitigate negative effects of charge sharing. This article focuses on the measurement results of the IC operating in the standard single photon counting mode. The measured ENC is 84e - rms (for the peaking time of 48 ns), the gain is 79.7 μV/e - , while the effective threshold dispersion is 21e - rms. CMOS process Transistors photon counting Integrated circuits Photonics Detectors CMOS integrated circuits standard single photon counting mode Capacitance hybrid pixel detectors prototype integrated circuit interpixel communication readout electronics Analog circuits matching x-ray detectors Resistance effective threshold dispersion prototype readout chip Noise X-ray detection Complementary metal oxide semiconductors Analysis Semiconductor chips Grybos, P oth Szczygiel, R oth Kmon, P oth Kleczek, R oth Drozd, A oth Otfinowski, P oth Deptuch, G oth Enthalten in IEEE transactions on nuclear science New York, NY : IEEE, 1963 62(2015), 1, Seite 359-367 (DE-627)129547352 (DE-600)218510-6 (DE-576)014998238 0018-9499 nnns volume:62 year:2015 number:1 pages:359-367 http://dx.doi.org/10.1109/TNS.2014.2385595 Volltext http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=7027239 GBV_USEFLAG_A SYSFLAG_A GBV_OLC SSG-OLC-TEC SSG-OLC-PHY SSG-OLC-PHA GBV_ILN_70 AR 62 2015 1 359-367 |
allfields_unstemmed |
10.1109/TNS.2014.2385595 doi PQ20160617 (DE-627)OLC1966226861 (DE-599)GBVOLC1966226861 (PRQ)c1292-cee6b1c543a5191014aeec672b29f163f4180eb41ee46b2678f2fc49ae3b5b860 (KEY)0054996720150000062000100359measurementsofmatchingandnoiseperformanceofaprotot DE-627 ger DE-627 rakwb eng 620 DNB Maj, P verfasserin aut Measurements of Matching and Noise Performance of a Prototype Readout Chip in 40 nm CMOS Process for Hybrid Pixel Detectors 2015 Text txt rdacontent ohne Hilfsmittel zu benutzen n rdamedia Band nc rdacarrier The paper presents a prototype integrated circuit built in a 40 nm CMOS process for readout of a hybrid pixel detector. The core of the IC constitutes a matrix of 18 ×24 pixels with the pixel size of 100 μm ×100 μm. The paper explains the functionality and the architecture of the IC, which is designed to operate in both the standard single photon counting mode and the single photon counting mode with interpixel communication to mitigate negative effects of charge sharing. This article focuses on the measurement results of the IC operating in the standard single photon counting mode. The measured ENC is 84e - rms (for the peaking time of 48 ns), the gain is 79.7 μV/e - , while the effective threshold dispersion is 21e - rms. CMOS process Transistors photon counting Integrated circuits Photonics Detectors CMOS integrated circuits standard single photon counting mode Capacitance hybrid pixel detectors prototype integrated circuit interpixel communication readout electronics Analog circuits matching x-ray detectors Resistance effective threshold dispersion prototype readout chip Noise X-ray detection Complementary metal oxide semiconductors Analysis Semiconductor chips Grybos, P oth Szczygiel, R oth Kmon, P oth Kleczek, R oth Drozd, A oth Otfinowski, P oth Deptuch, G oth Enthalten in IEEE transactions on nuclear science New York, NY : IEEE, 1963 62(2015), 1, Seite 359-367 (DE-627)129547352 (DE-600)218510-6 (DE-576)014998238 0018-9499 nnns volume:62 year:2015 number:1 pages:359-367 http://dx.doi.org/10.1109/TNS.2014.2385595 Volltext http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=7027239 GBV_USEFLAG_A SYSFLAG_A GBV_OLC SSG-OLC-TEC SSG-OLC-PHY SSG-OLC-PHA GBV_ILN_70 AR 62 2015 1 359-367 |
allfieldsGer |
10.1109/TNS.2014.2385595 doi PQ20160617 (DE-627)OLC1966226861 (DE-599)GBVOLC1966226861 (PRQ)c1292-cee6b1c543a5191014aeec672b29f163f4180eb41ee46b2678f2fc49ae3b5b860 (KEY)0054996720150000062000100359measurementsofmatchingandnoiseperformanceofaprotot DE-627 ger DE-627 rakwb eng 620 DNB Maj, P verfasserin aut Measurements of Matching and Noise Performance of a Prototype Readout Chip in 40 nm CMOS Process for Hybrid Pixel Detectors 2015 Text txt rdacontent ohne Hilfsmittel zu benutzen n rdamedia Band nc rdacarrier The paper presents a prototype integrated circuit built in a 40 nm CMOS process for readout of a hybrid pixel detector. The core of the IC constitutes a matrix of 18 ×24 pixels with the pixel size of 100 μm ×100 μm. The paper explains the functionality and the architecture of the IC, which is designed to operate in both the standard single photon counting mode and the single photon counting mode with interpixel communication to mitigate negative effects of charge sharing. This article focuses on the measurement results of the IC operating in the standard single photon counting mode. The measured ENC is 84e - rms (for the peaking time of 48 ns), the gain is 79.7 μV/e - , while the effective threshold dispersion is 21e - rms. CMOS process Transistors photon counting Integrated circuits Photonics Detectors CMOS integrated circuits standard single photon counting mode Capacitance hybrid pixel detectors prototype integrated circuit interpixel communication readout electronics Analog circuits matching x-ray detectors Resistance effective threshold dispersion prototype readout chip Noise X-ray detection Complementary metal oxide semiconductors Analysis Semiconductor chips Grybos, P oth Szczygiel, R oth Kmon, P oth Kleczek, R oth Drozd, A oth Otfinowski, P oth Deptuch, G oth Enthalten in IEEE transactions on nuclear science New York, NY : IEEE, 1963 62(2015), 1, Seite 359-367 (DE-627)129547352 (DE-600)218510-6 (DE-576)014998238 0018-9499 nnns volume:62 year:2015 number:1 pages:359-367 http://dx.doi.org/10.1109/TNS.2014.2385595 Volltext http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=7027239 GBV_USEFLAG_A SYSFLAG_A GBV_OLC SSG-OLC-TEC SSG-OLC-PHY SSG-OLC-PHA GBV_ILN_70 AR 62 2015 1 359-367 |
allfieldsSound |
10.1109/TNS.2014.2385595 doi PQ20160617 (DE-627)OLC1966226861 (DE-599)GBVOLC1966226861 (PRQ)c1292-cee6b1c543a5191014aeec672b29f163f4180eb41ee46b2678f2fc49ae3b5b860 (KEY)0054996720150000062000100359measurementsofmatchingandnoiseperformanceofaprotot DE-627 ger DE-627 rakwb eng 620 DNB Maj, P verfasserin aut Measurements of Matching and Noise Performance of a Prototype Readout Chip in 40 nm CMOS Process for Hybrid Pixel Detectors 2015 Text txt rdacontent ohne Hilfsmittel zu benutzen n rdamedia Band nc rdacarrier The paper presents a prototype integrated circuit built in a 40 nm CMOS process for readout of a hybrid pixel detector. The core of the IC constitutes a matrix of 18 ×24 pixels with the pixel size of 100 μm ×100 μm. The paper explains the functionality and the architecture of the IC, which is designed to operate in both the standard single photon counting mode and the single photon counting mode with interpixel communication to mitigate negative effects of charge sharing. This article focuses on the measurement results of the IC operating in the standard single photon counting mode. The measured ENC is 84e - rms (for the peaking time of 48 ns), the gain is 79.7 μV/e - , while the effective threshold dispersion is 21e - rms. CMOS process Transistors photon counting Integrated circuits Photonics Detectors CMOS integrated circuits standard single photon counting mode Capacitance hybrid pixel detectors prototype integrated circuit interpixel communication readout electronics Analog circuits matching x-ray detectors Resistance effective threshold dispersion prototype readout chip Noise X-ray detection Complementary metal oxide semiconductors Analysis Semiconductor chips Grybos, P oth Szczygiel, R oth Kmon, P oth Kleczek, R oth Drozd, A oth Otfinowski, P oth Deptuch, G oth Enthalten in IEEE transactions on nuclear science New York, NY : IEEE, 1963 62(2015), 1, Seite 359-367 (DE-627)129547352 (DE-600)218510-6 (DE-576)014998238 0018-9499 nnns volume:62 year:2015 number:1 pages:359-367 http://dx.doi.org/10.1109/TNS.2014.2385595 Volltext http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=7027239 GBV_USEFLAG_A SYSFLAG_A GBV_OLC SSG-OLC-TEC SSG-OLC-PHY SSG-OLC-PHA GBV_ILN_70 AR 62 2015 1 359-367 |
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Maj, P ddc 620 misc CMOS process misc Transistors misc photon counting misc Integrated circuits misc Photonics misc Detectors misc CMOS integrated circuits misc standard single photon counting mode misc Capacitance misc hybrid pixel detectors misc prototype integrated circuit misc interpixel communication misc readout electronics misc Analog circuits misc matching misc x-ray detectors misc Resistance misc effective threshold dispersion misc prototype readout chip misc Noise misc X-ray detection misc Complementary metal oxide semiconductors misc Analysis misc Semiconductor chips Measurements of Matching and Noise Performance of a Prototype Readout Chip in 40 nm CMOS Process for Hybrid Pixel Detectors |
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620 DNB Measurements of Matching and Noise Performance of a Prototype Readout Chip in 40 nm CMOS Process for Hybrid Pixel Detectors CMOS process Transistors photon counting Integrated circuits Photonics Detectors CMOS integrated circuits standard single photon counting mode Capacitance hybrid pixel detectors prototype integrated circuit interpixel communication readout electronics Analog circuits matching x-ray detectors Resistance effective threshold dispersion prototype readout chip Noise X-ray detection Complementary metal oxide semiconductors Analysis Semiconductor chips |
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ddc 620 misc CMOS process misc Transistors misc photon counting misc Integrated circuits misc Photonics misc Detectors misc CMOS integrated circuits misc standard single photon counting mode misc Capacitance misc hybrid pixel detectors misc prototype integrated circuit misc interpixel communication misc readout electronics misc Analog circuits misc matching misc x-ray detectors misc Resistance misc effective threshold dispersion misc prototype readout chip misc Noise misc X-ray detection misc Complementary metal oxide semiconductors misc Analysis misc Semiconductor chips |
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ddc 620 misc CMOS process misc Transistors misc photon counting misc Integrated circuits misc Photonics misc Detectors misc CMOS integrated circuits misc standard single photon counting mode misc Capacitance misc hybrid pixel detectors misc prototype integrated circuit misc interpixel communication misc readout electronics misc Analog circuits misc matching misc x-ray detectors misc Resistance misc effective threshold dispersion misc prototype readout chip misc Noise misc X-ray detection misc Complementary metal oxide semiconductors misc Analysis misc Semiconductor chips |
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ddc 620 misc CMOS process misc Transistors misc photon counting misc Integrated circuits misc Photonics misc Detectors misc CMOS integrated circuits misc standard single photon counting mode misc Capacitance misc hybrid pixel detectors misc prototype integrated circuit misc interpixel communication misc readout electronics misc Analog circuits misc matching misc x-ray detectors misc Resistance misc effective threshold dispersion misc prototype readout chip misc Noise misc X-ray detection misc Complementary metal oxide semiconductors misc Analysis misc Semiconductor chips |
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Measurements of Matching and Noise Performance of a Prototype Readout Chip in 40 nm CMOS Process for Hybrid Pixel Detectors |
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Measurements of Matching and Noise Performance of a Prototype Readout Chip in 40 nm CMOS Process for Hybrid Pixel Detectors |
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measurements of matching and noise performance of a prototype readout chip in 40 nm cmos process for hybrid pixel detectors |
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Measurements of Matching and Noise Performance of a Prototype Readout Chip in 40 nm CMOS Process for Hybrid Pixel Detectors |
abstract |
The paper presents a prototype integrated circuit built in a 40 nm CMOS process for readout of a hybrid pixel detector. The core of the IC constitutes a matrix of 18 ×24 pixels with the pixel size of 100 μm ×100 μm. The paper explains the functionality and the architecture of the IC, which is designed to operate in both the standard single photon counting mode and the single photon counting mode with interpixel communication to mitigate negative effects of charge sharing. This article focuses on the measurement results of the IC operating in the standard single photon counting mode. The measured ENC is 84e - rms (for the peaking time of 48 ns), the gain is 79.7 μV/e - , while the effective threshold dispersion is 21e - rms. |
abstractGer |
The paper presents a prototype integrated circuit built in a 40 nm CMOS process for readout of a hybrid pixel detector. The core of the IC constitutes a matrix of 18 ×24 pixels with the pixel size of 100 μm ×100 μm. The paper explains the functionality and the architecture of the IC, which is designed to operate in both the standard single photon counting mode and the single photon counting mode with interpixel communication to mitigate negative effects of charge sharing. This article focuses on the measurement results of the IC operating in the standard single photon counting mode. The measured ENC is 84e - rms (for the peaking time of 48 ns), the gain is 79.7 μV/e - , while the effective threshold dispersion is 21e - rms. |
abstract_unstemmed |
The paper presents a prototype integrated circuit built in a 40 nm CMOS process for readout of a hybrid pixel detector. The core of the IC constitutes a matrix of 18 ×24 pixels with the pixel size of 100 μm ×100 μm. The paper explains the functionality and the architecture of the IC, which is designed to operate in both the standard single photon counting mode and the single photon counting mode with interpixel communication to mitigate negative effects of charge sharing. This article focuses on the measurement results of the IC operating in the standard single photon counting mode. The measured ENC is 84e - rms (for the peaking time of 48 ns), the gain is 79.7 μV/e - , while the effective threshold dispersion is 21e - rms. |
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Measurements of Matching and Noise Performance of a Prototype Readout Chip in 40 nm CMOS Process for Hybrid Pixel Detectors |
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http://dx.doi.org/10.1109/TNS.2014.2385595 http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=7027239 |
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Grybos, P Szczygiel, R Kmon, P Kleczek, R Drozd, A Otfinowski, P Deptuch, G |
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