An Add-On Type Real-Time Jitter Tolerance Enhancer for Digital Communication Receivers

An add-on type real-time jitter tolerance enhancer (JTE) is presented in this paper. The proposed JTE can improve high-frequency jitter tolerance (JTOL) by using a real-time phase alignment scheme. A mathematical analysis for an advanced bit error rate (BER) prediction method is also introduced. The...
Ausführliche Beschreibung

Gespeichert in:

Autor*in:	Hwang, Sewook [verfasserIn] Song, Junyoung Bae, Sang-Geun Lee, Yeonho Kim, Chulwoo

Format:	Artikel
Sprache:	Englisch

Erschienen:	2016

Schlagwörter:	Jitter Bit error rate (BER) Clocks Bit error rate jitter tolerance (JTOL) real-time jitter tolerance enhancer (JTE) receiver (Rx) Delay lines Receivers Delays

Übergeordnetes Werk:	Enthalten in: IEEE transactions on very large scale integration (VLSI) systems - New York, NY : Institute of Electrical and Electronics Engineers, 1993, 24(2016), 3, Seite 1092-1103
Übergeordnetes Werk:	volume:24 ; year:2016 ; number:3 ; pages:1092-1103

Links:	Volltext Link aufrufen

DOI / URN:	10.1109/TVLSI.2015.2435026

Katalog-ID:	OLC1973285142

Internformat


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520			\|a An add-on type real-time jitter tolerance enhancer (JTE) is presented in this paper. The proposed JTE can improve high-frequency jitter tolerance (JTOL) by using a real-time phase alignment scheme. A mathematical analysis for an advanced bit error rate (BER) prediction method is also introduced. The proposed circuit is applicable to various types of receivers, such as referenceless receivers, receivers with a reference clock source, and source-synchronous receivers. The referenceless receiver with the proposed JTE achieved an out-of-band JTOL of 0.71 UI<inline-formula> <tex-math notation="LaTeX">_{\mathrm { {pp}}} </tex-math></inline-formula> at 100 MHz with <inline-formula> <tex-math notation="LaTeX">< 10^{\mathrm { {-12}}} </tex-math></inline-formula> BER. This is 196% higher than a conventional receiver without the JTE. The source-synchronous receiver with the proposed JTE achieved 0.92 UI<inline-formula> <tex-math notation="LaTeX">_{\mathrm { {pp}}} </tex-math></inline-formula> at 300 MHz with <inline-formula> <tex-math notation="LaTeX">< 10^{\mathrm { {-12}}} </tex-math></inline-formula> BER. Total core areas of the receiver and JTE are 0.19 and 0.07 mm<inline-formula> <tex-math notation="LaTeX">^{\mathrm { {2}}} </tex-math></inline-formula> in a 0.13-<inline-formula> <tex-math notation="LaTeX">\mu \text{m} </tex-math></inline-formula> CMOS process, respectively. The power consumption of the receiver is 38 mW at 5.4 Gbit/s, and the JTE dissipates 22 mW.
650		4	\|a Jitter
650		4	\|a Bit error rate (BER)
650		4	\|a Clocks
650		4	\|a Bit error rate
650		4	\|a jitter tolerance (JTOL)
650		4	\|a real-time jitter tolerance enhancer (JTE)
650		4	\|a receiver (Rx)
650		4	\|a Delay lines
650		4	\|a Receivers
650		4	\|a Delays
700	1		\|a Song, Junyoung \|4 oth
700	1		\|a Bae, Sang-Geun \|4 oth
700	1		\|a Lee, Yeonho \|4 oth
700	1		\|a Kim, Chulwoo \|4 oth
773	0	8	\|i Enthalten in \|t IEEE transactions on very large scale integration (VLSI) systems \|d New York, NY : Institute of Electrical and Electronics Engineers, 1993 \|g 24(2016), 3, Seite 1092-1103 \|w (DE-627)165670282 \|w (DE-600)1151835-2 \|w (DE-576)034204024 \|x 1063-8210 \|7 nnns
773	1	8	\|g volume:24 \|g year:2016 \|g number:3 \|g pages:1092-1103
856	4	1	\|u http://dx.doi.org/10.1109/TVLSI.2015.2435026 \|3 Volltext
856	4	2	\|u http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=7123194
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951			\|a AR
952			\|d 24 \|j 2016 \|e 3 \|h 1092-1103

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allfields	10.1109/TVLSI.2015.2435026 doi PQ20160430 (DE-627)OLC1973285142 (DE-599)GBVOLC1973285142 (PRQ)c1325-b39c0fea85189057e5adf607571ef66d4b75bd61def3c0fca25ed1c76811916f0 (KEY)0226264920160000024000301092addontyperealtimejittertoleranceenhancerfordigital DE-627 ger DE-627 rakwb eng 004 620 DNB Hwang, Sewook verfasserin aut An Add-On Type Real-Time Jitter Tolerance Enhancer for Digital Communication Receivers 2016 Text txt rdacontent ohne Hilfsmittel zu benutzen n rdamedia Band nc rdacarrier An add-on type real-time jitter tolerance enhancer (JTE) is presented in this paper. The proposed JTE can improve high-frequency jitter tolerance (JTOL) by using a real-time phase alignment scheme. A mathematical analysis for an advanced bit error rate (BER) prediction method is also introduced. The proposed circuit is applicable to various types of receivers, such as referenceless receivers, receivers with a reference clock source, and source-synchronous receivers. The referenceless receiver with the proposed JTE achieved an out-of-band JTOL of 0.71 UI<inline-formula> <tex-math notation="LaTeX">_{\mathrm { {pp}}} </tex-math></inline-formula> at 100 MHz with <inline-formula> <tex-math notation="LaTeX">< 10^{\mathrm { {-12}}} </tex-math></inline-formula> BER. This is 196% higher than a conventional receiver without the JTE. The source-synchronous receiver with the proposed JTE achieved 0.92 UI<inline-formula> <tex-math notation="LaTeX">_{\mathrm { {pp}}} </tex-math></inline-formula> at 300 MHz with <inline-formula> <tex-math notation="LaTeX">< 10^{\mathrm { {-12}}} </tex-math></inline-formula> BER. Total core areas of the receiver and JTE are 0.19 and 0.07 mm<inline-formula> <tex-math notation="LaTeX">^{\mathrm { {2}}} </tex-math></inline-formula> in a 0.13-<inline-formula> <tex-math notation="LaTeX">\mu \text{m} </tex-math></inline-formula> CMOS process, respectively. The power consumption of the receiver is 38 mW at 5.4 Gbit/s, and the JTE dissipates 22 mW. Jitter Bit error rate (BER) Clocks Bit error rate jitter tolerance (JTOL) real-time jitter tolerance enhancer (JTE) receiver (Rx) Delay lines Receivers Delays Song, Junyoung oth Bae, Sang-Geun oth Lee, Yeonho oth Kim, Chulwoo oth Enthalten in IEEE transactions on very large scale integration (VLSI) systems New York, NY : Institute of Electrical and Electronics Engineers, 1993 24(2016), 3, Seite 1092-1103 (DE-627)165670282 (DE-600)1151835-2 (DE-576)034204024 1063-8210 nnns volume:24 year:2016 number:3 pages:1092-1103 http://dx.doi.org/10.1109/TVLSI.2015.2435026 Volltext http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=7123194 GBV_USEFLAG_A SYSFLAG_A GBV_OLC SSG-OLC-TEC SSG-OLC-MAT GBV_ILN_70 GBV_ILN_2002 AR 24 2016 3 1092-1103
spelling	10.1109/TVLSI.2015.2435026 doi PQ20160430 (DE-627)OLC1973285142 (DE-599)GBVOLC1973285142 (PRQ)c1325-b39c0fea85189057e5adf607571ef66d4b75bd61def3c0fca25ed1c76811916f0 (KEY)0226264920160000024000301092addontyperealtimejittertoleranceenhancerfordigital DE-627 ger DE-627 rakwb eng 004 620 DNB Hwang, Sewook verfasserin aut An Add-On Type Real-Time Jitter Tolerance Enhancer for Digital Communication Receivers 2016 Text txt rdacontent ohne Hilfsmittel zu benutzen n rdamedia Band nc rdacarrier An add-on type real-time jitter tolerance enhancer (JTE) is presented in this paper. The proposed JTE can improve high-frequency jitter tolerance (JTOL) by using a real-time phase alignment scheme. A mathematical analysis for an advanced bit error rate (BER) prediction method is also introduced. The proposed circuit is applicable to various types of receivers, such as referenceless receivers, receivers with a reference clock source, and source-synchronous receivers. The referenceless receiver with the proposed JTE achieved an out-of-band JTOL of 0.71 UI<inline-formula> <tex-math notation="LaTeX">_{\mathrm { {pp}}} </tex-math></inline-formula> at 100 MHz with <inline-formula> <tex-math notation="LaTeX">< 10^{\mathrm { {-12}}} </tex-math></inline-formula> BER. This is 196% higher than a conventional receiver without the JTE. The source-synchronous receiver with the proposed JTE achieved 0.92 UI<inline-formula> <tex-math notation="LaTeX">_{\mathrm { {pp}}} </tex-math></inline-formula> at 300 MHz with <inline-formula> <tex-math notation="LaTeX">< 10^{\mathrm { {-12}}} </tex-math></inline-formula> BER. Total core areas of the receiver and JTE are 0.19 and 0.07 mm<inline-formula> <tex-math notation="LaTeX">^{\mathrm { {2}}} </tex-math></inline-formula> in a 0.13-<inline-formula> <tex-math notation="LaTeX">\mu \text{m} </tex-math></inline-formula> CMOS process, respectively. The power consumption of the receiver is 38 mW at 5.4 Gbit/s, and the JTE dissipates 22 mW. Jitter Bit error rate (BER) Clocks Bit error rate jitter tolerance (JTOL) real-time jitter tolerance enhancer (JTE) receiver (Rx) Delay lines Receivers Delays Song, Junyoung oth Bae, Sang-Geun oth Lee, Yeonho oth Kim, Chulwoo oth Enthalten in IEEE transactions on very large scale integration (VLSI) systems New York, NY : Institute of Electrical and Electronics Engineers, 1993 24(2016), 3, Seite 1092-1103 (DE-627)165670282 (DE-600)1151835-2 (DE-576)034204024 1063-8210 nnns volume:24 year:2016 number:3 pages:1092-1103 http://dx.doi.org/10.1109/TVLSI.2015.2435026 Volltext http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=7123194 GBV_USEFLAG_A SYSFLAG_A GBV_OLC SSG-OLC-TEC SSG-OLC-MAT GBV_ILN_70 GBV_ILN_2002 AR 24 2016 3 1092-1103
allfields_unstemmed	10.1109/TVLSI.2015.2435026 doi PQ20160430 (DE-627)OLC1973285142 (DE-599)GBVOLC1973285142 (PRQ)c1325-b39c0fea85189057e5adf607571ef66d4b75bd61def3c0fca25ed1c76811916f0 (KEY)0226264920160000024000301092addontyperealtimejittertoleranceenhancerfordigital DE-627 ger DE-627 rakwb eng 004 620 DNB Hwang, Sewook verfasserin aut An Add-On Type Real-Time Jitter Tolerance Enhancer for Digital Communication Receivers 2016 Text txt rdacontent ohne Hilfsmittel zu benutzen n rdamedia Band nc rdacarrier An add-on type real-time jitter tolerance enhancer (JTE) is presented in this paper. The proposed JTE can improve high-frequency jitter tolerance (JTOL) by using a real-time phase alignment scheme. A mathematical analysis for an advanced bit error rate (BER) prediction method is also introduced. The proposed circuit is applicable to various types of receivers, such as referenceless receivers, receivers with a reference clock source, and source-synchronous receivers. The referenceless receiver with the proposed JTE achieved an out-of-band JTOL of 0.71 UI<inline-formula> <tex-math notation="LaTeX">_{\mathrm { {pp}}} </tex-math></inline-formula> at 100 MHz with <inline-formula> <tex-math notation="LaTeX">< 10^{\mathrm { {-12}}} </tex-math></inline-formula> BER. This is 196% higher than a conventional receiver without the JTE. The source-synchronous receiver with the proposed JTE achieved 0.92 UI<inline-formula> <tex-math notation="LaTeX">_{\mathrm { {pp}}} </tex-math></inline-formula> at 300 MHz with <inline-formula> <tex-math notation="LaTeX">< 10^{\mathrm { {-12}}} </tex-math></inline-formula> BER. Total core areas of the receiver and JTE are 0.19 and 0.07 mm<inline-formula> <tex-math notation="LaTeX">^{\mathrm { {2}}} </tex-math></inline-formula> in a 0.13-<inline-formula> <tex-math notation="LaTeX">\mu \text{m} </tex-math></inline-formula> CMOS process, respectively. The power consumption of the receiver is 38 mW at 5.4 Gbit/s, and the JTE dissipates 22 mW. Jitter Bit error rate (BER) Clocks Bit error rate jitter tolerance (JTOL) real-time jitter tolerance enhancer (JTE) receiver (Rx) Delay lines Receivers Delays Song, Junyoung oth Bae, Sang-Geun oth Lee, Yeonho oth Kim, Chulwoo oth Enthalten in IEEE transactions on very large scale integration (VLSI) systems New York, NY : Institute of Electrical and Electronics Engineers, 1993 24(2016), 3, Seite 1092-1103 (DE-627)165670282 (DE-600)1151835-2 (DE-576)034204024 1063-8210 nnns volume:24 year:2016 number:3 pages:1092-1103 http://dx.doi.org/10.1109/TVLSI.2015.2435026 Volltext http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=7123194 GBV_USEFLAG_A SYSFLAG_A GBV_OLC SSG-OLC-TEC SSG-OLC-MAT GBV_ILN_70 GBV_ILN_2002 AR 24 2016 3 1092-1103
allfieldsGer	10.1109/TVLSI.2015.2435026 doi PQ20160430 (DE-627)OLC1973285142 (DE-599)GBVOLC1973285142 (PRQ)c1325-b39c0fea85189057e5adf607571ef66d4b75bd61def3c0fca25ed1c76811916f0 (KEY)0226264920160000024000301092addontyperealtimejittertoleranceenhancerfordigital DE-627 ger DE-627 rakwb eng 004 620 DNB Hwang, Sewook verfasserin aut An Add-On Type Real-Time Jitter Tolerance Enhancer for Digital Communication Receivers 2016 Text txt rdacontent ohne Hilfsmittel zu benutzen n rdamedia Band nc rdacarrier An add-on type real-time jitter tolerance enhancer (JTE) is presented in this paper. The proposed JTE can improve high-frequency jitter tolerance (JTOL) by using a real-time phase alignment scheme. A mathematical analysis for an advanced bit error rate (BER) prediction method is also introduced. The proposed circuit is applicable to various types of receivers, such as referenceless receivers, receivers with a reference clock source, and source-synchronous receivers. The referenceless receiver with the proposed JTE achieved an out-of-band JTOL of 0.71 UI<inline-formula> <tex-math notation="LaTeX">_{\mathrm { {pp}}} </tex-math></inline-formula> at 100 MHz with <inline-formula> <tex-math notation="LaTeX">< 10^{\mathrm { {-12}}} </tex-math></inline-formula> BER. This is 196% higher than a conventional receiver without the JTE. The source-synchronous receiver with the proposed JTE achieved 0.92 UI<inline-formula> <tex-math notation="LaTeX">_{\mathrm { {pp}}} </tex-math></inline-formula> at 300 MHz with <inline-formula> <tex-math notation="LaTeX">< 10^{\mathrm { {-12}}} </tex-math></inline-formula> BER. Total core areas of the receiver and JTE are 0.19 and 0.07 mm<inline-formula> <tex-math notation="LaTeX">^{\mathrm { {2}}} </tex-math></inline-formula> in a 0.13-<inline-formula> <tex-math notation="LaTeX">\mu \text{m} </tex-math></inline-formula> CMOS process, respectively. The power consumption of the receiver is 38 mW at 5.4 Gbit/s, and the JTE dissipates 22 mW. Jitter Bit error rate (BER) Clocks Bit error rate jitter tolerance (JTOL) real-time jitter tolerance enhancer (JTE) receiver (Rx) Delay lines Receivers Delays Song, Junyoung oth Bae, Sang-Geun oth Lee, Yeonho oth Kim, Chulwoo oth Enthalten in IEEE transactions on very large scale integration (VLSI) systems New York, NY : Institute of Electrical and Electronics Engineers, 1993 24(2016), 3, Seite 1092-1103 (DE-627)165670282 (DE-600)1151835-2 (DE-576)034204024 1063-8210 nnns volume:24 year:2016 number:3 pages:1092-1103 http://dx.doi.org/10.1109/TVLSI.2015.2435026 Volltext http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=7123194 GBV_USEFLAG_A SYSFLAG_A GBV_OLC SSG-OLC-TEC SSG-OLC-MAT GBV_ILN_70 GBV_ILN_2002 AR 24 2016 3 1092-1103
allfieldsSound	10.1109/TVLSI.2015.2435026 doi PQ20160430 (DE-627)OLC1973285142 (DE-599)GBVOLC1973285142 (PRQ)c1325-b39c0fea85189057e5adf607571ef66d4b75bd61def3c0fca25ed1c76811916f0 (KEY)0226264920160000024000301092addontyperealtimejittertoleranceenhancerfordigital DE-627 ger DE-627 rakwb eng 004 620 DNB Hwang, Sewook verfasserin aut An Add-On Type Real-Time Jitter Tolerance Enhancer for Digital Communication Receivers 2016 Text txt rdacontent ohne Hilfsmittel zu benutzen n rdamedia Band nc rdacarrier An add-on type real-time jitter tolerance enhancer (JTE) is presented in this paper. The proposed JTE can improve high-frequency jitter tolerance (JTOL) by using a real-time phase alignment scheme. A mathematical analysis for an advanced bit error rate (BER) prediction method is also introduced. The proposed circuit is applicable to various types of receivers, such as referenceless receivers, receivers with a reference clock source, and source-synchronous receivers. The referenceless receiver with the proposed JTE achieved an out-of-band JTOL of 0.71 UI<inline-formula> <tex-math notation="LaTeX">_{\mathrm { {pp}}} </tex-math></inline-formula> at 100 MHz with <inline-formula> <tex-math notation="LaTeX">< 10^{\mathrm { {-12}}} </tex-math></inline-formula> BER. This is 196% higher than a conventional receiver without the JTE. The source-synchronous receiver with the proposed JTE achieved 0.92 UI<inline-formula> <tex-math notation="LaTeX">_{\mathrm { {pp}}} </tex-math></inline-formula> at 300 MHz with <inline-formula> <tex-math notation="LaTeX">< 10^{\mathrm { {-12}}} </tex-math></inline-formula> BER. Total core areas of the receiver and JTE are 0.19 and 0.07 mm<inline-formula> <tex-math notation="LaTeX">^{\mathrm { {2}}} </tex-math></inline-formula> in a 0.13-<inline-formula> <tex-math notation="LaTeX">\mu \text{m} </tex-math></inline-formula> CMOS process, respectively. The power consumption of the receiver is 38 mW at 5.4 Gbit/s, and the JTE dissipates 22 mW. Jitter Bit error rate (BER) Clocks Bit error rate jitter tolerance (JTOL) real-time jitter tolerance enhancer (JTE) receiver (Rx) Delay lines Receivers Delays Song, Junyoung oth Bae, Sang-Geun oth Lee, Yeonho oth Kim, Chulwoo oth Enthalten in IEEE transactions on very large scale integration (VLSI) systems New York, NY : Institute of Electrical and Electronics Engineers, 1993 24(2016), 3, Seite 1092-1103 (DE-627)165670282 (DE-600)1151835-2 (DE-576)034204024 1063-8210 nnns volume:24 year:2016 number:3 pages:1092-1103 http://dx.doi.org/10.1109/TVLSI.2015.2435026 Volltext http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=7123194 GBV_USEFLAG_A SYSFLAG_A GBV_OLC SSG-OLC-TEC SSG-OLC-MAT GBV_ILN_70 GBV_ILN_2002 AR 24 2016 3 1092-1103
language	English
source	Enthalten in IEEE transactions on very large scale integration (VLSI) systems 24(2016), 3, Seite 1092-1103 volume:24 year:2016 number:3 pages:1092-1103
sourceStr	Enthalten in IEEE transactions on very large scale integration (VLSI) systems 24(2016), 3, Seite 1092-1103 volume:24 year:2016 number:3 pages:1092-1103
format_phy_str_mv	Article
institution	findex.gbv.de
topic_facet	Jitter Bit error rate (BER) Clocks Bit error rate jitter tolerance (JTOL) real-time jitter tolerance enhancer (JTE) receiver (Rx) Delay lines Receivers Delays
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container_title	IEEE transactions on very large scale integration (VLSI) systems
authorswithroles_txt_mv	Hwang, Sewook @@aut@@ Song, Junyoung @@oth@@ Bae, Sang-Geun @@oth@@ Lee, Yeonho @@oth@@ Kim, Chulwoo @@oth@@
publishDateDaySort_date	2016-01-01T00:00:00Z
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fullrecord	<?xml version="1.0" encoding="UTF-8"?><collection xmlns="http://www.loc.gov/MARC21/slim"><record><leader>01000caa a2200265 4500</leader><controlfield tag="001">OLC1973285142</controlfield><controlfield tag="003">DE-627</controlfield><controlfield tag="005">20230714184417.0</controlfield><controlfield tag="007">tu</controlfield><controlfield tag="008">160427s2016 xx \|\|\|\|\| 00\| \|\|eng c</controlfield><datafield tag="024" ind1="7" ind2=" "><subfield code="a">10.1109/TVLSI.2015.2435026</subfield><subfield code="2">doi</subfield></datafield><datafield tag="028" ind1="5" ind2="2"><subfield code="a">PQ20160430</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(DE-627)OLC1973285142</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(DE-599)GBVOLC1973285142</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(PRQ)c1325-b39c0fea85189057e5adf607571ef66d4b75bd61def3c0fca25ed1c76811916f0</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(KEY)0226264920160000024000301092addontyperealtimejittertoleranceenhancerfordigital</subfield></datafield><datafield tag="040" ind1=" " ind2=" "><subfield code="a">DE-627</subfield><subfield code="b">ger</subfield><subfield code="c">DE-627</subfield><subfield code="e">rakwb</subfield></datafield><datafield tag="041" ind1=" " ind2=" "><subfield code="a">eng</subfield></datafield><datafield tag="082" ind1="0" ind2="4"><subfield code="a">004</subfield><subfield code="a">620</subfield><subfield code="q">DNB</subfield></datafield><datafield tag="100" ind1="1" ind2=" "><subfield code="a">Hwang, Sewook</subfield><subfield code="e">verfasserin</subfield><subfield code="4">aut</subfield></datafield><datafield tag="245" ind1="1" ind2="3"><subfield code="a">An Add-On Type Real-Time Jitter Tolerance Enhancer for Digital Communication Receivers</subfield></datafield><datafield tag="264" ind1=" " ind2="1"><subfield code="c">2016</subfield></datafield><datafield tag="336" ind1=" " ind2=" "><subfield code="a">Text</subfield><subfield code="b">txt</subfield><subfield code="2">rdacontent</subfield></datafield><datafield tag="337" ind1=" " ind2=" "><subfield code="a">ohne Hilfsmittel zu benutzen</subfield><subfield code="b">n</subfield><subfield code="2">rdamedia</subfield></datafield><datafield tag="338" ind1=" " ind2=" "><subfield code="a">Band</subfield><subfield code="b">nc</subfield><subfield code="2">rdacarrier</subfield></datafield><datafield tag="520" ind1=" " ind2=" "><subfield code="a">An add-on type real-time jitter tolerance enhancer (JTE) is presented in this paper. The proposed JTE can improve high-frequency jitter tolerance (JTOL) by using a real-time phase alignment scheme. A mathematical analysis for an advanced bit error rate (BER) prediction method is also introduced. The proposed circuit is applicable to various types of receivers, such as referenceless receivers, receivers with a reference clock source, and source-synchronous receivers. The referenceless receiver with the proposed JTE achieved an out-of-band JTOL of 0.71 UI<inline-formula> <tex-math notation="LaTeX">_{\mathrm { {pp}}} </tex-math></inline-formula> at 100 MHz with <inline-formula> <tex-math notation="LaTeX">< 10^{\mathrm { {-12}}} </tex-math></inline-formula> BER. This is 196% higher than a conventional receiver without the JTE. The source-synchronous receiver with the proposed JTE achieved 0.92 UI<inline-formula> <tex-math notation="LaTeX">_{\mathrm { {pp}}} </tex-math></inline-formula> at 300 MHz with <inline-formula> <tex-math notation="LaTeX">< 10^{\mathrm { {-12}}} </tex-math></inline-formula> BER. Total core areas of the receiver and JTE are 0.19 and 0.07 mm<inline-formula> <tex-math notation="LaTeX">^{\mathrm { {2}}} </tex-math></inline-formula> in a 0.13-<inline-formula> <tex-math notation="LaTeX">\mu \text{m} </tex-math></inline-formula> CMOS process, respectively. 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author	Hwang, Sewook
spellingShingle	Hwang, Sewook ddc 004 misc Jitter misc Bit error rate (BER) misc Clocks misc Bit error rate misc jitter tolerance (JTOL) misc real-time jitter tolerance enhancer (JTE) misc receiver (Rx) misc Delay lines misc Receivers misc Delays An Add-On Type Real-Time Jitter Tolerance Enhancer for Digital Communication Receivers
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topic_title	004 620 DNB An Add-On Type Real-Time Jitter Tolerance Enhancer for Digital Communication Receivers Jitter Bit error rate (BER) Clocks Bit error rate jitter tolerance (JTOL) real-time jitter tolerance enhancer (JTE) receiver (Rx) Delay lines Receivers Delays
topic	ddc 004 misc Jitter misc Bit error rate (BER) misc Clocks misc Bit error rate misc jitter tolerance (JTOL) misc real-time jitter tolerance enhancer (JTE) misc receiver (Rx) misc Delay lines misc Receivers misc Delays
topic_unstemmed	ddc 004 misc Jitter misc Bit error rate (BER) misc Clocks misc Bit error rate misc jitter tolerance (JTOL) misc real-time jitter tolerance enhancer (JTE) misc receiver (Rx) misc Delay lines misc Receivers misc Delays
topic_browse	ddc 004 misc Jitter misc Bit error rate (BER) misc Clocks misc Bit error rate misc jitter tolerance (JTOL) misc real-time jitter tolerance enhancer (JTE) misc receiver (Rx) misc Delay lines misc Receivers misc Delays
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title	An Add-On Type Real-Time Jitter Tolerance Enhancer for Digital Communication Receivers
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title_full	An Add-On Type Real-Time Jitter Tolerance Enhancer for Digital Communication Receivers
author_sort	Hwang, Sewook
journal	IEEE transactions on very large scale integration (VLSI) systems
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doi_str_mv	10.1109/TVLSI.2015.2435026
dewey-full	004 620
title_sort	add-on type real-time jitter tolerance enhancer for digital communication receivers
title_auth	An Add-On Type Real-Time Jitter Tolerance Enhancer for Digital Communication Receivers
abstract	An add-on type real-time jitter tolerance enhancer (JTE) is presented in this paper. The proposed JTE can improve high-frequency jitter tolerance (JTOL) by using a real-time phase alignment scheme. A mathematical analysis for an advanced bit error rate (BER) prediction method is also introduced. The proposed circuit is applicable to various types of receivers, such as referenceless receivers, receivers with a reference clock source, and source-synchronous receivers. The referenceless receiver with the proposed JTE achieved an out-of-band JTOL of 0.71 UI<inline-formula> <tex-math notation="LaTeX">_{\mathrm { {pp}}} </tex-math></inline-formula> at 100 MHz with <inline-formula> <tex-math notation="LaTeX">< 10^{\mathrm { {-12}}} </tex-math></inline-formula> BER. This is 196% higher than a conventional receiver without the JTE. The source-synchronous receiver with the proposed JTE achieved 0.92 UI<inline-formula> <tex-math notation="LaTeX">_{\mathrm { {pp}}} </tex-math></inline-formula> at 300 MHz with <inline-formula> <tex-math notation="LaTeX">< 10^{\mathrm { {-12}}} </tex-math></inline-formula> BER. Total core areas of the receiver and JTE are 0.19 and 0.07 mm<inline-formula> <tex-math notation="LaTeX">^{\mathrm { {2}}} </tex-math></inline-formula> in a 0.13-<inline-formula> <tex-math notation="LaTeX">\mu \text{m} </tex-math></inline-formula> CMOS process, respectively. The power consumption of the receiver is 38 mW at 5.4 Gbit/s, and the JTE dissipates 22 mW.
abstractGer	An add-on type real-time jitter tolerance enhancer (JTE) is presented in this paper. The proposed JTE can improve high-frequency jitter tolerance (JTOL) by using a real-time phase alignment scheme. A mathematical analysis for an advanced bit error rate (BER) prediction method is also introduced. The proposed circuit is applicable to various types of receivers, such as referenceless receivers, receivers with a reference clock source, and source-synchronous receivers. The referenceless receiver with the proposed JTE achieved an out-of-band JTOL of 0.71 UI<inline-formula> <tex-math notation="LaTeX">_{\mathrm { {pp}}} </tex-math></inline-formula> at 100 MHz with <inline-formula> <tex-math notation="LaTeX">< 10^{\mathrm { {-12}}} </tex-math></inline-formula> BER. This is 196% higher than a conventional receiver without the JTE. The source-synchronous receiver with the proposed JTE achieved 0.92 UI<inline-formula> <tex-math notation="LaTeX">_{\mathrm { {pp}}} </tex-math></inline-formula> at 300 MHz with <inline-formula> <tex-math notation="LaTeX">< 10^{\mathrm { {-12}}} </tex-math></inline-formula> BER. Total core areas of the receiver and JTE are 0.19 and 0.07 mm<inline-formula> <tex-math notation="LaTeX">^{\mathrm { {2}}} </tex-math></inline-formula> in a 0.13-<inline-formula> <tex-math notation="LaTeX">\mu \text{m} </tex-math></inline-formula> CMOS process, respectively. The power consumption of the receiver is 38 mW at 5.4 Gbit/s, and the JTE dissipates 22 mW.
abstract_unstemmed	An add-on type real-time jitter tolerance enhancer (JTE) is presented in this paper. The proposed JTE can improve high-frequency jitter tolerance (JTOL) by using a real-time phase alignment scheme. A mathematical analysis for an advanced bit error rate (BER) prediction method is also introduced. The proposed circuit is applicable to various types of receivers, such as referenceless receivers, receivers with a reference clock source, and source-synchronous receivers. The referenceless receiver with the proposed JTE achieved an out-of-band JTOL of 0.71 UI<inline-formula> <tex-math notation="LaTeX">_{\mathrm { {pp}}} </tex-math></inline-formula> at 100 MHz with <inline-formula> <tex-math notation="LaTeX">< 10^{\mathrm { {-12}}} </tex-math></inline-formula> BER. This is 196% higher than a conventional receiver without the JTE. The source-synchronous receiver with the proposed JTE achieved 0.92 UI<inline-formula> <tex-math notation="LaTeX">_{\mathrm { {pp}}} </tex-math></inline-formula> at 300 MHz with <inline-formula> <tex-math notation="LaTeX">< 10^{\mathrm { {-12}}} </tex-math></inline-formula> BER. Total core areas of the receiver and JTE are 0.19 and 0.07 mm<inline-formula> <tex-math notation="LaTeX">^{\mathrm { {2}}} </tex-math></inline-formula> in a 0.13-<inline-formula> <tex-math notation="LaTeX">\mu \text{m} </tex-math></inline-formula> CMOS process, respectively. The power consumption of the receiver is 38 mW at 5.4 Gbit/s, and the JTE dissipates 22 mW.
collection_details	GBV_USEFLAG_A SYSFLAG_A GBV_OLC SSG-OLC-TEC SSG-OLC-MAT GBV_ILN_70 GBV_ILN_2002
container_issue	3
title_short	An Add-On Type Real-Time Jitter Tolerance Enhancer for Digital Communication Receivers
url	http://dx.doi.org/10.1109/TVLSI.2015.2435026 http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=7123194
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author2	Song, Junyoung Bae, Sang-Geun Lee, Yeonho Kim, Chulwoo
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up_date	2024-07-04T02:06:10.747Z
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