8.3 M-Pixel 480-fps Global-Shutter CMOS Image Sensor with Gain-Adaptive Column ADCs and Chip-on-Chip Stacked Integration
This paper presents a 4K2K 480-fps global-shutter CMOS image sensor with a super 35-mm format for a highly realistic digital video system. The sensor employs newly developed gain-adaptive column analog-to-digital converters to obtain input-referred dark random noise of 140 <inline-formula> <...
Ausführliche Beschreibung
Gespeichert in:
| Autor*in: |
Oike, Yusuke [verfasserIn] |
|---|
| Format: |
Artikel |
|---|---|
| Sprache: |
Englisch |
| Erschienen: |
2017 |
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| Schlagwörter: |
Analog-to-digital converter (ADC) |
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| Übergeordnetes Werk: |
Enthalten in: IEEE journal of solid state circuits - New York, NY : IEEE, 1966, 52(2017), 4, Seite 985-993 |
|---|---|
| Übergeordnetes Werk: |
volume:52 ; year:2017 ; number:4 ; pages:985-993 |
| Links: |
|---|
| DOI / URN: |
10.1109/JSSC.2016.2639741 |
|---|
| Katalog-ID: |
OLC1992323755 |
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| 245 | 1 | 0 | |a 8.3 M-Pixel 480-fps Global-Shutter CMOS Image Sensor with Gain-Adaptive Column ADCs and Chip-on-Chip Stacked Integration |
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| 520 | |a This paper presents a 4K2K 480-fps global-shutter CMOS image sensor with a super 35-mm format for a highly realistic digital video system. The sensor employs newly developed gain-adaptive column analog-to-digital converters to obtain input-referred dark random noise of 140 <inline-formula> <tex-math notation="LaTeX">\mu \text{V}_{\mathrm {rms}} </tex-math></inline-formula> for an input-referred full-scale readout of 923 mV. An on-chip online correction of the error between two switchable gains maintained the nonlinearity of the output image within 0.18%. A chip-on-chip integration process realized a front-illuminated image sensor stacked with two diced logic chips through 38-K microbump interconnections. The global-shutter pixel achieved a parasitic light sensitivity of −99.6 dB. The 16-channel output interfaces with 4.752 Gbps/ch were implemented in the stacked logic chips. | ||
| 650 | 4 | |a chip-on-chip stacked device | |
| 650 | 4 | |a CMOS image sensors | |
| 650 | 4 | |a Gain | |
| 650 | 4 | |a Switches | |
| 650 | 4 | |a Analog-to-digital converter (ADC) | |
| 650 | 4 | |a Radiation detectors | |
| 650 | 4 | |a global shutter | |
| 650 | 4 | |a low noise | |
| 650 | 4 | |a Integrated circuit interconnections | |
| 650 | 4 | |a Analog-digital conversion | |
| 650 | 4 | |a high frame rate | |
| 650 | 4 | |a CMOS image sensor | |
| 700 | 1 | |a Akiyama, Kentaro |4 oth | |
| 700 | 1 | |a Hung, Luong D |4 oth | |
| 700 | 1 | |a Niitsuma, Wataru |4 oth | |
| 700 | 1 | |a Kato, Akihiko |4 oth | |
| 700 | 1 | |a Sato, Mamoru |4 oth | |
| 700 | 1 | |a Kato, Yuri |4 oth | |
| 700 | 1 | |a Nakamura, Wataru |4 oth | |
| 700 | 1 | |a Shiroshita, Hiroshi |4 oth | |
| 700 | 1 | |a Sakano, Yorito |4 oth | |
| 700 | 1 | |a Kitano, Yoshiaki |4 oth | |
| 700 | 1 | |a Nakamura, Takuya |4 oth | |
| 700 | 1 | |a Toyama, Takayuki |4 oth | |
| 700 | 1 | |a Iwamoto, Hayato |4 oth | |
| 700 | 1 | |a Ezaki, Takayuki |4 oth | |
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10.1109/JSSC.2016.2639741 doi PQ20170901 (DE-627)OLC1992323755 (DE-599)GBVOLC1992323755 (PRQ)c1601-b007914067d291142dfed6a38d3eadcd3b230d4a9d91329d973d1555883c4ea70 (KEY)005068422017000005200040098583mpixel480fpsglobalshuttercmosimagesensorwithgain DE-627 ger DE-627 rakwb eng 620 DE-600 Oike, Yusuke verfasserin aut 8.3 M-Pixel 480-fps Global-Shutter CMOS Image Sensor with Gain-Adaptive Column ADCs and Chip-on-Chip Stacked Integration 2017 Text txt rdacontent ohne Hilfsmittel zu benutzen n rdamedia Band nc rdacarrier This paper presents a 4K2K 480-fps global-shutter CMOS image sensor with a super 35-mm format for a highly realistic digital video system. The sensor employs newly developed gain-adaptive column analog-to-digital converters to obtain input-referred dark random noise of 140 <inline-formula> <tex-math notation="LaTeX">\mu \text{V}_{\mathrm {rms}} </tex-math></inline-formula> for an input-referred full-scale readout of 923 mV. An on-chip online correction of the error between two switchable gains maintained the nonlinearity of the output image within 0.18%. A chip-on-chip integration process realized a front-illuminated image sensor stacked with two diced logic chips through 38-K microbump interconnections. The global-shutter pixel achieved a parasitic light sensitivity of −99.6 dB. The 16-channel output interfaces with 4.752 Gbps/ch were implemented in the stacked logic chips. chip-on-chip stacked device CMOS image sensors Gain Switches Analog-to-digital converter (ADC) Radiation detectors global shutter low noise Integrated circuit interconnections Analog-digital conversion high frame rate CMOS image sensor Akiyama, Kentaro oth Hung, Luong D oth Niitsuma, Wataru oth Kato, Akihiko oth Sato, Mamoru oth Kato, Yuri oth Nakamura, Wataru oth Shiroshita, Hiroshi oth Sakano, Yorito oth Kitano, Yoshiaki oth Nakamura, Takuya oth Toyama, Takayuki oth Iwamoto, Hayato oth Ezaki, Takayuki oth Enthalten in IEEE journal of solid state circuits New York, NY : IEEE, 1966 52(2017), 4, Seite 985-993 (DE-627)129594865 (DE-600)240580-5 (DE-576)01508776X 0018-9200 nnns volume:52 year:2017 number:4 pages:985-993 http://dx.doi.org/10.1109/JSSC.2016.2639741 Volltext http://ieeexplore.ieee.org/document/7811267 GBV_USEFLAG_A SYSFLAG_A GBV_OLC SSG-OLC-TEC SSG-OLC-PHY GBV_ILN_70 GBV_ILN_2004 GBV_ILN_4313 AR 52 2017 4 985-993 |
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10.1109/JSSC.2016.2639741 doi PQ20170901 (DE-627)OLC1992323755 (DE-599)GBVOLC1992323755 (PRQ)c1601-b007914067d291142dfed6a38d3eadcd3b230d4a9d91329d973d1555883c4ea70 (KEY)005068422017000005200040098583mpixel480fpsglobalshuttercmosimagesensorwithgain DE-627 ger DE-627 rakwb eng 620 DE-600 Oike, Yusuke verfasserin aut 8.3 M-Pixel 480-fps Global-Shutter CMOS Image Sensor with Gain-Adaptive Column ADCs and Chip-on-Chip Stacked Integration 2017 Text txt rdacontent ohne Hilfsmittel zu benutzen n rdamedia Band nc rdacarrier This paper presents a 4K2K 480-fps global-shutter CMOS image sensor with a super 35-mm format for a highly realistic digital video system. The sensor employs newly developed gain-adaptive column analog-to-digital converters to obtain input-referred dark random noise of 140 <inline-formula> <tex-math notation="LaTeX">\mu \text{V}_{\mathrm {rms}} </tex-math></inline-formula> for an input-referred full-scale readout of 923 mV. An on-chip online correction of the error between two switchable gains maintained the nonlinearity of the output image within 0.18%. A chip-on-chip integration process realized a front-illuminated image sensor stacked with two diced logic chips through 38-K microbump interconnections. The global-shutter pixel achieved a parasitic light sensitivity of −99.6 dB. The 16-channel output interfaces with 4.752 Gbps/ch were implemented in the stacked logic chips. chip-on-chip stacked device CMOS image sensors Gain Switches Analog-to-digital converter (ADC) Radiation detectors global shutter low noise Integrated circuit interconnections Analog-digital conversion high frame rate CMOS image sensor Akiyama, Kentaro oth Hung, Luong D oth Niitsuma, Wataru oth Kato, Akihiko oth Sato, Mamoru oth Kato, Yuri oth Nakamura, Wataru oth Shiroshita, Hiroshi oth Sakano, Yorito oth Kitano, Yoshiaki oth Nakamura, Takuya oth Toyama, Takayuki oth Iwamoto, Hayato oth Ezaki, Takayuki oth Enthalten in IEEE journal of solid state circuits New York, NY : IEEE, 1966 52(2017), 4, Seite 985-993 (DE-627)129594865 (DE-600)240580-5 (DE-576)01508776X 0018-9200 nnns volume:52 year:2017 number:4 pages:985-993 http://dx.doi.org/10.1109/JSSC.2016.2639741 Volltext http://ieeexplore.ieee.org/document/7811267 GBV_USEFLAG_A SYSFLAG_A GBV_OLC SSG-OLC-TEC SSG-OLC-PHY GBV_ILN_70 GBV_ILN_2004 GBV_ILN_4313 AR 52 2017 4 985-993 |
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10.1109/JSSC.2016.2639741 doi PQ20170901 (DE-627)OLC1992323755 (DE-599)GBVOLC1992323755 (PRQ)c1601-b007914067d291142dfed6a38d3eadcd3b230d4a9d91329d973d1555883c4ea70 (KEY)005068422017000005200040098583mpixel480fpsglobalshuttercmosimagesensorwithgain DE-627 ger DE-627 rakwb eng 620 DE-600 Oike, Yusuke verfasserin aut 8.3 M-Pixel 480-fps Global-Shutter CMOS Image Sensor with Gain-Adaptive Column ADCs and Chip-on-Chip Stacked Integration 2017 Text txt rdacontent ohne Hilfsmittel zu benutzen n rdamedia Band nc rdacarrier This paper presents a 4K2K 480-fps global-shutter CMOS image sensor with a super 35-mm format for a highly realistic digital video system. The sensor employs newly developed gain-adaptive column analog-to-digital converters to obtain input-referred dark random noise of 140 <inline-formula> <tex-math notation="LaTeX">\mu \text{V}_{\mathrm {rms}} </tex-math></inline-formula> for an input-referred full-scale readout of 923 mV. An on-chip online correction of the error between two switchable gains maintained the nonlinearity of the output image within 0.18%. A chip-on-chip integration process realized a front-illuminated image sensor stacked with two diced logic chips through 38-K microbump interconnections. The global-shutter pixel achieved a parasitic light sensitivity of −99.6 dB. The 16-channel output interfaces with 4.752 Gbps/ch were implemented in the stacked logic chips. chip-on-chip stacked device CMOS image sensors Gain Switches Analog-to-digital converter (ADC) Radiation detectors global shutter low noise Integrated circuit interconnections Analog-digital conversion high frame rate CMOS image sensor Akiyama, Kentaro oth Hung, Luong D oth Niitsuma, Wataru oth Kato, Akihiko oth Sato, Mamoru oth Kato, Yuri oth Nakamura, Wataru oth Shiroshita, Hiroshi oth Sakano, Yorito oth Kitano, Yoshiaki oth Nakamura, Takuya oth Toyama, Takayuki oth Iwamoto, Hayato oth Ezaki, Takayuki oth Enthalten in IEEE journal of solid state circuits New York, NY : IEEE, 1966 52(2017), 4, Seite 985-993 (DE-627)129594865 (DE-600)240580-5 (DE-576)01508776X 0018-9200 nnns volume:52 year:2017 number:4 pages:985-993 http://dx.doi.org/10.1109/JSSC.2016.2639741 Volltext http://ieeexplore.ieee.org/document/7811267 GBV_USEFLAG_A SYSFLAG_A GBV_OLC SSG-OLC-TEC SSG-OLC-PHY GBV_ILN_70 GBV_ILN_2004 GBV_ILN_4313 AR 52 2017 4 985-993 |
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10.1109/JSSC.2016.2639741 doi PQ20170901 (DE-627)OLC1992323755 (DE-599)GBVOLC1992323755 (PRQ)c1601-b007914067d291142dfed6a38d3eadcd3b230d4a9d91329d973d1555883c4ea70 (KEY)005068422017000005200040098583mpixel480fpsglobalshuttercmosimagesensorwithgain DE-627 ger DE-627 rakwb eng 620 DE-600 Oike, Yusuke verfasserin aut 8.3 M-Pixel 480-fps Global-Shutter CMOS Image Sensor with Gain-Adaptive Column ADCs and Chip-on-Chip Stacked Integration 2017 Text txt rdacontent ohne Hilfsmittel zu benutzen n rdamedia Band nc rdacarrier This paper presents a 4K2K 480-fps global-shutter CMOS image sensor with a super 35-mm format for a highly realistic digital video system. The sensor employs newly developed gain-adaptive column analog-to-digital converters to obtain input-referred dark random noise of 140 <inline-formula> <tex-math notation="LaTeX">\mu \text{V}_{\mathrm {rms}} </tex-math></inline-formula> for an input-referred full-scale readout of 923 mV. An on-chip online correction of the error between two switchable gains maintained the nonlinearity of the output image within 0.18%. A chip-on-chip integration process realized a front-illuminated image sensor stacked with two diced logic chips through 38-K microbump interconnections. The global-shutter pixel achieved a parasitic light sensitivity of −99.6 dB. The 16-channel output interfaces with 4.752 Gbps/ch were implemented in the stacked logic chips. chip-on-chip stacked device CMOS image sensors Gain Switches Analog-to-digital converter (ADC) Radiation detectors global shutter low noise Integrated circuit interconnections Analog-digital conversion high frame rate CMOS image sensor Akiyama, Kentaro oth Hung, Luong D oth Niitsuma, Wataru oth Kato, Akihiko oth Sato, Mamoru oth Kato, Yuri oth Nakamura, Wataru oth Shiroshita, Hiroshi oth Sakano, Yorito oth Kitano, Yoshiaki oth Nakamura, Takuya oth Toyama, Takayuki oth Iwamoto, Hayato oth Ezaki, Takayuki oth Enthalten in IEEE journal of solid state circuits New York, NY : IEEE, 1966 52(2017), 4, Seite 985-993 (DE-627)129594865 (DE-600)240580-5 (DE-576)01508776X 0018-9200 nnns volume:52 year:2017 number:4 pages:985-993 http://dx.doi.org/10.1109/JSSC.2016.2639741 Volltext http://ieeexplore.ieee.org/document/7811267 GBV_USEFLAG_A SYSFLAG_A GBV_OLC SSG-OLC-TEC SSG-OLC-PHY GBV_ILN_70 GBV_ILN_2004 GBV_ILN_4313 AR 52 2017 4 985-993 |
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10.1109/JSSC.2016.2639741 doi PQ20170901 (DE-627)OLC1992323755 (DE-599)GBVOLC1992323755 (PRQ)c1601-b007914067d291142dfed6a38d3eadcd3b230d4a9d91329d973d1555883c4ea70 (KEY)005068422017000005200040098583mpixel480fpsglobalshuttercmosimagesensorwithgain DE-627 ger DE-627 rakwb eng 620 DE-600 Oike, Yusuke verfasserin aut 8.3 M-Pixel 480-fps Global-Shutter CMOS Image Sensor with Gain-Adaptive Column ADCs and Chip-on-Chip Stacked Integration 2017 Text txt rdacontent ohne Hilfsmittel zu benutzen n rdamedia Band nc rdacarrier This paper presents a 4K2K 480-fps global-shutter CMOS image sensor with a super 35-mm format for a highly realistic digital video system. The sensor employs newly developed gain-adaptive column analog-to-digital converters to obtain input-referred dark random noise of 140 <inline-formula> <tex-math notation="LaTeX">\mu \text{V}_{\mathrm {rms}} </tex-math></inline-formula> for an input-referred full-scale readout of 923 mV. An on-chip online correction of the error between two switchable gains maintained the nonlinearity of the output image within 0.18%. A chip-on-chip integration process realized a front-illuminated image sensor stacked with two diced logic chips through 38-K microbump interconnections. The global-shutter pixel achieved a parasitic light sensitivity of −99.6 dB. The 16-channel output interfaces with 4.752 Gbps/ch were implemented in the stacked logic chips. chip-on-chip stacked device CMOS image sensors Gain Switches Analog-to-digital converter (ADC) Radiation detectors global shutter low noise Integrated circuit interconnections Analog-digital conversion high frame rate CMOS image sensor Akiyama, Kentaro oth Hung, Luong D oth Niitsuma, Wataru oth Kato, Akihiko oth Sato, Mamoru oth Kato, Yuri oth Nakamura, Wataru oth Shiroshita, Hiroshi oth Sakano, Yorito oth Kitano, Yoshiaki oth Nakamura, Takuya oth Toyama, Takayuki oth Iwamoto, Hayato oth Ezaki, Takayuki oth Enthalten in IEEE journal of solid state circuits New York, NY : IEEE, 1966 52(2017), 4, Seite 985-993 (DE-627)129594865 (DE-600)240580-5 (DE-576)01508776X 0018-9200 nnns volume:52 year:2017 number:4 pages:985-993 http://dx.doi.org/10.1109/JSSC.2016.2639741 Volltext http://ieeexplore.ieee.org/document/7811267 GBV_USEFLAG_A SYSFLAG_A GBV_OLC SSG-OLC-TEC SSG-OLC-PHY GBV_ILN_70 GBV_ILN_2004 GBV_ILN_4313 AR 52 2017 4 985-993 |
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chip-on-chip stacked device CMOS image sensors Gain Switches Analog-to-digital converter (ADC) Radiation detectors global shutter low noise Integrated circuit interconnections Analog-digital conversion high frame rate CMOS image sensor |
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Oike, Yusuke @@aut@@ Akiyama, Kentaro @@oth@@ Hung, Luong D @@oth@@ Niitsuma, Wataru @@oth@@ Kato, Akihiko @@oth@@ Sato, Mamoru @@oth@@ Kato, Yuri @@oth@@ Nakamura, Wataru @@oth@@ Shiroshita, Hiroshi @@oth@@ Sakano, Yorito @@oth@@ Kitano, Yoshiaki @@oth@@ Nakamura, Takuya @@oth@@ Toyama, Takayuki @@oth@@ Iwamoto, Hayato @@oth@@ Ezaki, Takayuki @@oth@@ |
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620 DE-600 8.3 M-Pixel 480-fps Global-Shutter CMOS Image Sensor with Gain-Adaptive Column ADCs and Chip-on-Chip Stacked Integration chip-on-chip stacked device CMOS image sensors Gain Switches Analog-to-digital converter (ADC) Radiation detectors global shutter low noise Integrated circuit interconnections Analog-digital conversion high frame rate CMOS image sensor |
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8.3 M-Pixel 480-fps Global-Shutter CMOS Image Sensor with Gain-Adaptive Column ADCs and Chip-on-Chip Stacked Integration |
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This paper presents a 4K2K 480-fps global-shutter CMOS image sensor with a super 35-mm format for a highly realistic digital video system. The sensor employs newly developed gain-adaptive column analog-to-digital converters to obtain input-referred dark random noise of 140 <inline-formula> <tex-math notation="LaTeX">\mu \text{V}_{\mathrm {rms}} </tex-math></inline-formula> for an input-referred full-scale readout of 923 mV. An on-chip online correction of the error between two switchable gains maintained the nonlinearity of the output image within 0.18%. A chip-on-chip integration process realized a front-illuminated image sensor stacked with two diced logic chips through 38-K microbump interconnections. The global-shutter pixel achieved a parasitic light sensitivity of −99.6 dB. The 16-channel output interfaces with 4.752 Gbps/ch were implemented in the stacked logic chips. |
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This paper presents a 4K2K 480-fps global-shutter CMOS image sensor with a super 35-mm format for a highly realistic digital video system. The sensor employs newly developed gain-adaptive column analog-to-digital converters to obtain input-referred dark random noise of 140 <inline-formula> <tex-math notation="LaTeX">\mu \text{V}_{\mathrm {rms}} </tex-math></inline-formula> for an input-referred full-scale readout of 923 mV. An on-chip online correction of the error between two switchable gains maintained the nonlinearity of the output image within 0.18%. A chip-on-chip integration process realized a front-illuminated image sensor stacked with two diced logic chips through 38-K microbump interconnections. The global-shutter pixel achieved a parasitic light sensitivity of −99.6 dB. The 16-channel output interfaces with 4.752 Gbps/ch were implemented in the stacked logic chips. |
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This paper presents a 4K2K 480-fps global-shutter CMOS image sensor with a super 35-mm format for a highly realistic digital video system. The sensor employs newly developed gain-adaptive column analog-to-digital converters to obtain input-referred dark random noise of 140 <inline-formula> <tex-math notation="LaTeX">\mu \text{V}_{\mathrm {rms}} </tex-math></inline-formula> for an input-referred full-scale readout of 923 mV. An on-chip online correction of the error between two switchable gains maintained the nonlinearity of the output image within 0.18%. A chip-on-chip integration process realized a front-illuminated image sensor stacked with two diced logic chips through 38-K microbump interconnections. The global-shutter pixel achieved a parasitic light sensitivity of −99.6 dB. The 16-channel output interfaces with 4.752 Gbps/ch were implemented in the stacked logic chips. |
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8.3 M-Pixel 480-fps Global-Shutter CMOS Image Sensor with Gain-Adaptive Column ADCs and Chip-on-Chip Stacked Integration |
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Akiyama, Kentaro Hung, Luong D Niitsuma, Wataru Kato, Akihiko Sato, Mamoru Kato, Yuri Nakamura, Wataru Shiroshita, Hiroshi Sakano, Yorito Kitano, Yoshiaki Nakamura, Takuya Toyama, Takayuki Iwamoto, Hayato Ezaki, Takayuki |
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