Structure and software of the data acquisition network node in the SPASCHARM experiment
Abstract An intelligent crate controller controlled by the built-in ARM system has been developed for the new EuroMISS front-end electronics of the SPASCHARM experiment at the Institute for High Energy Physics (IHEP). The first version has a 250-Mbyte buffer memory and is capable of transmitting dat...
Ausführliche Beschreibung
Autor*in: |
Ryzhikov, S. V. [verfasserIn] |
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Format: |
Artikel |
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Sprache: |
Englisch |
Erschienen: |
2014 |
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Schlagwörter: |
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Anmerkung: |
© Pleiades Publishing, Inc. 2014 |
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Übergeordnetes Werk: |
Enthalten in: Instruments and experimental techniques - Pleiades Publishing, 1959, 57(2014), 6 vom: Nov., Seite 676-679 |
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Übergeordnetes Werk: |
volume:57 ; year:2014 ; number:6 ; month:11 ; pages:676-679 |
Links: |
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DOI / URN: |
10.1134/S0020441214060116 |
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Katalog-ID: |
OLC2034155432 |
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10.1134/S0020441214060116 doi (DE-627)OLC2034155432 (DE-He213)S0020441214060116-p DE-627 ger DE-627 rakwb eng 620 VZ 11 ssgn Ryzhikov, S. V. verfasserin aut Structure and software of the data acquisition network node in the SPASCHARM experiment 2014 Text txt rdacontent ohne Hilfsmittel zu benutzen n rdamedia Band nc rdacarrier © Pleiades Publishing, Inc. 2014 Abstract An intelligent crate controller controlled by the built-in ARM system has been developed for the new EuroMISS front-end electronics of the SPASCHARM experiment at the Institute for High Energy Physics (IHEP). The first version has a 250-Mbyte buffer memory and is capable of transmitting data to the network with a rate up to 70 Mbit/s. Building a computer into each crate with electronics has made it possible to produce distributed data acquisition and slow control systems of the setup. Principles of interaction of the crate controller, front-end electronics, and network data acquisition system are stated. Timing Mark Direct Memory Access Synchronization Signal Single Board Computer Direct Memory Access Controller Petrov, V. S. aut Semenov, P. A. aut Yakimchuk, V. I. aut Enthalten in Instruments and experimental techniques Pleiades Publishing, 1959 57(2014), 6 vom: Nov., Seite 676-679 (DE-627)129603007 (DE-600)241643-8 (DE-576)015096815 0020-4412 nnns volume:57 year:2014 number:6 month:11 pages:676-679 https://doi.org/10.1134/S0020441214060116 lizenzpflichtig Volltext GBV_USEFLAG_A SYSFLAG_A GBV_OLC SSG-OLC-TEC SSG-OLC-PHY GBV_ILN_70 AR 57 2014 6 11 676-679 |
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10.1134/S0020441214060116 doi (DE-627)OLC2034155432 (DE-He213)S0020441214060116-p DE-627 ger DE-627 rakwb eng 620 VZ 11 ssgn Ryzhikov, S. V. verfasserin aut Structure and software of the data acquisition network node in the SPASCHARM experiment 2014 Text txt rdacontent ohne Hilfsmittel zu benutzen n rdamedia Band nc rdacarrier © Pleiades Publishing, Inc. 2014 Abstract An intelligent crate controller controlled by the built-in ARM system has been developed for the new EuroMISS front-end electronics of the SPASCHARM experiment at the Institute for High Energy Physics (IHEP). The first version has a 250-Mbyte buffer memory and is capable of transmitting data to the network with a rate up to 70 Mbit/s. Building a computer into each crate with electronics has made it possible to produce distributed data acquisition and slow control systems of the setup. Principles of interaction of the crate controller, front-end electronics, and network data acquisition system are stated. Timing Mark Direct Memory Access Synchronization Signal Single Board Computer Direct Memory Access Controller Petrov, V. S. aut Semenov, P. A. aut Yakimchuk, V. I. aut Enthalten in Instruments and experimental techniques Pleiades Publishing, 1959 57(2014), 6 vom: Nov., Seite 676-679 (DE-627)129603007 (DE-600)241643-8 (DE-576)015096815 0020-4412 nnns volume:57 year:2014 number:6 month:11 pages:676-679 https://doi.org/10.1134/S0020441214060116 lizenzpflichtig Volltext GBV_USEFLAG_A SYSFLAG_A GBV_OLC SSG-OLC-TEC SSG-OLC-PHY GBV_ILN_70 AR 57 2014 6 11 676-679 |
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10.1134/S0020441214060116 doi (DE-627)OLC2034155432 (DE-He213)S0020441214060116-p DE-627 ger DE-627 rakwb eng 620 VZ 11 ssgn Ryzhikov, S. V. verfasserin aut Structure and software of the data acquisition network node in the SPASCHARM experiment 2014 Text txt rdacontent ohne Hilfsmittel zu benutzen n rdamedia Band nc rdacarrier © Pleiades Publishing, Inc. 2014 Abstract An intelligent crate controller controlled by the built-in ARM system has been developed for the new EuroMISS front-end electronics of the SPASCHARM experiment at the Institute for High Energy Physics (IHEP). The first version has a 250-Mbyte buffer memory and is capable of transmitting data to the network with a rate up to 70 Mbit/s. Building a computer into each crate with electronics has made it possible to produce distributed data acquisition and slow control systems of the setup. Principles of interaction of the crate controller, front-end electronics, and network data acquisition system are stated. Timing Mark Direct Memory Access Synchronization Signal Single Board Computer Direct Memory Access Controller Petrov, V. S. aut Semenov, P. A. aut Yakimchuk, V. I. aut Enthalten in Instruments and experimental techniques Pleiades Publishing, 1959 57(2014), 6 vom: Nov., Seite 676-679 (DE-627)129603007 (DE-600)241643-8 (DE-576)015096815 0020-4412 nnns volume:57 year:2014 number:6 month:11 pages:676-679 https://doi.org/10.1134/S0020441214060116 lizenzpflichtig Volltext GBV_USEFLAG_A SYSFLAG_A GBV_OLC SSG-OLC-TEC SSG-OLC-PHY GBV_ILN_70 AR 57 2014 6 11 676-679 |
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10.1134/S0020441214060116 doi (DE-627)OLC2034155432 (DE-He213)S0020441214060116-p DE-627 ger DE-627 rakwb eng 620 VZ 11 ssgn Ryzhikov, S. V. verfasserin aut Structure and software of the data acquisition network node in the SPASCHARM experiment 2014 Text txt rdacontent ohne Hilfsmittel zu benutzen n rdamedia Band nc rdacarrier © Pleiades Publishing, Inc. 2014 Abstract An intelligent crate controller controlled by the built-in ARM system has been developed for the new EuroMISS front-end electronics of the SPASCHARM experiment at the Institute for High Energy Physics (IHEP). The first version has a 250-Mbyte buffer memory and is capable of transmitting data to the network with a rate up to 70 Mbit/s. Building a computer into each crate with electronics has made it possible to produce distributed data acquisition and slow control systems of the setup. Principles of interaction of the crate controller, front-end electronics, and network data acquisition system are stated. Timing Mark Direct Memory Access Synchronization Signal Single Board Computer Direct Memory Access Controller Petrov, V. S. aut Semenov, P. A. aut Yakimchuk, V. I. aut Enthalten in Instruments and experimental techniques Pleiades Publishing, 1959 57(2014), 6 vom: Nov., Seite 676-679 (DE-627)129603007 (DE-600)241643-8 (DE-576)015096815 0020-4412 nnns volume:57 year:2014 number:6 month:11 pages:676-679 https://doi.org/10.1134/S0020441214060116 lizenzpflichtig Volltext GBV_USEFLAG_A SYSFLAG_A GBV_OLC SSG-OLC-TEC SSG-OLC-PHY GBV_ILN_70 AR 57 2014 6 11 676-679 |
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10.1134/S0020441214060116 doi (DE-627)OLC2034155432 (DE-He213)S0020441214060116-p DE-627 ger DE-627 rakwb eng 620 VZ 11 ssgn Ryzhikov, S. V. verfasserin aut Structure and software of the data acquisition network node in the SPASCHARM experiment 2014 Text txt rdacontent ohne Hilfsmittel zu benutzen n rdamedia Band nc rdacarrier © Pleiades Publishing, Inc. 2014 Abstract An intelligent crate controller controlled by the built-in ARM system has been developed for the new EuroMISS front-end electronics of the SPASCHARM experiment at the Institute for High Energy Physics (IHEP). The first version has a 250-Mbyte buffer memory and is capable of transmitting data to the network with a rate up to 70 Mbit/s. Building a computer into each crate with electronics has made it possible to produce distributed data acquisition and slow control systems of the setup. Principles of interaction of the crate controller, front-end electronics, and network data acquisition system are stated. Timing Mark Direct Memory Access Synchronization Signal Single Board Computer Direct Memory Access Controller Petrov, V. S. aut Semenov, P. A. aut Yakimchuk, V. I. aut Enthalten in Instruments and experimental techniques Pleiades Publishing, 1959 57(2014), 6 vom: Nov., Seite 676-679 (DE-627)129603007 (DE-600)241643-8 (DE-576)015096815 0020-4412 nnns volume:57 year:2014 number:6 month:11 pages:676-679 https://doi.org/10.1134/S0020441214060116 lizenzpflichtig Volltext GBV_USEFLAG_A SYSFLAG_A GBV_OLC SSG-OLC-TEC SSG-OLC-PHY GBV_ILN_70 AR 57 2014 6 11 676-679 |
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Abstract An intelligent crate controller controlled by the built-in ARM system has been developed for the new EuroMISS front-end electronics of the SPASCHARM experiment at the Institute for High Energy Physics (IHEP). The first version has a 250-Mbyte buffer memory and is capable of transmitting data to the network with a rate up to 70 Mbit/s. Building a computer into each crate with electronics has made it possible to produce distributed data acquisition and slow control systems of the setup. Principles of interaction of the crate controller, front-end electronics, and network data acquisition system are stated. © Pleiades Publishing, Inc. 2014 |
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Abstract An intelligent crate controller controlled by the built-in ARM system has been developed for the new EuroMISS front-end electronics of the SPASCHARM experiment at the Institute for High Energy Physics (IHEP). The first version has a 250-Mbyte buffer memory and is capable of transmitting data to the network with a rate up to 70 Mbit/s. Building a computer into each crate with electronics has made it possible to produce distributed data acquisition and slow control systems of the setup. Principles of interaction of the crate controller, front-end electronics, and network data acquisition system are stated. © Pleiades Publishing, Inc. 2014 |
abstract_unstemmed |
Abstract An intelligent crate controller controlled by the built-in ARM system has been developed for the new EuroMISS front-end electronics of the SPASCHARM experiment at the Institute for High Energy Physics (IHEP). The first version has a 250-Mbyte buffer memory and is capable of transmitting data to the network with a rate up to 70 Mbit/s. Building a computer into each crate with electronics has made it possible to produce distributed data acquisition and slow control systems of the setup. Principles of interaction of the crate controller, front-end electronics, and network data acquisition system are stated. © Pleiades Publishing, Inc. 2014 |
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V.</subfield><subfield code="e">verfasserin</subfield><subfield code="4">aut</subfield></datafield><datafield tag="245" ind1="1" ind2="0"><subfield code="a">Structure and software of the data acquisition network node in the SPASCHARM experiment</subfield></datafield><datafield tag="264" ind1=" " ind2="1"><subfield code="c">2014</subfield></datafield><datafield tag="336" ind1=" " ind2=" "><subfield code="a">Text</subfield><subfield code="b">txt</subfield><subfield code="2">rdacontent</subfield></datafield><datafield tag="337" ind1=" " ind2=" "><subfield code="a">ohne Hilfsmittel zu benutzen</subfield><subfield code="b">n</subfield><subfield code="2">rdamedia</subfield></datafield><datafield tag="338" ind1=" " ind2=" "><subfield code="a">Band</subfield><subfield code="b">nc</subfield><subfield code="2">rdacarrier</subfield></datafield><datafield tag="500" ind1=" " ind2=" "><subfield code="a">© Pleiades Publishing, Inc. 2014</subfield></datafield><datafield tag="520" ind1=" " ind2=" "><subfield code="a">Abstract An intelligent crate controller controlled by the built-in ARM system has been developed for the new EuroMISS front-end electronics of the SPASCHARM experiment at the Institute for High Energy Physics (IHEP). The first version has a 250-Mbyte buffer memory and is capable of transmitting data to the network with a rate up to 70 Mbit/s. Building a computer into each crate with electronics has made it possible to produce distributed data acquisition and slow control systems of the setup. Principles of interaction of the crate controller, front-end electronics, and network data acquisition system are stated.</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Timing Mark</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Direct Memory Access</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Synchronization Signal</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Single Board Computer</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Direct Memory Access Controller</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Petrov, V. S.</subfield><subfield code="4">aut</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Semenov, P. A.</subfield><subfield code="4">aut</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Yakimchuk, V. I.</subfield><subfield code="4">aut</subfield></datafield><datafield tag="773" ind1="0" ind2="8"><subfield code="i">Enthalten in</subfield><subfield code="t">Instruments and experimental techniques</subfield><subfield code="d">Pleiades Publishing, 1959</subfield><subfield code="g">57(2014), 6 vom: Nov., Seite 676-679</subfield><subfield code="w">(DE-627)129603007</subfield><subfield code="w">(DE-600)241643-8</subfield><subfield code="w">(DE-576)015096815</subfield><subfield code="x">0020-4412</subfield><subfield code="7">nnns</subfield></datafield><datafield tag="773" ind1="1" ind2="8"><subfield code="g">volume:57</subfield><subfield code="g">year:2014</subfield><subfield code="g">number:6</subfield><subfield code="g">month:11</subfield><subfield code="g">pages:676-679</subfield></datafield><datafield tag="856" ind1="4" ind2="1"><subfield code="u">https://doi.org/10.1134/S0020441214060116</subfield><subfield code="z">lizenzpflichtig</subfield><subfield code="3">Volltext</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_USEFLAG_A</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">SYSFLAG_A</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_OLC</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">SSG-OLC-TEC</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">SSG-OLC-PHY</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_70</subfield></datafield><datafield tag="951" ind1=" " ind2=" "><subfield code="a">AR</subfield></datafield><datafield tag="952" ind1=" " ind2=" "><subfield code="d">57</subfield><subfield code="j">2014</subfield><subfield code="e">6</subfield><subfield code="c">11</subfield><subfield code="h">676-679</subfield></datafield></record></collection>
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