Electroless Ni/Au Bump on a Copper Patterned Wafer for the CMOS Image Sensor Package in Mobile Phones
Wafer bumping technology using an electroless Ni/Au bump on a Cu patterned wafer is studied for the flip chip type CMOS image sensor (CIS) package for the camera module in mobile phones. The effect of different pretreatment steps on surface roughness and etching of Cu pads is investigated to improve...
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| Autor*in: |
Kim, Joong-Do [verfasserIn] |
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| Format: |
Artikel |
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| Sprache: |
Englisch |
| Erschienen: |
2007 |
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| Schlagwörter: |
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| Anmerkung: |
© TMS 2007 |
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| Übergeordnetes Werk: |
Enthalten in: Journal of electronic materials - Springer US, 1972, 36(2007), 7 vom: 30. Mai, Seite 775-782 |
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| Übergeordnetes Werk: |
volume:36 ; year:2007 ; number:7 ; day:30 ; month:05 ; pages:775-782 |
| Links: |
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| DOI / URN: |
10.1007/s11664-007-0144-2 |
|---|
| Katalog-ID: |
OLC2042303437 |
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| 520 | |a Wafer bumping technology using an electroless Ni/Au bump on a Cu patterned wafer is studied for the flip chip type CMOS image sensor (CIS) package for the camera module in mobile phones. The effect of different pretreatment steps on surface roughness and etching of Cu pads is investigated to improve the adherence between the Cu pad and the Ni/Au bump. This study measures the shear forces on Ni/Au bumps prepared in different ways, showing that the suitable pretreatment protocol for electroless Ni plating on Cu pads is “acid dip followed by Pd activation” rather than the conventional progression of “acid-dip, microetching, and Pd activation.” The interface between the Cu pad and the Ni/Au bump is studied using various surface analysis methods. The homogeneous distribution of catalytic Pd on the Cu pad is first validated. The flip chip package structure is designed, assembled, and tested for reliability. The successful flip chip bonding in the CIS package is characterized in terms of the cross-sectional structure in which the anisotropic conductive film (ACF) particles are deformed to about 1.5 μm in diameter. The experimental results suggest that electroless Ni/Au can be applied to the flip chip type CIS package using Cu patterned wafers for high mega pixel applications. | ||
| 650 | 4 | |a Electroless Ni/Au bump | |
| 650 | 4 | |a catalytic Pd | |
| 650 | 4 | |a flip chip | |
| 650 | 4 | |a CMOS image sensor (CIS) package | |
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10.1007/s11664-007-0144-2 doi (DE-627)OLC2042303437 (DE-He213)s11664-007-0144-2-p DE-627 ger DE-627 rakwb eng 670 VZ Kim, Joong-Do verfasserin aut Electroless Ni/Au Bump on a Copper Patterned Wafer for the CMOS Image Sensor Package in Mobile Phones 2007 Text txt rdacontent ohne Hilfsmittel zu benutzen n rdamedia Band nc rdacarrier © TMS 2007 Wafer bumping technology using an electroless Ni/Au bump on a Cu patterned wafer is studied for the flip chip type CMOS image sensor (CIS) package for the camera module in mobile phones. The effect of different pretreatment steps on surface roughness and etching of Cu pads is investigated to improve the adherence between the Cu pad and the Ni/Au bump. This study measures the shear forces on Ni/Au bumps prepared in different ways, showing that the suitable pretreatment protocol for electroless Ni plating on Cu pads is “acid dip followed by Pd activation” rather than the conventional progression of “acid-dip, microetching, and Pd activation.” The interface between the Cu pad and the Ni/Au bump is studied using various surface analysis methods. The homogeneous distribution of catalytic Pd on the Cu pad is first validated. The flip chip package structure is designed, assembled, and tested for reliability. The successful flip chip bonding in the CIS package is characterized in terms of the cross-sectional structure in which the anisotropic conductive film (ACF) particles are deformed to about 1.5 μm in diameter. The experimental results suggest that electroless Ni/Au can be applied to the flip chip type CIS package using Cu patterned wafers for high mega pixel applications. Electroless Ni/Au bump catalytic Pd flip chip CMOS image sensor (CIS) package Enthalten in Journal of electronic materials Springer US, 1972 36(2007), 7 vom: 30. Mai, Seite 775-782 (DE-627)129398233 (DE-600)186069-0 (DE-576)014781387 0361-5235 nnns volume:36 year:2007 number:7 day:30 month:05 pages:775-782 https://doi.org/10.1007/s11664-007-0144-2 lizenzpflichtig Volltext GBV_USEFLAG_A SYSFLAG_A GBV_OLC SSG-OLC-TEC SSG-OLC-PHY GBV_ILN_70 GBV_ILN_2004 GBV_ILN_2006 GBV_ILN_2010 GBV_ILN_2020 GBV_ILN_2021 AR 36 2007 7 30 05 775-782 |
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10.1007/s11664-007-0144-2 doi (DE-627)OLC2042303437 (DE-He213)s11664-007-0144-2-p DE-627 ger DE-627 rakwb eng 670 VZ Kim, Joong-Do verfasserin aut Electroless Ni/Au Bump on a Copper Patterned Wafer for the CMOS Image Sensor Package in Mobile Phones 2007 Text txt rdacontent ohne Hilfsmittel zu benutzen n rdamedia Band nc rdacarrier © TMS 2007 Wafer bumping technology using an electroless Ni/Au bump on a Cu patterned wafer is studied for the flip chip type CMOS image sensor (CIS) package for the camera module in mobile phones. The effect of different pretreatment steps on surface roughness and etching of Cu pads is investigated to improve the adherence between the Cu pad and the Ni/Au bump. This study measures the shear forces on Ni/Au bumps prepared in different ways, showing that the suitable pretreatment protocol for electroless Ni plating on Cu pads is “acid dip followed by Pd activation” rather than the conventional progression of “acid-dip, microetching, and Pd activation.” The interface between the Cu pad and the Ni/Au bump is studied using various surface analysis methods. The homogeneous distribution of catalytic Pd on the Cu pad is first validated. The flip chip package structure is designed, assembled, and tested for reliability. The successful flip chip bonding in the CIS package is characterized in terms of the cross-sectional structure in which the anisotropic conductive film (ACF) particles are deformed to about 1.5 μm in diameter. The experimental results suggest that electroless Ni/Au can be applied to the flip chip type CIS package using Cu patterned wafers for high mega pixel applications. Electroless Ni/Au bump catalytic Pd flip chip CMOS image sensor (CIS) package Enthalten in Journal of electronic materials Springer US, 1972 36(2007), 7 vom: 30. Mai, Seite 775-782 (DE-627)129398233 (DE-600)186069-0 (DE-576)014781387 0361-5235 nnns volume:36 year:2007 number:7 day:30 month:05 pages:775-782 https://doi.org/10.1007/s11664-007-0144-2 lizenzpflichtig Volltext GBV_USEFLAG_A SYSFLAG_A GBV_OLC SSG-OLC-TEC SSG-OLC-PHY GBV_ILN_70 GBV_ILN_2004 GBV_ILN_2006 GBV_ILN_2010 GBV_ILN_2020 GBV_ILN_2021 AR 36 2007 7 30 05 775-782 |
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10.1007/s11664-007-0144-2 doi (DE-627)OLC2042303437 (DE-He213)s11664-007-0144-2-p DE-627 ger DE-627 rakwb eng 670 VZ Kim, Joong-Do verfasserin aut Electroless Ni/Au Bump on a Copper Patterned Wafer for the CMOS Image Sensor Package in Mobile Phones 2007 Text txt rdacontent ohne Hilfsmittel zu benutzen n rdamedia Band nc rdacarrier © TMS 2007 Wafer bumping technology using an electroless Ni/Au bump on a Cu patterned wafer is studied for the flip chip type CMOS image sensor (CIS) package for the camera module in mobile phones. The effect of different pretreatment steps on surface roughness and etching of Cu pads is investigated to improve the adherence between the Cu pad and the Ni/Au bump. This study measures the shear forces on Ni/Au bumps prepared in different ways, showing that the suitable pretreatment protocol for electroless Ni plating on Cu pads is “acid dip followed by Pd activation” rather than the conventional progression of “acid-dip, microetching, and Pd activation.” The interface between the Cu pad and the Ni/Au bump is studied using various surface analysis methods. The homogeneous distribution of catalytic Pd on the Cu pad is first validated. The flip chip package structure is designed, assembled, and tested for reliability. The successful flip chip bonding in the CIS package is characterized in terms of the cross-sectional structure in which the anisotropic conductive film (ACF) particles are deformed to about 1.5 μm in diameter. The experimental results suggest that electroless Ni/Au can be applied to the flip chip type CIS package using Cu patterned wafers for high mega pixel applications. Electroless Ni/Au bump catalytic Pd flip chip CMOS image sensor (CIS) package Enthalten in Journal of electronic materials Springer US, 1972 36(2007), 7 vom: 30. Mai, Seite 775-782 (DE-627)129398233 (DE-600)186069-0 (DE-576)014781387 0361-5235 nnns volume:36 year:2007 number:7 day:30 month:05 pages:775-782 https://doi.org/10.1007/s11664-007-0144-2 lizenzpflichtig Volltext GBV_USEFLAG_A SYSFLAG_A GBV_OLC SSG-OLC-TEC SSG-OLC-PHY GBV_ILN_70 GBV_ILN_2004 GBV_ILN_2006 GBV_ILN_2010 GBV_ILN_2020 GBV_ILN_2021 AR 36 2007 7 30 05 775-782 |
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10.1007/s11664-007-0144-2 doi (DE-627)OLC2042303437 (DE-He213)s11664-007-0144-2-p DE-627 ger DE-627 rakwb eng 670 VZ Kim, Joong-Do verfasserin aut Electroless Ni/Au Bump on a Copper Patterned Wafer for the CMOS Image Sensor Package in Mobile Phones 2007 Text txt rdacontent ohne Hilfsmittel zu benutzen n rdamedia Band nc rdacarrier © TMS 2007 Wafer bumping technology using an electroless Ni/Au bump on a Cu patterned wafer is studied for the flip chip type CMOS image sensor (CIS) package for the camera module in mobile phones. The effect of different pretreatment steps on surface roughness and etching of Cu pads is investigated to improve the adherence between the Cu pad and the Ni/Au bump. This study measures the shear forces on Ni/Au bumps prepared in different ways, showing that the suitable pretreatment protocol for electroless Ni plating on Cu pads is “acid dip followed by Pd activation” rather than the conventional progression of “acid-dip, microetching, and Pd activation.” The interface between the Cu pad and the Ni/Au bump is studied using various surface analysis methods. The homogeneous distribution of catalytic Pd on the Cu pad is first validated. The flip chip package structure is designed, assembled, and tested for reliability. The successful flip chip bonding in the CIS package is characterized in terms of the cross-sectional structure in which the anisotropic conductive film (ACF) particles are deformed to about 1.5 μm in diameter. The experimental results suggest that electroless Ni/Au can be applied to the flip chip type CIS package using Cu patterned wafers for high mega pixel applications. Electroless Ni/Au bump catalytic Pd flip chip CMOS image sensor (CIS) package Enthalten in Journal of electronic materials Springer US, 1972 36(2007), 7 vom: 30. Mai, Seite 775-782 (DE-627)129398233 (DE-600)186069-0 (DE-576)014781387 0361-5235 nnns volume:36 year:2007 number:7 day:30 month:05 pages:775-782 https://doi.org/10.1007/s11664-007-0144-2 lizenzpflichtig Volltext GBV_USEFLAG_A SYSFLAG_A GBV_OLC SSG-OLC-TEC SSG-OLC-PHY GBV_ILN_70 GBV_ILN_2004 GBV_ILN_2006 GBV_ILN_2010 GBV_ILN_2020 GBV_ILN_2021 AR 36 2007 7 30 05 775-782 |
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10.1007/s11664-007-0144-2 doi (DE-627)OLC2042303437 (DE-He213)s11664-007-0144-2-p DE-627 ger DE-627 rakwb eng 670 VZ Kim, Joong-Do verfasserin aut Electroless Ni/Au Bump on a Copper Patterned Wafer for the CMOS Image Sensor Package in Mobile Phones 2007 Text txt rdacontent ohne Hilfsmittel zu benutzen n rdamedia Band nc rdacarrier © TMS 2007 Wafer bumping technology using an electroless Ni/Au bump on a Cu patterned wafer is studied for the flip chip type CMOS image sensor (CIS) package for the camera module in mobile phones. The effect of different pretreatment steps on surface roughness and etching of Cu pads is investigated to improve the adherence between the Cu pad and the Ni/Au bump. This study measures the shear forces on Ni/Au bumps prepared in different ways, showing that the suitable pretreatment protocol for electroless Ni plating on Cu pads is “acid dip followed by Pd activation” rather than the conventional progression of “acid-dip, microetching, and Pd activation.” The interface between the Cu pad and the Ni/Au bump is studied using various surface analysis methods. The homogeneous distribution of catalytic Pd on the Cu pad is first validated. The flip chip package structure is designed, assembled, and tested for reliability. The successful flip chip bonding in the CIS package is characterized in terms of the cross-sectional structure in which the anisotropic conductive film (ACF) particles are deformed to about 1.5 μm in diameter. The experimental results suggest that electroless Ni/Au can be applied to the flip chip type CIS package using Cu patterned wafers for high mega pixel applications. Electroless Ni/Au bump catalytic Pd flip chip CMOS image sensor (CIS) package Enthalten in Journal of electronic materials Springer US, 1972 36(2007), 7 vom: 30. Mai, Seite 775-782 (DE-627)129398233 (DE-600)186069-0 (DE-576)014781387 0361-5235 nnns volume:36 year:2007 number:7 day:30 month:05 pages:775-782 https://doi.org/10.1007/s11664-007-0144-2 lizenzpflichtig Volltext GBV_USEFLAG_A SYSFLAG_A GBV_OLC SSG-OLC-TEC SSG-OLC-PHY GBV_ILN_70 GBV_ILN_2004 GBV_ILN_2006 GBV_ILN_2010 GBV_ILN_2020 GBV_ILN_2021 AR 36 2007 7 30 05 775-782 |
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Electroless Ni/Au Bump on a Copper Patterned Wafer for the CMOS Image Sensor Package in Mobile Phones |
| abstract |
Wafer bumping technology using an electroless Ni/Au bump on a Cu patterned wafer is studied for the flip chip type CMOS image sensor (CIS) package for the camera module in mobile phones. The effect of different pretreatment steps on surface roughness and etching of Cu pads is investigated to improve the adherence between the Cu pad and the Ni/Au bump. This study measures the shear forces on Ni/Au bumps prepared in different ways, showing that the suitable pretreatment protocol for electroless Ni plating on Cu pads is “acid dip followed by Pd activation” rather than the conventional progression of “acid-dip, microetching, and Pd activation.” The interface between the Cu pad and the Ni/Au bump is studied using various surface analysis methods. The homogeneous distribution of catalytic Pd on the Cu pad is first validated. The flip chip package structure is designed, assembled, and tested for reliability. The successful flip chip bonding in the CIS package is characterized in terms of the cross-sectional structure in which the anisotropic conductive film (ACF) particles are deformed to about 1.5 μm in diameter. The experimental results suggest that electroless Ni/Au can be applied to the flip chip type CIS package using Cu patterned wafers for high mega pixel applications. © TMS 2007 |
| abstractGer |
Wafer bumping technology using an electroless Ni/Au bump on a Cu patterned wafer is studied for the flip chip type CMOS image sensor (CIS) package for the camera module in mobile phones. The effect of different pretreatment steps on surface roughness and etching of Cu pads is investigated to improve the adherence between the Cu pad and the Ni/Au bump. This study measures the shear forces on Ni/Au bumps prepared in different ways, showing that the suitable pretreatment protocol for electroless Ni plating on Cu pads is “acid dip followed by Pd activation” rather than the conventional progression of “acid-dip, microetching, and Pd activation.” The interface between the Cu pad and the Ni/Au bump is studied using various surface analysis methods. The homogeneous distribution of catalytic Pd on the Cu pad is first validated. The flip chip package structure is designed, assembled, and tested for reliability. The successful flip chip bonding in the CIS package is characterized in terms of the cross-sectional structure in which the anisotropic conductive film (ACF) particles are deformed to about 1.5 μm in diameter. The experimental results suggest that electroless Ni/Au can be applied to the flip chip type CIS package using Cu patterned wafers for high mega pixel applications. © TMS 2007 |
| abstract_unstemmed |
Wafer bumping technology using an electroless Ni/Au bump on a Cu patterned wafer is studied for the flip chip type CMOS image sensor (CIS) package for the camera module in mobile phones. The effect of different pretreatment steps on surface roughness and etching of Cu pads is investigated to improve the adherence between the Cu pad and the Ni/Au bump. This study measures the shear forces on Ni/Au bumps prepared in different ways, showing that the suitable pretreatment protocol for electroless Ni plating on Cu pads is “acid dip followed by Pd activation” rather than the conventional progression of “acid-dip, microetching, and Pd activation.” The interface between the Cu pad and the Ni/Au bump is studied using various surface analysis methods. The homogeneous distribution of catalytic Pd on the Cu pad is first validated. The flip chip package structure is designed, assembled, and tested for reliability. The successful flip chip bonding in the CIS package is characterized in terms of the cross-sectional structure in which the anisotropic conductive film (ACF) particles are deformed to about 1.5 μm in diameter. The experimental results suggest that electroless Ni/Au can be applied to the flip chip type CIS package using Cu patterned wafers for high mega pixel applications. © TMS 2007 |
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| container_issue |
7 |
| title_short |
Electroless Ni/Au Bump on a Copper Patterned Wafer for the CMOS Image Sensor Package in Mobile Phones |
| url |
https://doi.org/10.1007/s11664-007-0144-2 |
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false |
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| doi_str |
10.1007/s11664-007-0144-2 |
| up_date |
2024-07-03T14:37:59.538Z |
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