Determining the Order of Processor Transactions in Statically Scheduled Multiprocessors
Abstract This paper addresses embedded multiprocessor implementation of iterative, real-time applications, such as digital signal and image processing, that are specified as dataflow graphs. Scheduling dataflow graphs on multiple processors involves assigning tasks to processors (processor assignmen...
Ausführliche Beschreibung
Gespeichert in:
| Autor*in: |
Sriram, S. [verfasserIn] |
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| Format: |
Artikel |
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| Sprache: |
Englisch |
| Erschienen: |
1997 |
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| Schlagwörter: |
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| Anmerkung: |
© Kluwer Academic Publishers 1997 |
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| Übergeordnetes Werk: |
Enthalten in: Journal of VLSI signal processing systems for signal, image and video technology - Kluwer Academic Publishers, 1989, 15(1997), 3 vom: 01. März, Seite 207-220 |
|---|---|
| Übergeordnetes Werk: |
volume:15 ; year:1997 ; number:3 ; day:01 ; month:03 ; pages:207-220 |
| Links: |
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| DOI / URN: |
10.1023/A:1007956226232 |
|---|
| Katalog-ID: |
OLC2062082223 |
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| 520 | |a Abstract This paper addresses embedded multiprocessor implementation of iterative, real-time applications, such as digital signal and image processing, that are specified as dataflow graphs. Scheduling dataflow graphs on multiple processors involves assigning tasks to processors (processor assignment), ordering the execution of tasks within each processor (task ordering), and determining when each task must commence execution. We consider three scheduling strategies: fully-static, self-timed and ordered transactions, all of which perform the assignment and ordering steps at compile time. Run time costs are small for the fully-static strategy; however it is not robust with respect to changes or uncertainty in task execution times. The self-timed approach is tolerant of variations in task execution times, but pays the penalty of high run time costs, because processors need to explicitly synchronize whenever they communicate. The ordered transactions approach lies between the fully-static and self-timed strategies; in this approach the order in which processors communicate is determined at compile time and enforced at run time. The ordered transactions strategy retains some of the flexibility of self-timed schedules and at the same time has lower run time costs than the self-timed approach. In this paper we determine an order of processor transactions that is nearly optimal given information about task execution times at compile time, and for a given processor assignment and task ordering. The criterion for optimality is the average throughput achieved by the schedule. Our main result is that it is possible to choose a transaction order such that the resulting ordered transactions schedule incurs no performance penalty compared to the more flexible self-timed strategy, even when the higher run time costs implied by the self-timed strategy are ignored. | ||
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10.1023/A:1007956226232 doi (DE-627)OLC2062082223 (DE-He213)A:1007956226232-p DE-627 ger DE-627 rakwb eng 620 VZ Sriram, S. verfasserin aut Determining the Order of Processor Transactions in Statically Scheduled Multiprocessors 1997 Text txt rdacontent ohne Hilfsmittel zu benutzen n rdamedia Band nc rdacarrier © Kluwer Academic Publishers 1997 Abstract This paper addresses embedded multiprocessor implementation of iterative, real-time applications, such as digital signal and image processing, that are specified as dataflow graphs. Scheduling dataflow graphs on multiple processors involves assigning tasks to processors (processor assignment), ordering the execution of tasks within each processor (task ordering), and determining when each task must commence execution. We consider three scheduling strategies: fully-static, self-timed and ordered transactions, all of which perform the assignment and ordering steps at compile time. Run time costs are small for the fully-static strategy; however it is not robust with respect to changes or uncertainty in task execution times. The self-timed approach is tolerant of variations in task execution times, but pays the penalty of high run time costs, because processors need to explicitly synchronize whenever they communicate. The ordered transactions approach lies between the fully-static and self-timed strategies; in this approach the order in which processors communicate is determined at compile time and enforced at run time. The ordered transactions strategy retains some of the flexibility of self-timed schedules and at the same time has lower run time costs than the self-timed approach. In this paper we determine an order of processor transactions that is nearly optimal given information about task execution times at compile time, and for a given processor assignment and task ordering. The criterion for optimality is the average throughput achieved by the schedule. Our main result is that it is possible to choose a transaction order such that the resulting ordered transactions schedule incurs no performance penalty compared to the more flexible self-timed strategy, even when the higher run time costs implied by the self-timed strategy are ignored. Execution Time Constraint Graph Task Execution Time Iteration Period Execution Time Estimate Lee, Edward A. aut Enthalten in Journal of VLSI signal processing systems for signal, image and video technology Kluwer Academic Publishers, 1989 15(1997), 3 vom: 01. März, Seite 207-220 (DE-627)130761508 (DE-600)1000618-7 (DE-576)02508416X 0922-5773 nnns volume:15 year:1997 number:3 day:01 month:03 pages:207-220 https://doi.org/10.1023/A:1007956226232 lizenzpflichtig Volltext GBV_USEFLAG_A SYSFLAG_A GBV_OLC SSG-OLC-TEC SSG-OLC-MAT GBV_ILN_70 GBV_ILN_2006 GBV_ILN_2020 GBV_ILN_2244 GBV_ILN_4318 GBV_ILN_4319 AR 15 1997 3 01 03 207-220 |
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10.1023/A:1007956226232 doi (DE-627)OLC2062082223 (DE-He213)A:1007956226232-p DE-627 ger DE-627 rakwb eng 620 VZ Sriram, S. verfasserin aut Determining the Order of Processor Transactions in Statically Scheduled Multiprocessors 1997 Text txt rdacontent ohne Hilfsmittel zu benutzen n rdamedia Band nc rdacarrier © Kluwer Academic Publishers 1997 Abstract This paper addresses embedded multiprocessor implementation of iterative, real-time applications, such as digital signal and image processing, that are specified as dataflow graphs. Scheduling dataflow graphs on multiple processors involves assigning tasks to processors (processor assignment), ordering the execution of tasks within each processor (task ordering), and determining when each task must commence execution. We consider three scheduling strategies: fully-static, self-timed and ordered transactions, all of which perform the assignment and ordering steps at compile time. Run time costs are small for the fully-static strategy; however it is not robust with respect to changes or uncertainty in task execution times. The self-timed approach is tolerant of variations in task execution times, but pays the penalty of high run time costs, because processors need to explicitly synchronize whenever they communicate. The ordered transactions approach lies between the fully-static and self-timed strategies; in this approach the order in which processors communicate is determined at compile time and enforced at run time. The ordered transactions strategy retains some of the flexibility of self-timed schedules and at the same time has lower run time costs than the self-timed approach. In this paper we determine an order of processor transactions that is nearly optimal given information about task execution times at compile time, and for a given processor assignment and task ordering. The criterion for optimality is the average throughput achieved by the schedule. Our main result is that it is possible to choose a transaction order such that the resulting ordered transactions schedule incurs no performance penalty compared to the more flexible self-timed strategy, even when the higher run time costs implied by the self-timed strategy are ignored. Execution Time Constraint Graph Task Execution Time Iteration Period Execution Time Estimate Lee, Edward A. aut Enthalten in Journal of VLSI signal processing systems for signal, image and video technology Kluwer Academic Publishers, 1989 15(1997), 3 vom: 01. März, Seite 207-220 (DE-627)130761508 (DE-600)1000618-7 (DE-576)02508416X 0922-5773 nnns volume:15 year:1997 number:3 day:01 month:03 pages:207-220 https://doi.org/10.1023/A:1007956226232 lizenzpflichtig Volltext GBV_USEFLAG_A SYSFLAG_A GBV_OLC SSG-OLC-TEC SSG-OLC-MAT GBV_ILN_70 GBV_ILN_2006 GBV_ILN_2020 GBV_ILN_2244 GBV_ILN_4318 GBV_ILN_4319 AR 15 1997 3 01 03 207-220 |
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10.1023/A:1007956226232 doi (DE-627)OLC2062082223 (DE-He213)A:1007956226232-p DE-627 ger DE-627 rakwb eng 620 VZ Sriram, S. verfasserin aut Determining the Order of Processor Transactions in Statically Scheduled Multiprocessors 1997 Text txt rdacontent ohne Hilfsmittel zu benutzen n rdamedia Band nc rdacarrier © Kluwer Academic Publishers 1997 Abstract This paper addresses embedded multiprocessor implementation of iterative, real-time applications, such as digital signal and image processing, that are specified as dataflow graphs. Scheduling dataflow graphs on multiple processors involves assigning tasks to processors (processor assignment), ordering the execution of tasks within each processor (task ordering), and determining when each task must commence execution. We consider three scheduling strategies: fully-static, self-timed and ordered transactions, all of which perform the assignment and ordering steps at compile time. Run time costs are small for the fully-static strategy; however it is not robust with respect to changes or uncertainty in task execution times. The self-timed approach is tolerant of variations in task execution times, but pays the penalty of high run time costs, because processors need to explicitly synchronize whenever they communicate. The ordered transactions approach lies between the fully-static and self-timed strategies; in this approach the order in which processors communicate is determined at compile time and enforced at run time. The ordered transactions strategy retains some of the flexibility of self-timed schedules and at the same time has lower run time costs than the self-timed approach. In this paper we determine an order of processor transactions that is nearly optimal given information about task execution times at compile time, and for a given processor assignment and task ordering. The criterion for optimality is the average throughput achieved by the schedule. Our main result is that it is possible to choose a transaction order such that the resulting ordered transactions schedule incurs no performance penalty compared to the more flexible self-timed strategy, even when the higher run time costs implied by the self-timed strategy are ignored. Execution Time Constraint Graph Task Execution Time Iteration Period Execution Time Estimate Lee, Edward A. aut Enthalten in Journal of VLSI signal processing systems for signal, image and video technology Kluwer Academic Publishers, 1989 15(1997), 3 vom: 01. März, Seite 207-220 (DE-627)130761508 (DE-600)1000618-7 (DE-576)02508416X 0922-5773 nnns volume:15 year:1997 number:3 day:01 month:03 pages:207-220 https://doi.org/10.1023/A:1007956226232 lizenzpflichtig Volltext GBV_USEFLAG_A SYSFLAG_A GBV_OLC SSG-OLC-TEC SSG-OLC-MAT GBV_ILN_70 GBV_ILN_2006 GBV_ILN_2020 GBV_ILN_2244 GBV_ILN_4318 GBV_ILN_4319 AR 15 1997 3 01 03 207-220 |
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10.1023/A:1007956226232 doi (DE-627)OLC2062082223 (DE-He213)A:1007956226232-p DE-627 ger DE-627 rakwb eng 620 VZ Sriram, S. verfasserin aut Determining the Order of Processor Transactions in Statically Scheduled Multiprocessors 1997 Text txt rdacontent ohne Hilfsmittel zu benutzen n rdamedia Band nc rdacarrier © Kluwer Academic Publishers 1997 Abstract This paper addresses embedded multiprocessor implementation of iterative, real-time applications, such as digital signal and image processing, that are specified as dataflow graphs. Scheduling dataflow graphs on multiple processors involves assigning tasks to processors (processor assignment), ordering the execution of tasks within each processor (task ordering), and determining when each task must commence execution. We consider three scheduling strategies: fully-static, self-timed and ordered transactions, all of which perform the assignment and ordering steps at compile time. Run time costs are small for the fully-static strategy; however it is not robust with respect to changes or uncertainty in task execution times. The self-timed approach is tolerant of variations in task execution times, but pays the penalty of high run time costs, because processors need to explicitly synchronize whenever they communicate. The ordered transactions approach lies between the fully-static and self-timed strategies; in this approach the order in which processors communicate is determined at compile time and enforced at run time. The ordered transactions strategy retains some of the flexibility of self-timed schedules and at the same time has lower run time costs than the self-timed approach. In this paper we determine an order of processor transactions that is nearly optimal given information about task execution times at compile time, and for a given processor assignment and task ordering. The criterion for optimality is the average throughput achieved by the schedule. Our main result is that it is possible to choose a transaction order such that the resulting ordered transactions schedule incurs no performance penalty compared to the more flexible self-timed strategy, even when the higher run time costs implied by the self-timed strategy are ignored. Execution Time Constraint Graph Task Execution Time Iteration Period Execution Time Estimate Lee, Edward A. aut Enthalten in Journal of VLSI signal processing systems for signal, image and video technology Kluwer Academic Publishers, 1989 15(1997), 3 vom: 01. März, Seite 207-220 (DE-627)130761508 (DE-600)1000618-7 (DE-576)02508416X 0922-5773 nnns volume:15 year:1997 number:3 day:01 month:03 pages:207-220 https://doi.org/10.1023/A:1007956226232 lizenzpflichtig Volltext GBV_USEFLAG_A SYSFLAG_A GBV_OLC SSG-OLC-TEC SSG-OLC-MAT GBV_ILN_70 GBV_ILN_2006 GBV_ILN_2020 GBV_ILN_2244 GBV_ILN_4318 GBV_ILN_4319 AR 15 1997 3 01 03 207-220 |
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10.1023/A:1007956226232 doi (DE-627)OLC2062082223 (DE-He213)A:1007956226232-p DE-627 ger DE-627 rakwb eng 620 VZ Sriram, S. verfasserin aut Determining the Order of Processor Transactions in Statically Scheduled Multiprocessors 1997 Text txt rdacontent ohne Hilfsmittel zu benutzen n rdamedia Band nc rdacarrier © Kluwer Academic Publishers 1997 Abstract This paper addresses embedded multiprocessor implementation of iterative, real-time applications, such as digital signal and image processing, that are specified as dataflow graphs. Scheduling dataflow graphs on multiple processors involves assigning tasks to processors (processor assignment), ordering the execution of tasks within each processor (task ordering), and determining when each task must commence execution. We consider three scheduling strategies: fully-static, self-timed and ordered transactions, all of which perform the assignment and ordering steps at compile time. Run time costs are small for the fully-static strategy; however it is not robust with respect to changes or uncertainty in task execution times. The self-timed approach is tolerant of variations in task execution times, but pays the penalty of high run time costs, because processors need to explicitly synchronize whenever they communicate. The ordered transactions approach lies between the fully-static and self-timed strategies; in this approach the order in which processors communicate is determined at compile time and enforced at run time. The ordered transactions strategy retains some of the flexibility of self-timed schedules and at the same time has lower run time costs than the self-timed approach. In this paper we determine an order of processor transactions that is nearly optimal given information about task execution times at compile time, and for a given processor assignment and task ordering. The criterion for optimality is the average throughput achieved by the schedule. Our main result is that it is possible to choose a transaction order such that the resulting ordered transactions schedule incurs no performance penalty compared to the more flexible self-timed strategy, even when the higher run time costs implied by the self-timed strategy are ignored. Execution Time Constraint Graph Task Execution Time Iteration Period Execution Time Estimate Lee, Edward A. aut Enthalten in Journal of VLSI signal processing systems for signal, image and video technology Kluwer Academic Publishers, 1989 15(1997), 3 vom: 01. März, Seite 207-220 (DE-627)130761508 (DE-600)1000618-7 (DE-576)02508416X 0922-5773 nnns volume:15 year:1997 number:3 day:01 month:03 pages:207-220 https://doi.org/10.1023/A:1007956226232 lizenzpflichtig Volltext GBV_USEFLAG_A SYSFLAG_A GBV_OLC SSG-OLC-TEC SSG-OLC-MAT GBV_ILN_70 GBV_ILN_2006 GBV_ILN_2020 GBV_ILN_2244 GBV_ILN_4318 GBV_ILN_4319 AR 15 1997 3 01 03 207-220 |
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Determining the Order of Processor Transactions in Statically Scheduled Multiprocessors |
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Determining the Order of Processor Transactions in Statically Scheduled Multiprocessors |
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Sriram, S. |
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Journal of VLSI signal processing systems for signal, image and video technology |
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Journal of VLSI signal processing systems for signal, image and video technology |
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1997 |
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Sriram, S. Lee, Edward A. |
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Sriram, S. |
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10.1023/A:1007956226232 |
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determining the order of processor transactions in statically scheduled multiprocessors |
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Determining the Order of Processor Transactions in Statically Scheduled Multiprocessors |
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Abstract This paper addresses embedded multiprocessor implementation of iterative, real-time applications, such as digital signal and image processing, that are specified as dataflow graphs. Scheduling dataflow graphs on multiple processors involves assigning tasks to processors (processor assignment), ordering the execution of tasks within each processor (task ordering), and determining when each task must commence execution. We consider three scheduling strategies: fully-static, self-timed and ordered transactions, all of which perform the assignment and ordering steps at compile time. Run time costs are small for the fully-static strategy; however it is not robust with respect to changes or uncertainty in task execution times. The self-timed approach is tolerant of variations in task execution times, but pays the penalty of high run time costs, because processors need to explicitly synchronize whenever they communicate. The ordered transactions approach lies between the fully-static and self-timed strategies; in this approach the order in which processors communicate is determined at compile time and enforced at run time. The ordered transactions strategy retains some of the flexibility of self-timed schedules and at the same time has lower run time costs than the self-timed approach. In this paper we determine an order of processor transactions that is nearly optimal given information about task execution times at compile time, and for a given processor assignment and task ordering. The criterion for optimality is the average throughput achieved by the schedule. Our main result is that it is possible to choose a transaction order such that the resulting ordered transactions schedule incurs no performance penalty compared to the more flexible self-timed strategy, even when the higher run time costs implied by the self-timed strategy are ignored. © Kluwer Academic Publishers 1997 |
| abstractGer |
Abstract This paper addresses embedded multiprocessor implementation of iterative, real-time applications, such as digital signal and image processing, that are specified as dataflow graphs. Scheduling dataflow graphs on multiple processors involves assigning tasks to processors (processor assignment), ordering the execution of tasks within each processor (task ordering), and determining when each task must commence execution. We consider three scheduling strategies: fully-static, self-timed and ordered transactions, all of which perform the assignment and ordering steps at compile time. Run time costs are small for the fully-static strategy; however it is not robust with respect to changes or uncertainty in task execution times. The self-timed approach is tolerant of variations in task execution times, but pays the penalty of high run time costs, because processors need to explicitly synchronize whenever they communicate. The ordered transactions approach lies between the fully-static and self-timed strategies; in this approach the order in which processors communicate is determined at compile time and enforced at run time. The ordered transactions strategy retains some of the flexibility of self-timed schedules and at the same time has lower run time costs than the self-timed approach. In this paper we determine an order of processor transactions that is nearly optimal given information about task execution times at compile time, and for a given processor assignment and task ordering. The criterion for optimality is the average throughput achieved by the schedule. Our main result is that it is possible to choose a transaction order such that the resulting ordered transactions schedule incurs no performance penalty compared to the more flexible self-timed strategy, even when the higher run time costs implied by the self-timed strategy are ignored. © Kluwer Academic Publishers 1997 |
| abstract_unstemmed |
Abstract This paper addresses embedded multiprocessor implementation of iterative, real-time applications, such as digital signal and image processing, that are specified as dataflow graphs. Scheduling dataflow graphs on multiple processors involves assigning tasks to processors (processor assignment), ordering the execution of tasks within each processor (task ordering), and determining when each task must commence execution. We consider three scheduling strategies: fully-static, self-timed and ordered transactions, all of which perform the assignment and ordering steps at compile time. Run time costs are small for the fully-static strategy; however it is not robust with respect to changes or uncertainty in task execution times. The self-timed approach is tolerant of variations in task execution times, but pays the penalty of high run time costs, because processors need to explicitly synchronize whenever they communicate. The ordered transactions approach lies between the fully-static and self-timed strategies; in this approach the order in which processors communicate is determined at compile time and enforced at run time. The ordered transactions strategy retains some of the flexibility of self-timed schedules and at the same time has lower run time costs than the self-timed approach. In this paper we determine an order of processor transactions that is nearly optimal given information about task execution times at compile time, and for a given processor assignment and task ordering. The criterion for optimality is the average throughput achieved by the schedule. Our main result is that it is possible to choose a transaction order such that the resulting ordered transactions schedule incurs no performance penalty compared to the more flexible self-timed strategy, even when the higher run time costs implied by the self-timed strategy are ignored. © Kluwer Academic Publishers 1997 |
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Determining the Order of Processor Transactions in Statically Scheduled Multiprocessors |
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