Instruction Scheduling for Low Power
Abstract Reducing energy consumption has become an important issue in designing hardware and software systems in recent years. Although low power hardware components are critical for reducing energy consumption, the switching activity, which is the main source of dynamic power dissipation in electro...
Ausführliche Beschreibung
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| Autor*in: |
Parikh, A. [verfasserIn] |
|---|
| Format: |
Artikel |
|---|---|
| Sprache: |
Englisch |
| Erschienen: |
2004 |
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| Anmerkung: |
© Kluwer Academic Publishers 2004 |
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| Übergeordnetes Werk: |
Enthalten in: Journal of VLSI signal processing systems for signal, image and video technology - Kluwer Academic Publishers, 1989, 37(2004), 1 vom: 01. Mai, Seite 129-149 |
|---|---|
| Übergeordnetes Werk: |
volume:37 ; year:2004 ; number:1 ; day:01 ; month:05 ; pages:129-149 |
| Links: |
|---|
| DOI / URN: |
10.1023/B:VLSI.0000017007.28247.f6 |
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| Katalog-ID: |
OLC2062086539 |
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| 520 | |a Abstract Reducing energy consumption has become an important issue in designing hardware and software systems in recent years. Although low power hardware components are critical for reducing energy consumption, the switching activity, which is the main source of dynamic power dissipation in electronic systems, is largely determined by the software running on these systems. In this paper, we present and evaluate several instruction scheduling algorithms that reorder a given sequence of instructions taking into account the energy considerations. We first compare a performance-oriented scheduling technique with three energy-oriented instruction scheduling algorithms from both performance (execution cycles of the resulting schedules) and energy consumption points of view. Then, we propose three scheduling algorithms that consider energy and performance at the same time. Our experimentation with these scheduling techniques shows that the best scheduling from the performance perspective is not necessarily the best scheduling from the energy perspective. Further, scheduling techniques that consider both energy and performance simultaneously are found to be desirable, that is, these techniques are quite successful in reducing energy consumption and their performance (in terms of execution cycles) is comparable to that of a pure performance-oriented scheduling. We also illuminate the inherent approximations and difficulties in building energy models for enabling energy-aware instruction scheduling and explore alternative options using cycle-accurate energy simulator. The simulation results show that the energy-oriented scheduling reduces energy consumption by up to 30% compared to the performance-oriented scheduling. | ||
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| 700 | 1 | |a Irwin, M.J. |4 aut | |
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10.1023/B:VLSI.0000017007.28247.f6 doi (DE-627)OLC2062086539 (DE-He213)B:VLSI.0000017007.28247.f6-p DE-627 ger DE-627 rakwb eng 620 VZ Parikh, A. verfasserin aut Instruction Scheduling for Low Power 2004 Text txt rdacontent ohne Hilfsmittel zu benutzen n rdamedia Band nc rdacarrier © Kluwer Academic Publishers 2004 Abstract Reducing energy consumption has become an important issue in designing hardware and software systems in recent years. Although low power hardware components are critical for reducing energy consumption, the switching activity, which is the main source of dynamic power dissipation in electronic systems, is largely determined by the software running on these systems. In this paper, we present and evaluate several instruction scheduling algorithms that reorder a given sequence of instructions taking into account the energy considerations. We first compare a performance-oriented scheduling technique with three energy-oriented instruction scheduling algorithms from both performance (execution cycles of the resulting schedules) and energy consumption points of view. Then, we propose three scheduling algorithms that consider energy and performance at the same time. Our experimentation with these scheduling techniques shows that the best scheduling from the performance perspective is not necessarily the best scheduling from the energy perspective. Further, scheduling techniques that consider both energy and performance simultaneously are found to be desirable, that is, these techniques are quite successful in reducing energy consumption and their performance (in terms of execution cycles) is comparable to that of a pure performance-oriented scheduling. We also illuminate the inherent approximations and difficulties in building energy models for enabling energy-aware instruction scheduling and explore alternative options using cycle-accurate energy simulator. The simulation results show that the energy-oriented scheduling reduces energy consumption by up to 30% compared to the performance-oriented scheduling. Kim, Soontae aut Kandemir, M. aut Vijaykrishnan, N. aut Irwin, M.J. aut Enthalten in Journal of VLSI signal processing systems for signal, image and video technology Kluwer Academic Publishers, 1989 37(2004), 1 vom: 01. Mai, Seite 129-149 (DE-627)130761508 (DE-600)1000618-7 (DE-576)02508416X 0922-5773 nnns volume:37 year:2004 number:1 day:01 month:05 pages:129-149 https://doi.org/10.1023/B:VLSI.0000017007.28247.f6 lizenzpflichtig Volltext GBV_USEFLAG_A SYSFLAG_A GBV_OLC SSG-OLC-TEC SSG-OLC-MAT GBV_ILN_23 GBV_ILN_31 GBV_ILN_70 GBV_ILN_2006 GBV_ILN_2244 GBV_ILN_4307 GBV_ILN_4319 AR 37 2004 1 01 05 129-149 |
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10.1023/B:VLSI.0000017007.28247.f6 doi (DE-627)OLC2062086539 (DE-He213)B:VLSI.0000017007.28247.f6-p DE-627 ger DE-627 rakwb eng 620 VZ Parikh, A. verfasserin aut Instruction Scheduling for Low Power 2004 Text txt rdacontent ohne Hilfsmittel zu benutzen n rdamedia Band nc rdacarrier © Kluwer Academic Publishers 2004 Abstract Reducing energy consumption has become an important issue in designing hardware and software systems in recent years. Although low power hardware components are critical for reducing energy consumption, the switching activity, which is the main source of dynamic power dissipation in electronic systems, is largely determined by the software running on these systems. In this paper, we present and evaluate several instruction scheduling algorithms that reorder a given sequence of instructions taking into account the energy considerations. We first compare a performance-oriented scheduling technique with three energy-oriented instruction scheduling algorithms from both performance (execution cycles of the resulting schedules) and energy consumption points of view. Then, we propose three scheduling algorithms that consider energy and performance at the same time. Our experimentation with these scheduling techniques shows that the best scheduling from the performance perspective is not necessarily the best scheduling from the energy perspective. Further, scheduling techniques that consider both energy and performance simultaneously are found to be desirable, that is, these techniques are quite successful in reducing energy consumption and their performance (in terms of execution cycles) is comparable to that of a pure performance-oriented scheduling. We also illuminate the inherent approximations and difficulties in building energy models for enabling energy-aware instruction scheduling and explore alternative options using cycle-accurate energy simulator. The simulation results show that the energy-oriented scheduling reduces energy consumption by up to 30% compared to the performance-oriented scheduling. Kim, Soontae aut Kandemir, M. aut Vijaykrishnan, N. aut Irwin, M.J. aut Enthalten in Journal of VLSI signal processing systems for signal, image and video technology Kluwer Academic Publishers, 1989 37(2004), 1 vom: 01. Mai, Seite 129-149 (DE-627)130761508 (DE-600)1000618-7 (DE-576)02508416X 0922-5773 nnns volume:37 year:2004 number:1 day:01 month:05 pages:129-149 https://doi.org/10.1023/B:VLSI.0000017007.28247.f6 lizenzpflichtig Volltext GBV_USEFLAG_A SYSFLAG_A GBV_OLC SSG-OLC-TEC SSG-OLC-MAT GBV_ILN_23 GBV_ILN_31 GBV_ILN_70 GBV_ILN_2006 GBV_ILN_2244 GBV_ILN_4307 GBV_ILN_4319 AR 37 2004 1 01 05 129-149 |
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10.1023/B:VLSI.0000017007.28247.f6 doi (DE-627)OLC2062086539 (DE-He213)B:VLSI.0000017007.28247.f6-p DE-627 ger DE-627 rakwb eng 620 VZ Parikh, A. verfasserin aut Instruction Scheduling for Low Power 2004 Text txt rdacontent ohne Hilfsmittel zu benutzen n rdamedia Band nc rdacarrier © Kluwer Academic Publishers 2004 Abstract Reducing energy consumption has become an important issue in designing hardware and software systems in recent years. Although low power hardware components are critical for reducing energy consumption, the switching activity, which is the main source of dynamic power dissipation in electronic systems, is largely determined by the software running on these systems. In this paper, we present and evaluate several instruction scheduling algorithms that reorder a given sequence of instructions taking into account the energy considerations. We first compare a performance-oriented scheduling technique with three energy-oriented instruction scheduling algorithms from both performance (execution cycles of the resulting schedules) and energy consumption points of view. Then, we propose three scheduling algorithms that consider energy and performance at the same time. Our experimentation with these scheduling techniques shows that the best scheduling from the performance perspective is not necessarily the best scheduling from the energy perspective. Further, scheduling techniques that consider both energy and performance simultaneously are found to be desirable, that is, these techniques are quite successful in reducing energy consumption and their performance (in terms of execution cycles) is comparable to that of a pure performance-oriented scheduling. We also illuminate the inherent approximations and difficulties in building energy models for enabling energy-aware instruction scheduling and explore alternative options using cycle-accurate energy simulator. The simulation results show that the energy-oriented scheduling reduces energy consumption by up to 30% compared to the performance-oriented scheduling. Kim, Soontae aut Kandemir, M. aut Vijaykrishnan, N. aut Irwin, M.J. aut Enthalten in Journal of VLSI signal processing systems for signal, image and video technology Kluwer Academic Publishers, 1989 37(2004), 1 vom: 01. Mai, Seite 129-149 (DE-627)130761508 (DE-600)1000618-7 (DE-576)02508416X 0922-5773 nnns volume:37 year:2004 number:1 day:01 month:05 pages:129-149 https://doi.org/10.1023/B:VLSI.0000017007.28247.f6 lizenzpflichtig Volltext GBV_USEFLAG_A SYSFLAG_A GBV_OLC SSG-OLC-TEC SSG-OLC-MAT GBV_ILN_23 GBV_ILN_31 GBV_ILN_70 GBV_ILN_2006 GBV_ILN_2244 GBV_ILN_4307 GBV_ILN_4319 AR 37 2004 1 01 05 129-149 |
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10.1023/B:VLSI.0000017007.28247.f6 |
| dewey-full |
620 |
| title_sort |
instruction scheduling for low power |
| title_auth |
Instruction Scheduling for Low Power |
| abstract |
Abstract Reducing energy consumption has become an important issue in designing hardware and software systems in recent years. Although low power hardware components are critical for reducing energy consumption, the switching activity, which is the main source of dynamic power dissipation in electronic systems, is largely determined by the software running on these systems. In this paper, we present and evaluate several instruction scheduling algorithms that reorder a given sequence of instructions taking into account the energy considerations. We first compare a performance-oriented scheduling technique with three energy-oriented instruction scheduling algorithms from both performance (execution cycles of the resulting schedules) and energy consumption points of view. Then, we propose three scheduling algorithms that consider energy and performance at the same time. Our experimentation with these scheduling techniques shows that the best scheduling from the performance perspective is not necessarily the best scheduling from the energy perspective. Further, scheduling techniques that consider both energy and performance simultaneously are found to be desirable, that is, these techniques are quite successful in reducing energy consumption and their performance (in terms of execution cycles) is comparable to that of a pure performance-oriented scheduling. We also illuminate the inherent approximations and difficulties in building energy models for enabling energy-aware instruction scheduling and explore alternative options using cycle-accurate energy simulator. The simulation results show that the energy-oriented scheduling reduces energy consumption by up to 30% compared to the performance-oriented scheduling. © Kluwer Academic Publishers 2004 |
| abstractGer |
Abstract Reducing energy consumption has become an important issue in designing hardware and software systems in recent years. Although low power hardware components are critical for reducing energy consumption, the switching activity, which is the main source of dynamic power dissipation in electronic systems, is largely determined by the software running on these systems. In this paper, we present and evaluate several instruction scheduling algorithms that reorder a given sequence of instructions taking into account the energy considerations. We first compare a performance-oriented scheduling technique with three energy-oriented instruction scheduling algorithms from both performance (execution cycles of the resulting schedules) and energy consumption points of view. Then, we propose three scheduling algorithms that consider energy and performance at the same time. Our experimentation with these scheduling techniques shows that the best scheduling from the performance perspective is not necessarily the best scheduling from the energy perspective. Further, scheduling techniques that consider both energy and performance simultaneously are found to be desirable, that is, these techniques are quite successful in reducing energy consumption and their performance (in terms of execution cycles) is comparable to that of a pure performance-oriented scheduling. We also illuminate the inherent approximations and difficulties in building energy models for enabling energy-aware instruction scheduling and explore alternative options using cycle-accurate energy simulator. The simulation results show that the energy-oriented scheduling reduces energy consumption by up to 30% compared to the performance-oriented scheduling. © Kluwer Academic Publishers 2004 |
| abstract_unstemmed |
Abstract Reducing energy consumption has become an important issue in designing hardware and software systems in recent years. Although low power hardware components are critical for reducing energy consumption, the switching activity, which is the main source of dynamic power dissipation in electronic systems, is largely determined by the software running on these systems. In this paper, we present and evaluate several instruction scheduling algorithms that reorder a given sequence of instructions taking into account the energy considerations. We first compare a performance-oriented scheduling technique with three energy-oriented instruction scheduling algorithms from both performance (execution cycles of the resulting schedules) and energy consumption points of view. Then, we propose three scheduling algorithms that consider energy and performance at the same time. Our experimentation with these scheduling techniques shows that the best scheduling from the performance perspective is not necessarily the best scheduling from the energy perspective. Further, scheduling techniques that consider both energy and performance simultaneously are found to be desirable, that is, these techniques are quite successful in reducing energy consumption and their performance (in terms of execution cycles) is comparable to that of a pure performance-oriented scheduling. We also illuminate the inherent approximations and difficulties in building energy models for enabling energy-aware instruction scheduling and explore alternative options using cycle-accurate energy simulator. The simulation results show that the energy-oriented scheduling reduces energy consumption by up to 30% compared to the performance-oriented scheduling. © Kluwer Academic Publishers 2004 |
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Instruction Scheduling for Low Power |
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| author2 |
Kim, Soontae Kandemir, M. Vijaykrishnan, N. Irwin, M.J. |
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Kim, Soontae Kandemir, M. Vijaykrishnan, N. Irwin, M.J. |
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| up_date |
2024-07-03T13:41:15.244Z |
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