Delta-sigma modulator of the analog-to-digital converter with ternary data encoding
Abstract The results of the development of the delta-sigma modulator of the analog-to-digital converter with ternary data encoding are presented in the paper. The oversampling ratio is 54; the clock frequency selected is 100 MHz. The suggested circuit engineering solutions are designed for manufactu...
Ausführliche Beschreibung
Autor*in: |
Morozov, D. V. [verfasserIn] |
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Format: |
Artikel |
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Sprache: |
Englisch |
Erschienen: |
2011 |
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Schlagwörter: |
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Anmerkung: |
© Pleiades Publishing, Ltd. 2011 |
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Übergeordnetes Werk: |
Enthalten in: Russian microelectronics - SP MAIK Nauka/Interperiodica, 1992, 40(2011), 1 vom: Jan., Seite 59-69 |
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Übergeordnetes Werk: |
volume:40 ; year:2011 ; number:1 ; month:01 ; pages:59-69 |
Links: |
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DOI / URN: |
10.1134/S1063739710061034 |
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Katalog-ID: |
OLC206757356X |
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10.1134/S1063739710061034 doi (DE-627)OLC206757356X (DE-He213)S1063739710061034-p DE-627 ger DE-627 rakwb eng 620 VZ Morozov, D. V. verfasserin aut Delta-sigma modulator of the analog-to-digital converter with ternary data encoding 2011 Text txt rdacontent ohne Hilfsmittel zu benutzen n rdamedia Band nc rdacarrier © Pleiades Publishing, Ltd. 2011 Abstract The results of the development of the delta-sigma modulator of the analog-to-digital converter with ternary data encoding are presented in the paper. The oversampling ratio is 54; the clock frequency selected is 100 MHz. The suggested circuit engineering solutions are designed for manufacturing using the standard 0.18 μmMOS technology and bipolar power of ±0.9 V. Circuit performance capability is confirmed by the simulation results. RUSSIAN Microelectronics Input Signal Frequency Delta Sigma Modulator Operational Transconductance Amplifier Delta Sigma Pilipko, M. M. aut Korotkov, A. S. aut Enthalten in Russian microelectronics SP MAIK Nauka/Interperiodica, 1992 40(2011), 1 vom: Jan., Seite 59-69 (DE-627)131158309 (DE-600)1133385-6 (DE-576)285629654 1063-7397 nnns volume:40 year:2011 number:1 month:01 pages:59-69 https://doi.org/10.1134/S1063739710061034 lizenzpflichtig Volltext GBV_USEFLAG_A SYSFLAG_A GBV_OLC SSG-OLC-TEC GBV_ILN_70 AR 40 2011 1 01 59-69 |
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10.1134/S1063739710061034 doi (DE-627)OLC206757356X (DE-He213)S1063739710061034-p DE-627 ger DE-627 rakwb eng 620 VZ Morozov, D. V. verfasserin aut Delta-sigma modulator of the analog-to-digital converter with ternary data encoding 2011 Text txt rdacontent ohne Hilfsmittel zu benutzen n rdamedia Band nc rdacarrier © Pleiades Publishing, Ltd. 2011 Abstract The results of the development of the delta-sigma modulator of the analog-to-digital converter with ternary data encoding are presented in the paper. The oversampling ratio is 54; the clock frequency selected is 100 MHz. The suggested circuit engineering solutions are designed for manufacturing using the standard 0.18 μmMOS technology and bipolar power of ±0.9 V. Circuit performance capability is confirmed by the simulation results. RUSSIAN Microelectronics Input Signal Frequency Delta Sigma Modulator Operational Transconductance Amplifier Delta Sigma Pilipko, M. M. aut Korotkov, A. S. aut Enthalten in Russian microelectronics SP MAIK Nauka/Interperiodica, 1992 40(2011), 1 vom: Jan., Seite 59-69 (DE-627)131158309 (DE-600)1133385-6 (DE-576)285629654 1063-7397 nnns volume:40 year:2011 number:1 month:01 pages:59-69 https://doi.org/10.1134/S1063739710061034 lizenzpflichtig Volltext GBV_USEFLAG_A SYSFLAG_A GBV_OLC SSG-OLC-TEC GBV_ILN_70 AR 40 2011 1 01 59-69 |
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10.1134/S1063739710061034 doi (DE-627)OLC206757356X (DE-He213)S1063739710061034-p DE-627 ger DE-627 rakwb eng 620 VZ Morozov, D. V. verfasserin aut Delta-sigma modulator of the analog-to-digital converter with ternary data encoding 2011 Text txt rdacontent ohne Hilfsmittel zu benutzen n rdamedia Band nc rdacarrier © Pleiades Publishing, Ltd. 2011 Abstract The results of the development of the delta-sigma modulator of the analog-to-digital converter with ternary data encoding are presented in the paper. The oversampling ratio is 54; the clock frequency selected is 100 MHz. The suggested circuit engineering solutions are designed for manufacturing using the standard 0.18 μmMOS technology and bipolar power of ±0.9 V. Circuit performance capability is confirmed by the simulation results. RUSSIAN Microelectronics Input Signal Frequency Delta Sigma Modulator Operational Transconductance Amplifier Delta Sigma Pilipko, M. M. aut Korotkov, A. S. aut Enthalten in Russian microelectronics SP MAIK Nauka/Interperiodica, 1992 40(2011), 1 vom: Jan., Seite 59-69 (DE-627)131158309 (DE-600)1133385-6 (DE-576)285629654 1063-7397 nnns volume:40 year:2011 number:1 month:01 pages:59-69 https://doi.org/10.1134/S1063739710061034 lizenzpflichtig Volltext GBV_USEFLAG_A SYSFLAG_A GBV_OLC SSG-OLC-TEC GBV_ILN_70 AR 40 2011 1 01 59-69 |
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10.1134/S1063739710061034 doi (DE-627)OLC206757356X (DE-He213)S1063739710061034-p DE-627 ger DE-627 rakwb eng 620 VZ Morozov, D. V. verfasserin aut Delta-sigma modulator of the analog-to-digital converter with ternary data encoding 2011 Text txt rdacontent ohne Hilfsmittel zu benutzen n rdamedia Band nc rdacarrier © Pleiades Publishing, Ltd. 2011 Abstract The results of the development of the delta-sigma modulator of the analog-to-digital converter with ternary data encoding are presented in the paper. The oversampling ratio is 54; the clock frequency selected is 100 MHz. The suggested circuit engineering solutions are designed for manufacturing using the standard 0.18 μmMOS technology and bipolar power of ±0.9 V. Circuit performance capability is confirmed by the simulation results. RUSSIAN Microelectronics Input Signal Frequency Delta Sigma Modulator Operational Transconductance Amplifier Delta Sigma Pilipko, M. M. aut Korotkov, A. S. aut Enthalten in Russian microelectronics SP MAIK Nauka/Interperiodica, 1992 40(2011), 1 vom: Jan., Seite 59-69 (DE-627)131158309 (DE-600)1133385-6 (DE-576)285629654 1063-7397 nnns volume:40 year:2011 number:1 month:01 pages:59-69 https://doi.org/10.1134/S1063739710061034 lizenzpflichtig Volltext GBV_USEFLAG_A SYSFLAG_A GBV_OLC SSG-OLC-TEC GBV_ILN_70 AR 40 2011 1 01 59-69 |
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10.1134/S1063739710061034 doi (DE-627)OLC206757356X (DE-He213)S1063739710061034-p DE-627 ger DE-627 rakwb eng 620 VZ Morozov, D. V. verfasserin aut Delta-sigma modulator of the analog-to-digital converter with ternary data encoding 2011 Text txt rdacontent ohne Hilfsmittel zu benutzen n rdamedia Band nc rdacarrier © Pleiades Publishing, Ltd. 2011 Abstract The results of the development of the delta-sigma modulator of the analog-to-digital converter with ternary data encoding are presented in the paper. The oversampling ratio is 54; the clock frequency selected is 100 MHz. The suggested circuit engineering solutions are designed for manufacturing using the standard 0.18 μmMOS technology and bipolar power of ±0.9 V. Circuit performance capability is confirmed by the simulation results. RUSSIAN Microelectronics Input Signal Frequency Delta Sigma Modulator Operational Transconductance Amplifier Delta Sigma Pilipko, M. M. aut Korotkov, A. S. aut Enthalten in Russian microelectronics SP MAIK Nauka/Interperiodica, 1992 40(2011), 1 vom: Jan., Seite 59-69 (DE-627)131158309 (DE-600)1133385-6 (DE-576)285629654 1063-7397 nnns volume:40 year:2011 number:1 month:01 pages:59-69 https://doi.org/10.1134/S1063739710061034 lizenzpflichtig Volltext GBV_USEFLAG_A SYSFLAG_A GBV_OLC SSG-OLC-TEC GBV_ILN_70 AR 40 2011 1 01 59-69 |
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delta-sigma modulator of the analog-to-digital converter with ternary data encoding |
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Delta-sigma modulator of the analog-to-digital converter with ternary data encoding |
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Abstract The results of the development of the delta-sigma modulator of the analog-to-digital converter with ternary data encoding are presented in the paper. The oversampling ratio is 54; the clock frequency selected is 100 MHz. The suggested circuit engineering solutions are designed for manufacturing using the standard 0.18 μmMOS technology and bipolar power of ±0.9 V. Circuit performance capability is confirmed by the simulation results. © Pleiades Publishing, Ltd. 2011 |
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Abstract The results of the development of the delta-sigma modulator of the analog-to-digital converter with ternary data encoding are presented in the paper. The oversampling ratio is 54; the clock frequency selected is 100 MHz. The suggested circuit engineering solutions are designed for manufacturing using the standard 0.18 μmMOS technology and bipolar power of ±0.9 V. Circuit performance capability is confirmed by the simulation results. © Pleiades Publishing, Ltd. 2011 |
abstract_unstemmed |
Abstract The results of the development of the delta-sigma modulator of the analog-to-digital converter with ternary data encoding are presented in the paper. The oversampling ratio is 54; the clock frequency selected is 100 MHz. The suggested circuit engineering solutions are designed for manufacturing using the standard 0.18 μmMOS technology and bipolar power of ±0.9 V. Circuit performance capability is confirmed by the simulation results. © Pleiades Publishing, Ltd. 2011 |
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The oversampling ratio is 54; the clock frequency selected is 100 MHz. The suggested circuit engineering solutions are designed for manufacturing using the standard 0.18 μmMOS technology and bipolar power of ±0.9 V. Circuit performance capability is confirmed by the simulation results.</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">RUSSIAN Microelectronics</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Input Signal Frequency</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Delta Sigma Modulator</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Operational Transconductance Amplifier</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Delta Sigma</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Pilipko, M. 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S.</subfield><subfield code="4">aut</subfield></datafield><datafield tag="773" ind1="0" ind2="8"><subfield code="i">Enthalten in</subfield><subfield code="t">Russian microelectronics</subfield><subfield code="d">SP MAIK Nauka/Interperiodica, 1992</subfield><subfield code="g">40(2011), 1 vom: Jan., Seite 59-69</subfield><subfield code="w">(DE-627)131158309</subfield><subfield code="w">(DE-600)1133385-6</subfield><subfield code="w">(DE-576)285629654</subfield><subfield code="x">1063-7397</subfield><subfield code="7">nnns</subfield></datafield><datafield tag="773" ind1="1" ind2="8"><subfield code="g">volume:40</subfield><subfield code="g">year:2011</subfield><subfield code="g">number:1</subfield><subfield code="g">month:01</subfield><subfield code="g">pages:59-69</subfield></datafield><datafield tag="856" ind1="4" ind2="1"><subfield code="u">https://doi.org/10.1134/S1063739710061034</subfield><subfield code="z">lizenzpflichtig</subfield><subfield code="3">Volltext</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_USEFLAG_A</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">SYSFLAG_A</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_OLC</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">SSG-OLC-TEC</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_70</subfield></datafield><datafield tag="951" ind1=" " ind2=" "><subfield code="a">AR</subfield></datafield><datafield tag="952" ind1=" " ind2=" "><subfield code="d">40</subfield><subfield code="j">2011</subfield><subfield code="e">1</subfield><subfield code="c">01</subfield><subfield code="h">59-69</subfield></datafield></record></collection>
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