Memristor-based circuit implementation of Competitive Neural Network based on online unsupervised Hebbian learning rule for pattern recognition
Abstract In this paper, a Competitive Neural Network circuit based on voltage-controlled memristors is proposed, of which the synapse structure is one memristor (1M). The designed circuit consists of the forward calculation part and the weight updating part. The forward calculation part is designed...
Ausführliche Beschreibung
Autor*in: |
Li, Mian [verfasserIn] |
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Artikel |
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Englisch |
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2021 |
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Anmerkung: |
© The Author(s), under exclusive licence to Springer-Verlag London Ltd., part of Springer Nature 2021 |
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Übergeordnetes Werk: |
Enthalten in: Neural computing & applications - Springer London, 1993, 34(2021), 1 vom: 07. Aug., Seite 319-331 |
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Übergeordnetes Werk: |
volume:34 ; year:2021 ; number:1 ; day:07 ; month:08 ; pages:319-331 |
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DOI / URN: |
10.1007/s00521-021-06361-4 |
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OLC2077769564 |
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520 | |a Abstract In this paper, a Competitive Neural Network circuit based on voltage-controlled memristors is proposed, of which the synapse structure is one memristor (1M). The designed circuit consists of the forward calculation part and the weight updating part. The forward calculation part is designed according to the winner-take-all mechanism, in which the m-LIF model and PMOS transistors with switching characteristics are combined to achieve the lateral inhibition. The weight updating part is designed based on the Hebbian learning rule. By using the voltage controlled switches, only the synaptic memristors connected to the winner output neuron obtained from the forward calculation part are adjusted. The whole circuit does not require the participation of CPU, FPGA or other microcontrollers, providing the possibility to realize computing-in-memory and parallel computing. We perform simulation experiments of unsupervised online learning of 5*3 pixels patterns and 28*28 pixels patterns based on the designed circuit in PSPICE. The changing trend of the network weights during the training phase and the high recognition accuracy in the recognition phase verify the network can effectively learn and recognize different patterns. | ||
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10.1007/s00521-021-06361-4 doi (DE-627)OLC2077769564 (DE-He213)s00521-021-06361-4-p DE-627 ger DE-627 rakwb eng 004 VZ Li, Mian verfasserin aut Memristor-based circuit implementation of Competitive Neural Network based on online unsupervised Hebbian learning rule for pattern recognition 2021 Text txt rdacontent ohne Hilfsmittel zu benutzen n rdamedia Band nc rdacarrier © The Author(s), under exclusive licence to Springer-Verlag London Ltd., part of Springer Nature 2021 Abstract In this paper, a Competitive Neural Network circuit based on voltage-controlled memristors is proposed, of which the synapse structure is one memristor (1M). The designed circuit consists of the forward calculation part and the weight updating part. The forward calculation part is designed according to the winner-take-all mechanism, in which the m-LIF model and PMOS transistors with switching characteristics are combined to achieve the lateral inhibition. The weight updating part is designed based on the Hebbian learning rule. By using the voltage controlled switches, only the synaptic memristors connected to the winner output neuron obtained from the forward calculation part are adjusted. The whole circuit does not require the participation of CPU, FPGA or other microcontrollers, providing the possibility to realize computing-in-memory and parallel computing. We perform simulation experiments of unsupervised online learning of 5*3 pixels patterns and 28*28 pixels patterns based on the designed circuit in PSPICE. The changing trend of the network weights during the training phase and the high recognition accuracy in the recognition phase verify the network can effectively learn and recognize different patterns. Memristive circuit Competitive Neural Network Unsupervised learning Winner-take-all Pattern recognition Hong, Qinghui aut Wang, Xiaoping (orcid)0000-0002-4909-8286 aut Enthalten in Neural computing & applications Springer London, 1993 34(2021), 1 vom: 07. Aug., Seite 319-331 (DE-627)165669608 (DE-600)1136944-9 (DE-576)032873050 0941-0643 nnns volume:34 year:2021 number:1 day:07 month:08 pages:319-331 https://doi.org/10.1007/s00521-021-06361-4 lizenzpflichtig Volltext GBV_USEFLAG_A SYSFLAG_A GBV_OLC SSG-OLC-MAT GBV_ILN_2018 GBV_ILN_4277 AR 34 2021 1 07 08 319-331 |
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10.1007/s00521-021-06361-4 doi (DE-627)OLC2077769564 (DE-He213)s00521-021-06361-4-p DE-627 ger DE-627 rakwb eng 004 VZ Li, Mian verfasserin aut Memristor-based circuit implementation of Competitive Neural Network based on online unsupervised Hebbian learning rule for pattern recognition 2021 Text txt rdacontent ohne Hilfsmittel zu benutzen n rdamedia Band nc rdacarrier © The Author(s), under exclusive licence to Springer-Verlag London Ltd., part of Springer Nature 2021 Abstract In this paper, a Competitive Neural Network circuit based on voltage-controlled memristors is proposed, of which the synapse structure is one memristor (1M). The designed circuit consists of the forward calculation part and the weight updating part. The forward calculation part is designed according to the winner-take-all mechanism, in which the m-LIF model and PMOS transistors with switching characteristics are combined to achieve the lateral inhibition. The weight updating part is designed based on the Hebbian learning rule. By using the voltage controlled switches, only the synaptic memristors connected to the winner output neuron obtained from the forward calculation part are adjusted. The whole circuit does not require the participation of CPU, FPGA or other microcontrollers, providing the possibility to realize computing-in-memory and parallel computing. We perform simulation experiments of unsupervised online learning of 5*3 pixels patterns and 28*28 pixels patterns based on the designed circuit in PSPICE. The changing trend of the network weights during the training phase and the high recognition accuracy in the recognition phase verify the network can effectively learn and recognize different patterns. Memristive circuit Competitive Neural Network Unsupervised learning Winner-take-all Pattern recognition Hong, Qinghui aut Wang, Xiaoping (orcid)0000-0002-4909-8286 aut Enthalten in Neural computing & applications Springer London, 1993 34(2021), 1 vom: 07. Aug., Seite 319-331 (DE-627)165669608 (DE-600)1136944-9 (DE-576)032873050 0941-0643 nnns volume:34 year:2021 number:1 day:07 month:08 pages:319-331 https://doi.org/10.1007/s00521-021-06361-4 lizenzpflichtig Volltext GBV_USEFLAG_A SYSFLAG_A GBV_OLC SSG-OLC-MAT GBV_ILN_2018 GBV_ILN_4277 AR 34 2021 1 07 08 319-331 |
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10.1007/s00521-021-06361-4 doi (DE-627)OLC2077769564 (DE-He213)s00521-021-06361-4-p DE-627 ger DE-627 rakwb eng 004 VZ Li, Mian verfasserin aut Memristor-based circuit implementation of Competitive Neural Network based on online unsupervised Hebbian learning rule for pattern recognition 2021 Text txt rdacontent ohne Hilfsmittel zu benutzen n rdamedia Band nc rdacarrier © The Author(s), under exclusive licence to Springer-Verlag London Ltd., part of Springer Nature 2021 Abstract In this paper, a Competitive Neural Network circuit based on voltage-controlled memristors is proposed, of which the synapse structure is one memristor (1M). The designed circuit consists of the forward calculation part and the weight updating part. The forward calculation part is designed according to the winner-take-all mechanism, in which the m-LIF model and PMOS transistors with switching characteristics are combined to achieve the lateral inhibition. The weight updating part is designed based on the Hebbian learning rule. By using the voltage controlled switches, only the synaptic memristors connected to the winner output neuron obtained from the forward calculation part are adjusted. The whole circuit does not require the participation of CPU, FPGA or other microcontrollers, providing the possibility to realize computing-in-memory and parallel computing. We perform simulation experiments of unsupervised online learning of 5*3 pixels patterns and 28*28 pixels patterns based on the designed circuit in PSPICE. The changing trend of the network weights during the training phase and the high recognition accuracy in the recognition phase verify the network can effectively learn and recognize different patterns. Memristive circuit Competitive Neural Network Unsupervised learning Winner-take-all Pattern recognition Hong, Qinghui aut Wang, Xiaoping (orcid)0000-0002-4909-8286 aut Enthalten in Neural computing & applications Springer London, 1993 34(2021), 1 vom: 07. Aug., Seite 319-331 (DE-627)165669608 (DE-600)1136944-9 (DE-576)032873050 0941-0643 nnns volume:34 year:2021 number:1 day:07 month:08 pages:319-331 https://doi.org/10.1007/s00521-021-06361-4 lizenzpflichtig Volltext GBV_USEFLAG_A SYSFLAG_A GBV_OLC SSG-OLC-MAT GBV_ILN_2018 GBV_ILN_4277 AR 34 2021 1 07 08 319-331 |
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10.1007/s00521-021-06361-4 doi (DE-627)OLC2077769564 (DE-He213)s00521-021-06361-4-p DE-627 ger DE-627 rakwb eng 004 VZ Li, Mian verfasserin aut Memristor-based circuit implementation of Competitive Neural Network based on online unsupervised Hebbian learning rule for pattern recognition 2021 Text txt rdacontent ohne Hilfsmittel zu benutzen n rdamedia Band nc rdacarrier © The Author(s), under exclusive licence to Springer-Verlag London Ltd., part of Springer Nature 2021 Abstract In this paper, a Competitive Neural Network circuit based on voltage-controlled memristors is proposed, of which the synapse structure is one memristor (1M). The designed circuit consists of the forward calculation part and the weight updating part. The forward calculation part is designed according to the winner-take-all mechanism, in which the m-LIF model and PMOS transistors with switching characteristics are combined to achieve the lateral inhibition. The weight updating part is designed based on the Hebbian learning rule. By using the voltage controlled switches, only the synaptic memristors connected to the winner output neuron obtained from the forward calculation part are adjusted. The whole circuit does not require the participation of CPU, FPGA or other microcontrollers, providing the possibility to realize computing-in-memory and parallel computing. We perform simulation experiments of unsupervised online learning of 5*3 pixels patterns and 28*28 pixels patterns based on the designed circuit in PSPICE. The changing trend of the network weights during the training phase and the high recognition accuracy in the recognition phase verify the network can effectively learn and recognize different patterns. Memristive circuit Competitive Neural Network Unsupervised learning Winner-take-all Pattern recognition Hong, Qinghui aut Wang, Xiaoping (orcid)0000-0002-4909-8286 aut Enthalten in Neural computing & applications Springer London, 1993 34(2021), 1 vom: 07. Aug., Seite 319-331 (DE-627)165669608 (DE-600)1136944-9 (DE-576)032873050 0941-0643 nnns volume:34 year:2021 number:1 day:07 month:08 pages:319-331 https://doi.org/10.1007/s00521-021-06361-4 lizenzpflichtig Volltext GBV_USEFLAG_A SYSFLAG_A GBV_OLC SSG-OLC-MAT GBV_ILN_2018 GBV_ILN_4277 AR 34 2021 1 07 08 319-331 |
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10.1007/s00521-021-06361-4 doi (DE-627)OLC2077769564 (DE-He213)s00521-021-06361-4-p DE-627 ger DE-627 rakwb eng 004 VZ Li, Mian verfasserin aut Memristor-based circuit implementation of Competitive Neural Network based on online unsupervised Hebbian learning rule for pattern recognition 2021 Text txt rdacontent ohne Hilfsmittel zu benutzen n rdamedia Band nc rdacarrier © The Author(s), under exclusive licence to Springer-Verlag London Ltd., part of Springer Nature 2021 Abstract In this paper, a Competitive Neural Network circuit based on voltage-controlled memristors is proposed, of which the synapse structure is one memristor (1M). The designed circuit consists of the forward calculation part and the weight updating part. The forward calculation part is designed according to the winner-take-all mechanism, in which the m-LIF model and PMOS transistors with switching characteristics are combined to achieve the lateral inhibition. The weight updating part is designed based on the Hebbian learning rule. By using the voltage controlled switches, only the synaptic memristors connected to the winner output neuron obtained from the forward calculation part are adjusted. The whole circuit does not require the participation of CPU, FPGA or other microcontrollers, providing the possibility to realize computing-in-memory and parallel computing. We perform simulation experiments of unsupervised online learning of 5*3 pixels patterns and 28*28 pixels patterns based on the designed circuit in PSPICE. The changing trend of the network weights during the training phase and the high recognition accuracy in the recognition phase verify the network can effectively learn and recognize different patterns. Memristive circuit Competitive Neural Network Unsupervised learning Winner-take-all Pattern recognition Hong, Qinghui aut Wang, Xiaoping (orcid)0000-0002-4909-8286 aut Enthalten in Neural computing & applications Springer London, 1993 34(2021), 1 vom: 07. Aug., Seite 319-331 (DE-627)165669608 (DE-600)1136944-9 (DE-576)032873050 0941-0643 nnns volume:34 year:2021 number:1 day:07 month:08 pages:319-331 https://doi.org/10.1007/s00521-021-06361-4 lizenzpflichtig Volltext GBV_USEFLAG_A SYSFLAG_A GBV_OLC SSG-OLC-MAT GBV_ILN_2018 GBV_ILN_4277 AR 34 2021 1 07 08 319-331 |
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abstract |
Abstract In this paper, a Competitive Neural Network circuit based on voltage-controlled memristors is proposed, of which the synapse structure is one memristor (1M). The designed circuit consists of the forward calculation part and the weight updating part. The forward calculation part is designed according to the winner-take-all mechanism, in which the m-LIF model and PMOS transistors with switching characteristics are combined to achieve the lateral inhibition. The weight updating part is designed based on the Hebbian learning rule. By using the voltage controlled switches, only the synaptic memristors connected to the winner output neuron obtained from the forward calculation part are adjusted. The whole circuit does not require the participation of CPU, FPGA or other microcontrollers, providing the possibility to realize computing-in-memory and parallel computing. We perform simulation experiments of unsupervised online learning of 5*3 pixels patterns and 28*28 pixels patterns based on the designed circuit in PSPICE. The changing trend of the network weights during the training phase and the high recognition accuracy in the recognition phase verify the network can effectively learn and recognize different patterns. © The Author(s), under exclusive licence to Springer-Verlag London Ltd., part of Springer Nature 2021 |
abstractGer |
Abstract In this paper, a Competitive Neural Network circuit based on voltage-controlled memristors is proposed, of which the synapse structure is one memristor (1M). The designed circuit consists of the forward calculation part and the weight updating part. The forward calculation part is designed according to the winner-take-all mechanism, in which the m-LIF model and PMOS transistors with switching characteristics are combined to achieve the lateral inhibition. The weight updating part is designed based on the Hebbian learning rule. By using the voltage controlled switches, only the synaptic memristors connected to the winner output neuron obtained from the forward calculation part are adjusted. The whole circuit does not require the participation of CPU, FPGA or other microcontrollers, providing the possibility to realize computing-in-memory and parallel computing. We perform simulation experiments of unsupervised online learning of 5*3 pixels patterns and 28*28 pixels patterns based on the designed circuit in PSPICE. The changing trend of the network weights during the training phase and the high recognition accuracy in the recognition phase verify the network can effectively learn and recognize different patterns. © The Author(s), under exclusive licence to Springer-Verlag London Ltd., part of Springer Nature 2021 |
abstract_unstemmed |
Abstract In this paper, a Competitive Neural Network circuit based on voltage-controlled memristors is proposed, of which the synapse structure is one memristor (1M). The designed circuit consists of the forward calculation part and the weight updating part. The forward calculation part is designed according to the winner-take-all mechanism, in which the m-LIF model and PMOS transistors with switching characteristics are combined to achieve the lateral inhibition. The weight updating part is designed based on the Hebbian learning rule. By using the voltage controlled switches, only the synaptic memristors connected to the winner output neuron obtained from the forward calculation part are adjusted. The whole circuit does not require the participation of CPU, FPGA or other microcontrollers, providing the possibility to realize computing-in-memory and parallel computing. We perform simulation experiments of unsupervised online learning of 5*3 pixels patterns and 28*28 pixels patterns based on the designed circuit in PSPICE. The changing trend of the network weights during the training phase and the high recognition accuracy in the recognition phase verify the network can effectively learn and recognize different patterns. © The Author(s), under exclusive licence to Springer-Verlag London Ltd., part of Springer Nature 2021 |
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title_short |
Memristor-based circuit implementation of Competitive Neural Network based on online unsupervised Hebbian learning rule for pattern recognition |
url |
https://doi.org/10.1007/s00521-021-06361-4 |
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Hong, Qinghui Wang, Xiaoping |
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up_date |
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