High-Frequency Capacitorless Fractional-Order CPE and FI Emulator
Abstract A fractional-order capacitor and inductor emulator, implemented using MOS transistors, instead of passive capacitors, is introduced in this paper. This is achieved using current mirrors as active elements, without passive resistors, and therefore reducing the circuit complexity and resultin...
Ausführliche Beschreibung
Autor*in: |
Bertsias, Panagiotis [verfasserIn] |
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Format: |
E-Artikel |
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Sprache: |
Englisch |
Erschienen: |
2017 |
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Schlagwörter: |
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Anmerkung: |
© Springer Science+Business Media, LLC 2017 |
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Übergeordnetes Werk: |
Enthalten in: Circuits, systems and signal processing - Boston, Mass. : Birkhäuser, 1982, 37(2017), 7 vom: 31. Okt., Seite 2694-2713 |
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Übergeordnetes Werk: |
volume:37 ; year:2017 ; number:7 ; day:31 ; month:10 ; pages:2694-2713 |
Links: |
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DOI / URN: |
10.1007/s00034-017-0697-0 |
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Katalog-ID: |
SPR000576409 |
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245 | 1 | 0 | |a High-Frequency Capacitorless Fractional-Order CPE and FI Emulator |
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520 | |a Abstract A fractional-order capacitor and inductor emulator, implemented using MOS transistors, instead of passive capacitors, is introduced in this paper. This is achieved using current mirrors as active elements, without passive resistors, and therefore reducing the circuit complexity and resulting in both a resistorless and capacitorless topology. The emulator has been designed by combining fractional-order differentiator or integrator topologies with a voltage-to-current converter. An important benefit from the design flexibility point of view is that the same topology could be used for emulating a fractional-order capacitor or inductor through an appropriate selection of the time constants and gain factors. Considering that the MOS transistors operate in the strong inversion region, it is feasible for this emulator to operate at high frequencies. The evaluation of the proposed topology has been performed using Cadence IC design suite and the Design Kit provided by the Austrian Micro Systems 0.35 %$\mu \hbox {m}%$ CMOS process. | ||
650 | 4 | |a Fractional-order circuits |7 (dpeaa)DE-He213 | |
650 | 4 | |a Fractional-order capacitor |7 (dpeaa)DE-He213 | |
650 | 4 | |a Constant phase element |7 (dpeaa)DE-He213 | |
650 | 4 | |a Fractional-order inductor |7 (dpeaa)DE-He213 | |
700 | 1 | |a Psychalinos, Costas |0 (orcid)0000-0002-0817-7228 |4 aut | |
700 | 1 | |a Radwan, Ahmed G. |0 (orcid)0000-0002-6119-8482 |4 aut | |
700 | 1 | |a Elwakil, Ahmed S. |0 (orcid)0000-0002-3972-5434 |4 aut | |
773 | 0 | 8 | |i Enthalten in |t Circuits, systems and signal processing |d Boston, Mass. : Birkhäuser, 1982 |g 37(2017), 7 vom: 31. Okt., Seite 2694-2713 |w (DE-627)351975470 |w (DE-600)2085136-4 |x 1531-5878 |7 nnns |
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912 | |a GBV_SPRINGER | ||
912 | |a GBV_ILN_11 | ||
912 | |a GBV_ILN_20 | ||
912 | |a GBV_ILN_22 | ||
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912 | |a GBV_ILN_90 | ||
912 | |a GBV_ILN_95 | ||
912 | |a GBV_ILN_100 | ||
912 | |a GBV_ILN_105 | ||
912 | |a GBV_ILN_110 | ||
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912 | |a GBV_ILN_150 | ||
912 | |a GBV_ILN_151 | ||
912 | |a GBV_ILN_152 | ||
912 | |a GBV_ILN_161 | ||
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912 | |a GBV_ILN_2020 | ||
912 | |a GBV_ILN_2021 | ||
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912 | |a GBV_ILN_2031 | ||
912 | |a GBV_ILN_2034 | ||
912 | |a GBV_ILN_2037 | ||
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912 | |a GBV_ILN_2044 | ||
912 | |a GBV_ILN_2048 | ||
912 | |a GBV_ILN_2049 | ||
912 | |a GBV_ILN_2050 | ||
912 | |a GBV_ILN_2055 | ||
912 | |a GBV_ILN_2057 | ||
912 | |a GBV_ILN_2059 | ||
912 | |a GBV_ILN_2061 | ||
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912 | |a GBV_ILN_2070 | ||
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912 | |a GBV_ILN_2113 | ||
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912 | |a GBV_ILN_2122 | ||
912 | |a GBV_ILN_2129 | ||
912 | |a GBV_ILN_2143 | ||
912 | |a GBV_ILN_2144 | ||
912 | |a GBV_ILN_2147 | ||
912 | |a GBV_ILN_2148 | ||
912 | |a GBV_ILN_2152 | ||
912 | |a GBV_ILN_2153 | ||
912 | |a GBV_ILN_2188 | ||
912 | |a GBV_ILN_2190 | ||
912 | |a GBV_ILN_2232 | ||
912 | |a GBV_ILN_2336 | ||
912 | |a GBV_ILN_2446 | ||
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912 | |a GBV_ILN_2472 | ||
912 | |a GBV_ILN_2507 | ||
912 | |a GBV_ILN_2522 | ||
912 | |a GBV_ILN_2548 | ||
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912 | |a GBV_ILN_4035 | ||
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10.1007/s00034-017-0697-0 doi (DE-627)SPR000576409 (SPR)s00034-017-0697-0-e DE-627 ger DE-627 rakwb eng Bertsias, Panagiotis verfasserin (orcid)0000-0002-2669-5555 aut High-Frequency Capacitorless Fractional-Order CPE and FI Emulator 2017 Text txt rdacontent Computermedien c rdamedia Online-Ressource cr rdacarrier © Springer Science+Business Media, LLC 2017 Abstract A fractional-order capacitor and inductor emulator, implemented using MOS transistors, instead of passive capacitors, is introduced in this paper. This is achieved using current mirrors as active elements, without passive resistors, and therefore reducing the circuit complexity and resulting in both a resistorless and capacitorless topology. The emulator has been designed by combining fractional-order differentiator or integrator topologies with a voltage-to-current converter. An important benefit from the design flexibility point of view is that the same topology could be used for emulating a fractional-order capacitor or inductor through an appropriate selection of the time constants and gain factors. Considering that the MOS transistors operate in the strong inversion region, it is feasible for this emulator to operate at high frequencies. The evaluation of the proposed topology has been performed using Cadence IC design suite and the Design Kit provided by the Austrian Micro Systems 0.35 %$\mu \hbox {m}%$ CMOS process. Fractional-order circuits (dpeaa)DE-He213 Fractional-order capacitor (dpeaa)DE-He213 Constant phase element (dpeaa)DE-He213 Fractional-order inductor (dpeaa)DE-He213 Psychalinos, Costas (orcid)0000-0002-0817-7228 aut Radwan, Ahmed G. (orcid)0000-0002-6119-8482 aut Elwakil, Ahmed S. (orcid)0000-0002-3972-5434 aut Enthalten in Circuits, systems and signal processing Boston, Mass. : Birkhäuser, 1982 37(2017), 7 vom: 31. Okt., Seite 2694-2713 (DE-627)351975470 (DE-600)2085136-4 1531-5878 nnns volume:37 year:2017 number:7 day:31 month:10 pages:2694-2713 https://dx.doi.org/10.1007/s00034-017-0697-0 lizenzpflichtig Volltext GBV_USEFLAG_A SYSFLAG_A GBV_SPRINGER GBV_ILN_11 GBV_ILN_20 GBV_ILN_22 GBV_ILN_23 GBV_ILN_24 GBV_ILN_31 GBV_ILN_32 GBV_ILN_39 GBV_ILN_40 GBV_ILN_60 GBV_ILN_62 GBV_ILN_63 GBV_ILN_69 GBV_ILN_70 GBV_ILN_73 GBV_ILN_74 GBV_ILN_90 GBV_ILN_95 GBV_ILN_100 GBV_ILN_105 GBV_ILN_110 GBV_ILN_120 GBV_ILN_138 GBV_ILN_150 GBV_ILN_151 GBV_ILN_152 GBV_ILN_161 GBV_ILN_170 GBV_ILN_171 GBV_ILN_187 GBV_ILN_213 GBV_ILN_224 GBV_ILN_230 GBV_ILN_250 GBV_ILN_267 GBV_ILN_281 GBV_ILN_285 GBV_ILN_293 GBV_ILN_370 GBV_ILN_602 GBV_ILN_636 GBV_ILN_702 GBV_ILN_2001 GBV_ILN_2003 GBV_ILN_2004 GBV_ILN_2005 GBV_ILN_2006 GBV_ILN_2007 GBV_ILN_2008 GBV_ILN_2009 GBV_ILN_2010 GBV_ILN_2011 GBV_ILN_2014 GBV_ILN_2015 GBV_ILN_2020 GBV_ILN_2021 GBV_ILN_2025 GBV_ILN_2026 GBV_ILN_2027 GBV_ILN_2031 GBV_ILN_2034 GBV_ILN_2037 GBV_ILN_2038 GBV_ILN_2039 GBV_ILN_2044 GBV_ILN_2048 GBV_ILN_2049 GBV_ILN_2050 GBV_ILN_2055 GBV_ILN_2057 GBV_ILN_2059 GBV_ILN_2061 GBV_ILN_2064 GBV_ILN_2065 GBV_ILN_2068 GBV_ILN_2070 GBV_ILN_2086 GBV_ILN_2088 GBV_ILN_2093 GBV_ILN_2106 GBV_ILN_2107 GBV_ILN_2108 GBV_ILN_2110 GBV_ILN_2111 GBV_ILN_2112 GBV_ILN_2113 GBV_ILN_2116 GBV_ILN_2118 GBV_ILN_2119 GBV_ILN_2122 GBV_ILN_2129 GBV_ILN_2143 GBV_ILN_2144 GBV_ILN_2147 GBV_ILN_2148 GBV_ILN_2152 GBV_ILN_2153 GBV_ILN_2188 GBV_ILN_2190 GBV_ILN_2232 GBV_ILN_2336 GBV_ILN_2446 GBV_ILN_2470 GBV_ILN_2472 GBV_ILN_2507 GBV_ILN_2522 GBV_ILN_2548 GBV_ILN_4012 GBV_ILN_4035 GBV_ILN_4037 GBV_ILN_4046 GBV_ILN_4112 GBV_ILN_4125 GBV_ILN_4126 GBV_ILN_4242 GBV_ILN_4246 GBV_ILN_4249 GBV_ILN_4251 GBV_ILN_4305 GBV_ILN_4306 GBV_ILN_4307 GBV_ILN_4313 GBV_ILN_4322 GBV_ILN_4323 GBV_ILN_4324 GBV_ILN_4325 GBV_ILN_4326 GBV_ILN_4333 GBV_ILN_4334 GBV_ILN_4335 GBV_ILN_4336 GBV_ILN_4338 GBV_ILN_4393 GBV_ILN_4700 AR 37 2017 7 31 10 2694-2713 |
spelling |
10.1007/s00034-017-0697-0 doi (DE-627)SPR000576409 (SPR)s00034-017-0697-0-e DE-627 ger DE-627 rakwb eng Bertsias, Panagiotis verfasserin (orcid)0000-0002-2669-5555 aut High-Frequency Capacitorless Fractional-Order CPE and FI Emulator 2017 Text txt rdacontent Computermedien c rdamedia Online-Ressource cr rdacarrier © Springer Science+Business Media, LLC 2017 Abstract A fractional-order capacitor and inductor emulator, implemented using MOS transistors, instead of passive capacitors, is introduced in this paper. This is achieved using current mirrors as active elements, without passive resistors, and therefore reducing the circuit complexity and resulting in both a resistorless and capacitorless topology. The emulator has been designed by combining fractional-order differentiator or integrator topologies with a voltage-to-current converter. An important benefit from the design flexibility point of view is that the same topology could be used for emulating a fractional-order capacitor or inductor through an appropriate selection of the time constants and gain factors. Considering that the MOS transistors operate in the strong inversion region, it is feasible for this emulator to operate at high frequencies. The evaluation of the proposed topology has been performed using Cadence IC design suite and the Design Kit provided by the Austrian Micro Systems 0.35 %$\mu \hbox {m}%$ CMOS process. Fractional-order circuits (dpeaa)DE-He213 Fractional-order capacitor (dpeaa)DE-He213 Constant phase element (dpeaa)DE-He213 Fractional-order inductor (dpeaa)DE-He213 Psychalinos, Costas (orcid)0000-0002-0817-7228 aut Radwan, Ahmed G. (orcid)0000-0002-6119-8482 aut Elwakil, Ahmed S. (orcid)0000-0002-3972-5434 aut Enthalten in Circuits, systems and signal processing Boston, Mass. : Birkhäuser, 1982 37(2017), 7 vom: 31. Okt., Seite 2694-2713 (DE-627)351975470 (DE-600)2085136-4 1531-5878 nnns volume:37 year:2017 number:7 day:31 month:10 pages:2694-2713 https://dx.doi.org/10.1007/s00034-017-0697-0 lizenzpflichtig Volltext GBV_USEFLAG_A SYSFLAG_A GBV_SPRINGER GBV_ILN_11 GBV_ILN_20 GBV_ILN_22 GBV_ILN_23 GBV_ILN_24 GBV_ILN_31 GBV_ILN_32 GBV_ILN_39 GBV_ILN_40 GBV_ILN_60 GBV_ILN_62 GBV_ILN_63 GBV_ILN_69 GBV_ILN_70 GBV_ILN_73 GBV_ILN_74 GBV_ILN_90 GBV_ILN_95 GBV_ILN_100 GBV_ILN_105 GBV_ILN_110 GBV_ILN_120 GBV_ILN_138 GBV_ILN_150 GBV_ILN_151 GBV_ILN_152 GBV_ILN_161 GBV_ILN_170 GBV_ILN_171 GBV_ILN_187 GBV_ILN_213 GBV_ILN_224 GBV_ILN_230 GBV_ILN_250 GBV_ILN_267 GBV_ILN_281 GBV_ILN_285 GBV_ILN_293 GBV_ILN_370 GBV_ILN_602 GBV_ILN_636 GBV_ILN_702 GBV_ILN_2001 GBV_ILN_2003 GBV_ILN_2004 GBV_ILN_2005 GBV_ILN_2006 GBV_ILN_2007 GBV_ILN_2008 GBV_ILN_2009 GBV_ILN_2010 GBV_ILN_2011 GBV_ILN_2014 GBV_ILN_2015 GBV_ILN_2020 GBV_ILN_2021 GBV_ILN_2025 GBV_ILN_2026 GBV_ILN_2027 GBV_ILN_2031 GBV_ILN_2034 GBV_ILN_2037 GBV_ILN_2038 GBV_ILN_2039 GBV_ILN_2044 GBV_ILN_2048 GBV_ILN_2049 GBV_ILN_2050 GBV_ILN_2055 GBV_ILN_2057 GBV_ILN_2059 GBV_ILN_2061 GBV_ILN_2064 GBV_ILN_2065 GBV_ILN_2068 GBV_ILN_2070 GBV_ILN_2086 GBV_ILN_2088 GBV_ILN_2093 GBV_ILN_2106 GBV_ILN_2107 GBV_ILN_2108 GBV_ILN_2110 GBV_ILN_2111 GBV_ILN_2112 GBV_ILN_2113 GBV_ILN_2116 GBV_ILN_2118 GBV_ILN_2119 GBV_ILN_2122 GBV_ILN_2129 GBV_ILN_2143 GBV_ILN_2144 GBV_ILN_2147 GBV_ILN_2148 GBV_ILN_2152 GBV_ILN_2153 GBV_ILN_2188 GBV_ILN_2190 GBV_ILN_2232 GBV_ILN_2336 GBV_ILN_2446 GBV_ILN_2470 GBV_ILN_2472 GBV_ILN_2507 GBV_ILN_2522 GBV_ILN_2548 GBV_ILN_4012 GBV_ILN_4035 GBV_ILN_4037 GBV_ILN_4046 GBV_ILN_4112 GBV_ILN_4125 GBV_ILN_4126 GBV_ILN_4242 GBV_ILN_4246 GBV_ILN_4249 GBV_ILN_4251 GBV_ILN_4305 GBV_ILN_4306 GBV_ILN_4307 GBV_ILN_4313 GBV_ILN_4322 GBV_ILN_4323 GBV_ILN_4324 GBV_ILN_4325 GBV_ILN_4326 GBV_ILN_4333 GBV_ILN_4334 GBV_ILN_4335 GBV_ILN_4336 GBV_ILN_4338 GBV_ILN_4393 GBV_ILN_4700 AR 37 2017 7 31 10 2694-2713 |
allfields_unstemmed |
10.1007/s00034-017-0697-0 doi (DE-627)SPR000576409 (SPR)s00034-017-0697-0-e DE-627 ger DE-627 rakwb eng Bertsias, Panagiotis verfasserin (orcid)0000-0002-2669-5555 aut High-Frequency Capacitorless Fractional-Order CPE and FI Emulator 2017 Text txt rdacontent Computermedien c rdamedia Online-Ressource cr rdacarrier © Springer Science+Business Media, LLC 2017 Abstract A fractional-order capacitor and inductor emulator, implemented using MOS transistors, instead of passive capacitors, is introduced in this paper. This is achieved using current mirrors as active elements, without passive resistors, and therefore reducing the circuit complexity and resulting in both a resistorless and capacitorless topology. The emulator has been designed by combining fractional-order differentiator or integrator topologies with a voltage-to-current converter. An important benefit from the design flexibility point of view is that the same topology could be used for emulating a fractional-order capacitor or inductor through an appropriate selection of the time constants and gain factors. Considering that the MOS transistors operate in the strong inversion region, it is feasible for this emulator to operate at high frequencies. The evaluation of the proposed topology has been performed using Cadence IC design suite and the Design Kit provided by the Austrian Micro Systems 0.35 %$\mu \hbox {m}%$ CMOS process. Fractional-order circuits (dpeaa)DE-He213 Fractional-order capacitor (dpeaa)DE-He213 Constant phase element (dpeaa)DE-He213 Fractional-order inductor (dpeaa)DE-He213 Psychalinos, Costas (orcid)0000-0002-0817-7228 aut Radwan, Ahmed G. (orcid)0000-0002-6119-8482 aut Elwakil, Ahmed S. (orcid)0000-0002-3972-5434 aut Enthalten in Circuits, systems and signal processing Boston, Mass. : Birkhäuser, 1982 37(2017), 7 vom: 31. Okt., Seite 2694-2713 (DE-627)351975470 (DE-600)2085136-4 1531-5878 nnns volume:37 year:2017 number:7 day:31 month:10 pages:2694-2713 https://dx.doi.org/10.1007/s00034-017-0697-0 lizenzpflichtig Volltext GBV_USEFLAG_A SYSFLAG_A GBV_SPRINGER GBV_ILN_11 GBV_ILN_20 GBV_ILN_22 GBV_ILN_23 GBV_ILN_24 GBV_ILN_31 GBV_ILN_32 GBV_ILN_39 GBV_ILN_40 GBV_ILN_60 GBV_ILN_62 GBV_ILN_63 GBV_ILN_69 GBV_ILN_70 GBV_ILN_73 GBV_ILN_74 GBV_ILN_90 GBV_ILN_95 GBV_ILN_100 GBV_ILN_105 GBV_ILN_110 GBV_ILN_120 GBV_ILN_138 GBV_ILN_150 GBV_ILN_151 GBV_ILN_152 GBV_ILN_161 GBV_ILN_170 GBV_ILN_171 GBV_ILN_187 GBV_ILN_213 GBV_ILN_224 GBV_ILN_230 GBV_ILN_250 GBV_ILN_267 GBV_ILN_281 GBV_ILN_285 GBV_ILN_293 GBV_ILN_370 GBV_ILN_602 GBV_ILN_636 GBV_ILN_702 GBV_ILN_2001 GBV_ILN_2003 GBV_ILN_2004 GBV_ILN_2005 GBV_ILN_2006 GBV_ILN_2007 GBV_ILN_2008 GBV_ILN_2009 GBV_ILN_2010 GBV_ILN_2011 GBV_ILN_2014 GBV_ILN_2015 GBV_ILN_2020 GBV_ILN_2021 GBV_ILN_2025 GBV_ILN_2026 GBV_ILN_2027 GBV_ILN_2031 GBV_ILN_2034 GBV_ILN_2037 GBV_ILN_2038 GBV_ILN_2039 GBV_ILN_2044 GBV_ILN_2048 GBV_ILN_2049 GBV_ILN_2050 GBV_ILN_2055 GBV_ILN_2057 GBV_ILN_2059 GBV_ILN_2061 GBV_ILN_2064 GBV_ILN_2065 GBV_ILN_2068 GBV_ILN_2070 GBV_ILN_2086 GBV_ILN_2088 GBV_ILN_2093 GBV_ILN_2106 GBV_ILN_2107 GBV_ILN_2108 GBV_ILN_2110 GBV_ILN_2111 GBV_ILN_2112 GBV_ILN_2113 GBV_ILN_2116 GBV_ILN_2118 GBV_ILN_2119 GBV_ILN_2122 GBV_ILN_2129 GBV_ILN_2143 GBV_ILN_2144 GBV_ILN_2147 GBV_ILN_2148 GBV_ILN_2152 GBV_ILN_2153 GBV_ILN_2188 GBV_ILN_2190 GBV_ILN_2232 GBV_ILN_2336 GBV_ILN_2446 GBV_ILN_2470 GBV_ILN_2472 GBV_ILN_2507 GBV_ILN_2522 GBV_ILN_2548 GBV_ILN_4012 GBV_ILN_4035 GBV_ILN_4037 GBV_ILN_4046 GBV_ILN_4112 GBV_ILN_4125 GBV_ILN_4126 GBV_ILN_4242 GBV_ILN_4246 GBV_ILN_4249 GBV_ILN_4251 GBV_ILN_4305 GBV_ILN_4306 GBV_ILN_4307 GBV_ILN_4313 GBV_ILN_4322 GBV_ILN_4323 GBV_ILN_4324 GBV_ILN_4325 GBV_ILN_4326 GBV_ILN_4333 GBV_ILN_4334 GBV_ILN_4335 GBV_ILN_4336 GBV_ILN_4338 GBV_ILN_4393 GBV_ILN_4700 AR 37 2017 7 31 10 2694-2713 |
allfieldsGer |
10.1007/s00034-017-0697-0 doi (DE-627)SPR000576409 (SPR)s00034-017-0697-0-e DE-627 ger DE-627 rakwb eng Bertsias, Panagiotis verfasserin (orcid)0000-0002-2669-5555 aut High-Frequency Capacitorless Fractional-Order CPE and FI Emulator 2017 Text txt rdacontent Computermedien c rdamedia Online-Ressource cr rdacarrier © Springer Science+Business Media, LLC 2017 Abstract A fractional-order capacitor and inductor emulator, implemented using MOS transistors, instead of passive capacitors, is introduced in this paper. This is achieved using current mirrors as active elements, without passive resistors, and therefore reducing the circuit complexity and resulting in both a resistorless and capacitorless topology. The emulator has been designed by combining fractional-order differentiator or integrator topologies with a voltage-to-current converter. An important benefit from the design flexibility point of view is that the same topology could be used for emulating a fractional-order capacitor or inductor through an appropriate selection of the time constants and gain factors. Considering that the MOS transistors operate in the strong inversion region, it is feasible for this emulator to operate at high frequencies. The evaluation of the proposed topology has been performed using Cadence IC design suite and the Design Kit provided by the Austrian Micro Systems 0.35 %$\mu \hbox {m}%$ CMOS process. Fractional-order circuits (dpeaa)DE-He213 Fractional-order capacitor (dpeaa)DE-He213 Constant phase element (dpeaa)DE-He213 Fractional-order inductor (dpeaa)DE-He213 Psychalinos, Costas (orcid)0000-0002-0817-7228 aut Radwan, Ahmed G. (orcid)0000-0002-6119-8482 aut Elwakil, Ahmed S. (orcid)0000-0002-3972-5434 aut Enthalten in Circuits, systems and signal processing Boston, Mass. : Birkhäuser, 1982 37(2017), 7 vom: 31. Okt., Seite 2694-2713 (DE-627)351975470 (DE-600)2085136-4 1531-5878 nnns volume:37 year:2017 number:7 day:31 month:10 pages:2694-2713 https://dx.doi.org/10.1007/s00034-017-0697-0 lizenzpflichtig Volltext GBV_USEFLAG_A SYSFLAG_A GBV_SPRINGER GBV_ILN_11 GBV_ILN_20 GBV_ILN_22 GBV_ILN_23 GBV_ILN_24 GBV_ILN_31 GBV_ILN_32 GBV_ILN_39 GBV_ILN_40 GBV_ILN_60 GBV_ILN_62 GBV_ILN_63 GBV_ILN_69 GBV_ILN_70 GBV_ILN_73 GBV_ILN_74 GBV_ILN_90 GBV_ILN_95 GBV_ILN_100 GBV_ILN_105 GBV_ILN_110 GBV_ILN_120 GBV_ILN_138 GBV_ILN_150 GBV_ILN_151 GBV_ILN_152 GBV_ILN_161 GBV_ILN_170 GBV_ILN_171 GBV_ILN_187 GBV_ILN_213 GBV_ILN_224 GBV_ILN_230 GBV_ILN_250 GBV_ILN_267 GBV_ILN_281 GBV_ILN_285 GBV_ILN_293 GBV_ILN_370 GBV_ILN_602 GBV_ILN_636 GBV_ILN_702 GBV_ILN_2001 GBV_ILN_2003 GBV_ILN_2004 GBV_ILN_2005 GBV_ILN_2006 GBV_ILN_2007 GBV_ILN_2008 GBV_ILN_2009 GBV_ILN_2010 GBV_ILN_2011 GBV_ILN_2014 GBV_ILN_2015 GBV_ILN_2020 GBV_ILN_2021 GBV_ILN_2025 GBV_ILN_2026 GBV_ILN_2027 GBV_ILN_2031 GBV_ILN_2034 GBV_ILN_2037 GBV_ILN_2038 GBV_ILN_2039 GBV_ILN_2044 GBV_ILN_2048 GBV_ILN_2049 GBV_ILN_2050 GBV_ILN_2055 GBV_ILN_2057 GBV_ILN_2059 GBV_ILN_2061 GBV_ILN_2064 GBV_ILN_2065 GBV_ILN_2068 GBV_ILN_2070 GBV_ILN_2086 GBV_ILN_2088 GBV_ILN_2093 GBV_ILN_2106 GBV_ILN_2107 GBV_ILN_2108 GBV_ILN_2110 GBV_ILN_2111 GBV_ILN_2112 GBV_ILN_2113 GBV_ILN_2116 GBV_ILN_2118 GBV_ILN_2119 GBV_ILN_2122 GBV_ILN_2129 GBV_ILN_2143 GBV_ILN_2144 GBV_ILN_2147 GBV_ILN_2148 GBV_ILN_2152 GBV_ILN_2153 GBV_ILN_2188 GBV_ILN_2190 GBV_ILN_2232 GBV_ILN_2336 GBV_ILN_2446 GBV_ILN_2470 GBV_ILN_2472 GBV_ILN_2507 GBV_ILN_2522 GBV_ILN_2548 GBV_ILN_4012 GBV_ILN_4035 GBV_ILN_4037 GBV_ILN_4046 GBV_ILN_4112 GBV_ILN_4125 GBV_ILN_4126 GBV_ILN_4242 GBV_ILN_4246 GBV_ILN_4249 GBV_ILN_4251 GBV_ILN_4305 GBV_ILN_4306 GBV_ILN_4307 GBV_ILN_4313 GBV_ILN_4322 GBV_ILN_4323 GBV_ILN_4324 GBV_ILN_4325 GBV_ILN_4326 GBV_ILN_4333 GBV_ILN_4334 GBV_ILN_4335 GBV_ILN_4336 GBV_ILN_4338 GBV_ILN_4393 GBV_ILN_4700 AR 37 2017 7 31 10 2694-2713 |
allfieldsSound |
10.1007/s00034-017-0697-0 doi (DE-627)SPR000576409 (SPR)s00034-017-0697-0-e DE-627 ger DE-627 rakwb eng Bertsias, Panagiotis verfasserin (orcid)0000-0002-2669-5555 aut High-Frequency Capacitorless Fractional-Order CPE and FI Emulator 2017 Text txt rdacontent Computermedien c rdamedia Online-Ressource cr rdacarrier © Springer Science+Business Media, LLC 2017 Abstract A fractional-order capacitor and inductor emulator, implemented using MOS transistors, instead of passive capacitors, is introduced in this paper. This is achieved using current mirrors as active elements, without passive resistors, and therefore reducing the circuit complexity and resulting in both a resistorless and capacitorless topology. The emulator has been designed by combining fractional-order differentiator or integrator topologies with a voltage-to-current converter. An important benefit from the design flexibility point of view is that the same topology could be used for emulating a fractional-order capacitor or inductor through an appropriate selection of the time constants and gain factors. Considering that the MOS transistors operate in the strong inversion region, it is feasible for this emulator to operate at high frequencies. The evaluation of the proposed topology has been performed using Cadence IC design suite and the Design Kit provided by the Austrian Micro Systems 0.35 %$\mu \hbox {m}%$ CMOS process. Fractional-order circuits (dpeaa)DE-He213 Fractional-order capacitor (dpeaa)DE-He213 Constant phase element (dpeaa)DE-He213 Fractional-order inductor (dpeaa)DE-He213 Psychalinos, Costas (orcid)0000-0002-0817-7228 aut Radwan, Ahmed G. (orcid)0000-0002-6119-8482 aut Elwakil, Ahmed S. (orcid)0000-0002-3972-5434 aut Enthalten in Circuits, systems and signal processing Boston, Mass. : Birkhäuser, 1982 37(2017), 7 vom: 31. Okt., Seite 2694-2713 (DE-627)351975470 (DE-600)2085136-4 1531-5878 nnns volume:37 year:2017 number:7 day:31 month:10 pages:2694-2713 https://dx.doi.org/10.1007/s00034-017-0697-0 lizenzpflichtig Volltext GBV_USEFLAG_A SYSFLAG_A GBV_SPRINGER GBV_ILN_11 GBV_ILN_20 GBV_ILN_22 GBV_ILN_23 GBV_ILN_24 GBV_ILN_31 GBV_ILN_32 GBV_ILN_39 GBV_ILN_40 GBV_ILN_60 GBV_ILN_62 GBV_ILN_63 GBV_ILN_69 GBV_ILN_70 GBV_ILN_73 GBV_ILN_74 GBV_ILN_90 GBV_ILN_95 GBV_ILN_100 GBV_ILN_105 GBV_ILN_110 GBV_ILN_120 GBV_ILN_138 GBV_ILN_150 GBV_ILN_151 GBV_ILN_152 GBV_ILN_161 GBV_ILN_170 GBV_ILN_171 GBV_ILN_187 GBV_ILN_213 GBV_ILN_224 GBV_ILN_230 GBV_ILN_250 GBV_ILN_267 GBV_ILN_281 GBV_ILN_285 GBV_ILN_293 GBV_ILN_370 GBV_ILN_602 GBV_ILN_636 GBV_ILN_702 GBV_ILN_2001 GBV_ILN_2003 GBV_ILN_2004 GBV_ILN_2005 GBV_ILN_2006 GBV_ILN_2007 GBV_ILN_2008 GBV_ILN_2009 GBV_ILN_2010 GBV_ILN_2011 GBV_ILN_2014 GBV_ILN_2015 GBV_ILN_2020 GBV_ILN_2021 GBV_ILN_2025 GBV_ILN_2026 GBV_ILN_2027 GBV_ILN_2031 GBV_ILN_2034 GBV_ILN_2037 GBV_ILN_2038 GBV_ILN_2039 GBV_ILN_2044 GBV_ILN_2048 GBV_ILN_2049 GBV_ILN_2050 GBV_ILN_2055 GBV_ILN_2057 GBV_ILN_2059 GBV_ILN_2061 GBV_ILN_2064 GBV_ILN_2065 GBV_ILN_2068 GBV_ILN_2070 GBV_ILN_2086 GBV_ILN_2088 GBV_ILN_2093 GBV_ILN_2106 GBV_ILN_2107 GBV_ILN_2108 GBV_ILN_2110 GBV_ILN_2111 GBV_ILN_2112 GBV_ILN_2113 GBV_ILN_2116 GBV_ILN_2118 GBV_ILN_2119 GBV_ILN_2122 GBV_ILN_2129 GBV_ILN_2143 GBV_ILN_2144 GBV_ILN_2147 GBV_ILN_2148 GBV_ILN_2152 GBV_ILN_2153 GBV_ILN_2188 GBV_ILN_2190 GBV_ILN_2232 GBV_ILN_2336 GBV_ILN_2446 GBV_ILN_2470 GBV_ILN_2472 GBV_ILN_2507 GBV_ILN_2522 GBV_ILN_2548 GBV_ILN_4012 GBV_ILN_4035 GBV_ILN_4037 GBV_ILN_4046 GBV_ILN_4112 GBV_ILN_4125 GBV_ILN_4126 GBV_ILN_4242 GBV_ILN_4246 GBV_ILN_4249 GBV_ILN_4251 GBV_ILN_4305 GBV_ILN_4306 GBV_ILN_4307 GBV_ILN_4313 GBV_ILN_4322 GBV_ILN_4323 GBV_ILN_4324 GBV_ILN_4325 GBV_ILN_4326 GBV_ILN_4333 GBV_ILN_4334 GBV_ILN_4335 GBV_ILN_4336 GBV_ILN_4338 GBV_ILN_4393 GBV_ILN_4700 AR 37 2017 7 31 10 2694-2713 |
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Enthalten in Circuits, systems and signal processing 37(2017), 7 vom: 31. Okt., Seite 2694-2713 volume:37 year:2017 number:7 day:31 month:10 pages:2694-2713 |
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Bertsias, Panagiotis @@aut@@ Psychalinos, Costas @@aut@@ Radwan, Ahmed G. @@aut@@ Elwakil, Ahmed S. @@aut@@ |
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Bertsias, Panagiotis |
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Bertsias, Panagiotis misc Fractional-order circuits misc Fractional-order capacitor misc Constant phase element misc Fractional-order inductor High-Frequency Capacitorless Fractional-Order CPE and FI Emulator |
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High-Frequency Capacitorless Fractional-Order CPE and FI Emulator Fractional-order circuits (dpeaa)DE-He213 Fractional-order capacitor (dpeaa)DE-He213 Constant phase element (dpeaa)DE-He213 Fractional-order inductor (dpeaa)DE-He213 |
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High-Frequency Capacitorless Fractional-Order CPE and FI Emulator |
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High-Frequency Capacitorless Fractional-Order CPE and FI Emulator |
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Bertsias, Panagiotis Psychalinos, Costas Radwan, Ahmed G. Elwakil, Ahmed S. |
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high-frequency capacitorless fractional-order cpe and fi emulator |
title_auth |
High-Frequency Capacitorless Fractional-Order CPE and FI Emulator |
abstract |
Abstract A fractional-order capacitor and inductor emulator, implemented using MOS transistors, instead of passive capacitors, is introduced in this paper. This is achieved using current mirrors as active elements, without passive resistors, and therefore reducing the circuit complexity and resulting in both a resistorless and capacitorless topology. The emulator has been designed by combining fractional-order differentiator or integrator topologies with a voltage-to-current converter. An important benefit from the design flexibility point of view is that the same topology could be used for emulating a fractional-order capacitor or inductor through an appropriate selection of the time constants and gain factors. Considering that the MOS transistors operate in the strong inversion region, it is feasible for this emulator to operate at high frequencies. The evaluation of the proposed topology has been performed using Cadence IC design suite and the Design Kit provided by the Austrian Micro Systems 0.35 %$\mu \hbox {m}%$ CMOS process. © Springer Science+Business Media, LLC 2017 |
abstractGer |
Abstract A fractional-order capacitor and inductor emulator, implemented using MOS transistors, instead of passive capacitors, is introduced in this paper. This is achieved using current mirrors as active elements, without passive resistors, and therefore reducing the circuit complexity and resulting in both a resistorless and capacitorless topology. The emulator has been designed by combining fractional-order differentiator or integrator topologies with a voltage-to-current converter. An important benefit from the design flexibility point of view is that the same topology could be used for emulating a fractional-order capacitor or inductor through an appropriate selection of the time constants and gain factors. Considering that the MOS transistors operate in the strong inversion region, it is feasible for this emulator to operate at high frequencies. The evaluation of the proposed topology has been performed using Cadence IC design suite and the Design Kit provided by the Austrian Micro Systems 0.35 %$\mu \hbox {m}%$ CMOS process. © Springer Science+Business Media, LLC 2017 |
abstract_unstemmed |
Abstract A fractional-order capacitor and inductor emulator, implemented using MOS transistors, instead of passive capacitors, is introduced in this paper. This is achieved using current mirrors as active elements, without passive resistors, and therefore reducing the circuit complexity and resulting in both a resistorless and capacitorless topology. The emulator has been designed by combining fractional-order differentiator or integrator topologies with a voltage-to-current converter. An important benefit from the design flexibility point of view is that the same topology could be used for emulating a fractional-order capacitor or inductor through an appropriate selection of the time constants and gain factors. Considering that the MOS transistors operate in the strong inversion region, it is feasible for this emulator to operate at high frequencies. The evaluation of the proposed topology has been performed using Cadence IC design suite and the Design Kit provided by the Austrian Micro Systems 0.35 %$\mu \hbox {m}%$ CMOS process. © Springer Science+Business Media, LLC 2017 |
collection_details |
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container_issue |
7 |
title_short |
High-Frequency Capacitorless Fractional-Order CPE and FI Emulator |
url |
https://dx.doi.org/10.1007/s00034-017-0697-0 |
remote_bool |
true |
author2 |
Psychalinos, Costas Radwan, Ahmed G. Elwakil, Ahmed S. |
author2Str |
Psychalinos, Costas Radwan, Ahmed G. Elwakil, Ahmed S. |
ppnlink |
351975470 |
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c |
isOA_txt |
false |
hochschulschrift_bool |
false |
doi_str |
10.1007/s00034-017-0697-0 |
up_date |
2024-07-03T17:01:57.630Z |
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1803578106322092032 |
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|
score |
7.400091 |