One MEMS design tool with maximal six design flows
Abstract This paper presents one MEMS design tool with a total six of design flows, which makes it possible that the MEMS designers choose the most suitable design flow for their specific devices. The design tool is divided into three levels and interconnected by six interfaces. The three levels are...
Ausführliche Beschreibung
Autor*in: |
Chang, Honglong [verfasserIn] Xu, Jinghui [verfasserIn] Xie, Jianbing [verfasserIn] Zhang, Chengliang [verfasserIn] Yan, Zijian [verfasserIn] Yuan, Weizheng [verfasserIn] |
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E-Artikel |
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Sprache: |
Englisch |
Erschienen: |
2008 |
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Schlagwörter: |
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Übergeordnetes Werk: |
Enthalten in: Microsystem technologies - Berlin : Springer, 1994, 14(2008), 6 vom: 25. Jan., Seite 775-785 |
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Übergeordnetes Werk: |
volume:14 ; year:2008 ; number:6 ; day:25 ; month:01 ; pages:775-785 |
Links: |
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DOI / URN: |
10.1007/s00542-007-0546-3 |
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Katalog-ID: |
SPR006813461 |
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520 | |a Abstract This paper presents one MEMS design tool with a total six of design flows, which makes it possible that the MEMS designers choose the most suitable design flow for their specific devices. The design tool is divided into three levels and interconnected by six interfaces. The three levels are the lumped-element model based system level, finite element analysis based device level and process level, which cover nearly all modeling and simulation functions for MEMS design. The six interfaces are proposed to automatically transmit the design data between every two levels, thus the maximal six design flows could be realized. The interfaces take the netlist, solid model and layout as the data inlet and outlet for the system, device and process level respectively. The realization of these interfaces are presented and verified by design examples, which also proves that enough flexibility in the design flow can really increase the design efficiency. | ||
650 | 4 | |a Solid Model |7 (dpeaa)DE-He213 | |
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700 | 1 | |a Xu, Jinghui |e verfasserin |4 aut | |
700 | 1 | |a Xie, Jianbing |e verfasserin |4 aut | |
700 | 1 | |a Zhang, Chengliang |e verfasserin |4 aut | |
700 | 1 | |a Yan, Zijian |e verfasserin |4 aut | |
700 | 1 | |a Yuan, Weizheng |e verfasserin |4 aut | |
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10.1007/s00542-007-0546-3 doi (DE-627)SPR006813461 (SPR)s00542-007-0546-3-e DE-627 ger DE-627 rakwb eng 510 ASE 50.94 bkl Chang, Honglong verfasserin aut One MEMS design tool with maximal six design flows 2008 Text txt rdacontent Computermedien c rdamedia Online-Ressource cr rdacarrier Abstract This paper presents one MEMS design tool with a total six of design flows, which makes it possible that the MEMS designers choose the most suitable design flow for their specific devices. The design tool is divided into three levels and interconnected by six interfaces. The three levels are the lumped-element model based system level, finite element analysis based device level and process level, which cover nearly all modeling and simulation functions for MEMS design. The six interfaces are proposed to automatically transmit the design data between every two levels, thus the maximal six design flows could be realized. The interfaces take the netlist, solid model and layout as the data inlet and outlet for the system, device and process level respectively. The realization of these interfaces are presented and verified by design examples, which also proves that enough flexibility in the design flow can really increase the design efficiency. Solid Model (dpeaa)DE-He213 Model Order Reduction (dpeaa)DE-He213 Design Flow (dpeaa)DE-He213 System Level Simulation (dpeaa)DE-He213 Device Level (dpeaa)DE-He213 Xu, Jinghui verfasserin aut Xie, Jianbing verfasserin aut Zhang, Chengliang verfasserin aut Yan, Zijian verfasserin aut Yuan, Weizheng verfasserin aut Enthalten in Microsystem technologies Berlin : Springer, 1994 14(2008), 6 vom: 25. Jan., Seite 775-785 (DE-627)270128182 (DE-600)1476561-5 1432-1858 nnns volume:14 year:2008 number:6 day:25 month:01 pages:775-785 https://dx.doi.org/10.1007/s00542-007-0546-3 lizenzpflichtig Volltext GBV_USEFLAG_A SYSFLAG_A GBV_SPRINGER SSG-OPC-MAT SSG-OPC-ASE GBV_ILN_11 GBV_ILN_20 GBV_ILN_22 GBV_ILN_23 GBV_ILN_24 GBV_ILN_31 GBV_ILN_32 GBV_ILN_39 GBV_ILN_40 GBV_ILN_60 GBV_ILN_62 GBV_ILN_63 GBV_ILN_69 GBV_ILN_70 GBV_ILN_73 GBV_ILN_74 GBV_ILN_90 GBV_ILN_95 GBV_ILN_100 GBV_ILN_105 GBV_ILN_110 GBV_ILN_120 GBV_ILN_138 GBV_ILN_150 GBV_ILN_151 GBV_ILN_152 GBV_ILN_161 GBV_ILN_170 GBV_ILN_171 GBV_ILN_187 GBV_ILN_213 GBV_ILN_224 GBV_ILN_230 GBV_ILN_250 GBV_ILN_266 GBV_ILN_267 GBV_ILN_281 GBV_ILN_285 GBV_ILN_293 GBV_ILN_370 GBV_ILN_602 GBV_ILN_636 GBV_ILN_702 GBV_ILN_2001 GBV_ILN_2003 GBV_ILN_2004 GBV_ILN_2005 GBV_ILN_2006 GBV_ILN_2007 GBV_ILN_2008 GBV_ILN_2009 GBV_ILN_2010 GBV_ILN_2011 GBV_ILN_2014 GBV_ILN_2015 GBV_ILN_2020 GBV_ILN_2021 GBV_ILN_2025 GBV_ILN_2026 GBV_ILN_2027 GBV_ILN_2031 GBV_ILN_2034 GBV_ILN_2037 GBV_ILN_2038 GBV_ILN_2039 GBV_ILN_2044 GBV_ILN_2048 GBV_ILN_2049 GBV_ILN_2050 GBV_ILN_2055 GBV_ILN_2057 GBV_ILN_2059 GBV_ILN_2061 GBV_ILN_2064 GBV_ILN_2065 GBV_ILN_2068 GBV_ILN_2070 GBV_ILN_2086 GBV_ILN_2088 GBV_ILN_2093 GBV_ILN_2106 GBV_ILN_2107 GBV_ILN_2108 GBV_ILN_2110 GBV_ILN_2111 GBV_ILN_2112 GBV_ILN_2113 GBV_ILN_2116 GBV_ILN_2118 GBV_ILN_2119 GBV_ILN_2122 GBV_ILN_2129 GBV_ILN_2143 GBV_ILN_2144 GBV_ILN_2147 GBV_ILN_2148 GBV_ILN_2152 GBV_ILN_2153 GBV_ILN_2188 GBV_ILN_2190 GBV_ILN_2232 GBV_ILN_2336 GBV_ILN_2446 GBV_ILN_2470 GBV_ILN_2472 GBV_ILN_2507 GBV_ILN_2522 GBV_ILN_2548 GBV_ILN_4035 GBV_ILN_4037 GBV_ILN_4046 GBV_ILN_4112 GBV_ILN_4125 GBV_ILN_4242 GBV_ILN_4246 GBV_ILN_4249 GBV_ILN_4251 GBV_ILN_4305 GBV_ILN_4306 GBV_ILN_4307 GBV_ILN_4313 GBV_ILN_4322 GBV_ILN_4323 GBV_ILN_4324 GBV_ILN_4325 GBV_ILN_4326 GBV_ILN_4333 GBV_ILN_4334 GBV_ILN_4335 GBV_ILN_4336 GBV_ILN_4338 GBV_ILN_4393 GBV_ILN_4700 50.94 ASE AR 14 2008 6 25 01 775-785 |
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10.1007/s00542-007-0546-3 doi (DE-627)SPR006813461 (SPR)s00542-007-0546-3-e DE-627 ger DE-627 rakwb eng 510 ASE 50.94 bkl Chang, Honglong verfasserin aut One MEMS design tool with maximal six design flows 2008 Text txt rdacontent Computermedien c rdamedia Online-Ressource cr rdacarrier Abstract This paper presents one MEMS design tool with a total six of design flows, which makes it possible that the MEMS designers choose the most suitable design flow for their specific devices. The design tool is divided into three levels and interconnected by six interfaces. The three levels are the lumped-element model based system level, finite element analysis based device level and process level, which cover nearly all modeling and simulation functions for MEMS design. The six interfaces are proposed to automatically transmit the design data between every two levels, thus the maximal six design flows could be realized. The interfaces take the netlist, solid model and layout as the data inlet and outlet for the system, device and process level respectively. The realization of these interfaces are presented and verified by design examples, which also proves that enough flexibility in the design flow can really increase the design efficiency. Solid Model (dpeaa)DE-He213 Model Order Reduction (dpeaa)DE-He213 Design Flow (dpeaa)DE-He213 System Level Simulation (dpeaa)DE-He213 Device Level (dpeaa)DE-He213 Xu, Jinghui verfasserin aut Xie, Jianbing verfasserin aut Zhang, Chengliang verfasserin aut Yan, Zijian verfasserin aut Yuan, Weizheng verfasserin aut Enthalten in Microsystem technologies Berlin : Springer, 1994 14(2008), 6 vom: 25. Jan., Seite 775-785 (DE-627)270128182 (DE-600)1476561-5 1432-1858 nnns volume:14 year:2008 number:6 day:25 month:01 pages:775-785 https://dx.doi.org/10.1007/s00542-007-0546-3 lizenzpflichtig Volltext GBV_USEFLAG_A SYSFLAG_A GBV_SPRINGER SSG-OPC-MAT SSG-OPC-ASE GBV_ILN_11 GBV_ILN_20 GBV_ILN_22 GBV_ILN_23 GBV_ILN_24 GBV_ILN_31 GBV_ILN_32 GBV_ILN_39 GBV_ILN_40 GBV_ILN_60 GBV_ILN_62 GBV_ILN_63 GBV_ILN_69 GBV_ILN_70 GBV_ILN_73 GBV_ILN_74 GBV_ILN_90 GBV_ILN_95 GBV_ILN_100 GBV_ILN_105 GBV_ILN_110 GBV_ILN_120 GBV_ILN_138 GBV_ILN_150 GBV_ILN_151 GBV_ILN_152 GBV_ILN_161 GBV_ILN_170 GBV_ILN_171 GBV_ILN_187 GBV_ILN_213 GBV_ILN_224 GBV_ILN_230 GBV_ILN_250 GBV_ILN_266 GBV_ILN_267 GBV_ILN_281 GBV_ILN_285 GBV_ILN_293 GBV_ILN_370 GBV_ILN_602 GBV_ILN_636 GBV_ILN_702 GBV_ILN_2001 GBV_ILN_2003 GBV_ILN_2004 GBV_ILN_2005 GBV_ILN_2006 GBV_ILN_2007 GBV_ILN_2008 GBV_ILN_2009 GBV_ILN_2010 GBV_ILN_2011 GBV_ILN_2014 GBV_ILN_2015 GBV_ILN_2020 GBV_ILN_2021 GBV_ILN_2025 GBV_ILN_2026 GBV_ILN_2027 GBV_ILN_2031 GBV_ILN_2034 GBV_ILN_2037 GBV_ILN_2038 GBV_ILN_2039 GBV_ILN_2044 GBV_ILN_2048 GBV_ILN_2049 GBV_ILN_2050 GBV_ILN_2055 GBV_ILN_2057 GBV_ILN_2059 GBV_ILN_2061 GBV_ILN_2064 GBV_ILN_2065 GBV_ILN_2068 GBV_ILN_2070 GBV_ILN_2086 GBV_ILN_2088 GBV_ILN_2093 GBV_ILN_2106 GBV_ILN_2107 GBV_ILN_2108 GBV_ILN_2110 GBV_ILN_2111 GBV_ILN_2112 GBV_ILN_2113 GBV_ILN_2116 GBV_ILN_2118 GBV_ILN_2119 GBV_ILN_2122 GBV_ILN_2129 GBV_ILN_2143 GBV_ILN_2144 GBV_ILN_2147 GBV_ILN_2148 GBV_ILN_2152 GBV_ILN_2153 GBV_ILN_2188 GBV_ILN_2190 GBV_ILN_2232 GBV_ILN_2336 GBV_ILN_2446 GBV_ILN_2470 GBV_ILN_2472 GBV_ILN_2507 GBV_ILN_2522 GBV_ILN_2548 GBV_ILN_4035 GBV_ILN_4037 GBV_ILN_4046 GBV_ILN_4112 GBV_ILN_4125 GBV_ILN_4242 GBV_ILN_4246 GBV_ILN_4249 GBV_ILN_4251 GBV_ILN_4305 GBV_ILN_4306 GBV_ILN_4307 GBV_ILN_4313 GBV_ILN_4322 GBV_ILN_4323 GBV_ILN_4324 GBV_ILN_4325 GBV_ILN_4326 GBV_ILN_4333 GBV_ILN_4334 GBV_ILN_4335 GBV_ILN_4336 GBV_ILN_4338 GBV_ILN_4393 GBV_ILN_4700 50.94 ASE AR 14 2008 6 25 01 775-785 |
allfields_unstemmed |
10.1007/s00542-007-0546-3 doi (DE-627)SPR006813461 (SPR)s00542-007-0546-3-e DE-627 ger DE-627 rakwb eng 510 ASE 50.94 bkl Chang, Honglong verfasserin aut One MEMS design tool with maximal six design flows 2008 Text txt rdacontent Computermedien c rdamedia Online-Ressource cr rdacarrier Abstract This paper presents one MEMS design tool with a total six of design flows, which makes it possible that the MEMS designers choose the most suitable design flow for their specific devices. The design tool is divided into three levels and interconnected by six interfaces. The three levels are the lumped-element model based system level, finite element analysis based device level and process level, which cover nearly all modeling and simulation functions for MEMS design. The six interfaces are proposed to automatically transmit the design data between every two levels, thus the maximal six design flows could be realized. The interfaces take the netlist, solid model and layout as the data inlet and outlet for the system, device and process level respectively. The realization of these interfaces are presented and verified by design examples, which also proves that enough flexibility in the design flow can really increase the design efficiency. Solid Model (dpeaa)DE-He213 Model Order Reduction (dpeaa)DE-He213 Design Flow (dpeaa)DE-He213 System Level Simulation (dpeaa)DE-He213 Device Level (dpeaa)DE-He213 Xu, Jinghui verfasserin aut Xie, Jianbing verfasserin aut Zhang, Chengliang verfasserin aut Yan, Zijian verfasserin aut Yuan, Weizheng verfasserin aut Enthalten in Microsystem technologies Berlin : Springer, 1994 14(2008), 6 vom: 25. Jan., Seite 775-785 (DE-627)270128182 (DE-600)1476561-5 1432-1858 nnns volume:14 year:2008 number:6 day:25 month:01 pages:775-785 https://dx.doi.org/10.1007/s00542-007-0546-3 lizenzpflichtig Volltext GBV_USEFLAG_A SYSFLAG_A GBV_SPRINGER SSG-OPC-MAT SSG-OPC-ASE GBV_ILN_11 GBV_ILN_20 GBV_ILN_22 GBV_ILN_23 GBV_ILN_24 GBV_ILN_31 GBV_ILN_32 GBV_ILN_39 GBV_ILN_40 GBV_ILN_60 GBV_ILN_62 GBV_ILN_63 GBV_ILN_69 GBV_ILN_70 GBV_ILN_73 GBV_ILN_74 GBV_ILN_90 GBV_ILN_95 GBV_ILN_100 GBV_ILN_105 GBV_ILN_110 GBV_ILN_120 GBV_ILN_138 GBV_ILN_150 GBV_ILN_151 GBV_ILN_152 GBV_ILN_161 GBV_ILN_170 GBV_ILN_171 GBV_ILN_187 GBV_ILN_213 GBV_ILN_224 GBV_ILN_230 GBV_ILN_250 GBV_ILN_266 GBV_ILN_267 GBV_ILN_281 GBV_ILN_285 GBV_ILN_293 GBV_ILN_370 GBV_ILN_602 GBV_ILN_636 GBV_ILN_702 GBV_ILN_2001 GBV_ILN_2003 GBV_ILN_2004 GBV_ILN_2005 GBV_ILN_2006 GBV_ILN_2007 GBV_ILN_2008 GBV_ILN_2009 GBV_ILN_2010 GBV_ILN_2011 GBV_ILN_2014 GBV_ILN_2015 GBV_ILN_2020 GBV_ILN_2021 GBV_ILN_2025 GBV_ILN_2026 GBV_ILN_2027 GBV_ILN_2031 GBV_ILN_2034 GBV_ILN_2037 GBV_ILN_2038 GBV_ILN_2039 GBV_ILN_2044 GBV_ILN_2048 GBV_ILN_2049 GBV_ILN_2050 GBV_ILN_2055 GBV_ILN_2057 GBV_ILN_2059 GBV_ILN_2061 GBV_ILN_2064 GBV_ILN_2065 GBV_ILN_2068 GBV_ILN_2070 GBV_ILN_2086 GBV_ILN_2088 GBV_ILN_2093 GBV_ILN_2106 GBV_ILN_2107 GBV_ILN_2108 GBV_ILN_2110 GBV_ILN_2111 GBV_ILN_2112 GBV_ILN_2113 GBV_ILN_2116 GBV_ILN_2118 GBV_ILN_2119 GBV_ILN_2122 GBV_ILN_2129 GBV_ILN_2143 GBV_ILN_2144 GBV_ILN_2147 GBV_ILN_2148 GBV_ILN_2152 GBV_ILN_2153 GBV_ILN_2188 GBV_ILN_2190 GBV_ILN_2232 GBV_ILN_2336 GBV_ILN_2446 GBV_ILN_2470 GBV_ILN_2472 GBV_ILN_2507 GBV_ILN_2522 GBV_ILN_2548 GBV_ILN_4035 GBV_ILN_4037 GBV_ILN_4046 GBV_ILN_4112 GBV_ILN_4125 GBV_ILN_4242 GBV_ILN_4246 GBV_ILN_4249 GBV_ILN_4251 GBV_ILN_4305 GBV_ILN_4306 GBV_ILN_4307 GBV_ILN_4313 GBV_ILN_4322 GBV_ILN_4323 GBV_ILN_4324 GBV_ILN_4325 GBV_ILN_4326 GBV_ILN_4333 GBV_ILN_4334 GBV_ILN_4335 GBV_ILN_4336 GBV_ILN_4338 GBV_ILN_4393 GBV_ILN_4700 50.94 ASE AR 14 2008 6 25 01 775-785 |
allfieldsGer |
10.1007/s00542-007-0546-3 doi (DE-627)SPR006813461 (SPR)s00542-007-0546-3-e DE-627 ger DE-627 rakwb eng 510 ASE 50.94 bkl Chang, Honglong verfasserin aut One MEMS design tool with maximal six design flows 2008 Text txt rdacontent Computermedien c rdamedia Online-Ressource cr rdacarrier Abstract This paper presents one MEMS design tool with a total six of design flows, which makes it possible that the MEMS designers choose the most suitable design flow for their specific devices. The design tool is divided into three levels and interconnected by six interfaces. The three levels are the lumped-element model based system level, finite element analysis based device level and process level, which cover nearly all modeling and simulation functions for MEMS design. The six interfaces are proposed to automatically transmit the design data between every two levels, thus the maximal six design flows could be realized. The interfaces take the netlist, solid model and layout as the data inlet and outlet for the system, device and process level respectively. The realization of these interfaces are presented and verified by design examples, which also proves that enough flexibility in the design flow can really increase the design efficiency. Solid Model (dpeaa)DE-He213 Model Order Reduction (dpeaa)DE-He213 Design Flow (dpeaa)DE-He213 System Level Simulation (dpeaa)DE-He213 Device Level (dpeaa)DE-He213 Xu, Jinghui verfasserin aut Xie, Jianbing verfasserin aut Zhang, Chengliang verfasserin aut Yan, Zijian verfasserin aut Yuan, Weizheng verfasserin aut Enthalten in Microsystem technologies Berlin : Springer, 1994 14(2008), 6 vom: 25. Jan., Seite 775-785 (DE-627)270128182 (DE-600)1476561-5 1432-1858 nnns volume:14 year:2008 number:6 day:25 month:01 pages:775-785 https://dx.doi.org/10.1007/s00542-007-0546-3 lizenzpflichtig Volltext GBV_USEFLAG_A SYSFLAG_A GBV_SPRINGER SSG-OPC-MAT SSG-OPC-ASE GBV_ILN_11 GBV_ILN_20 GBV_ILN_22 GBV_ILN_23 GBV_ILN_24 GBV_ILN_31 GBV_ILN_32 GBV_ILN_39 GBV_ILN_40 GBV_ILN_60 GBV_ILN_62 GBV_ILN_63 GBV_ILN_69 GBV_ILN_70 GBV_ILN_73 GBV_ILN_74 GBV_ILN_90 GBV_ILN_95 GBV_ILN_100 GBV_ILN_105 GBV_ILN_110 GBV_ILN_120 GBV_ILN_138 GBV_ILN_150 GBV_ILN_151 GBV_ILN_152 GBV_ILN_161 GBV_ILN_170 GBV_ILN_171 GBV_ILN_187 GBV_ILN_213 GBV_ILN_224 GBV_ILN_230 GBV_ILN_250 GBV_ILN_266 GBV_ILN_267 GBV_ILN_281 GBV_ILN_285 GBV_ILN_293 GBV_ILN_370 GBV_ILN_602 GBV_ILN_636 GBV_ILN_702 GBV_ILN_2001 GBV_ILN_2003 GBV_ILN_2004 GBV_ILN_2005 GBV_ILN_2006 GBV_ILN_2007 GBV_ILN_2008 GBV_ILN_2009 GBV_ILN_2010 GBV_ILN_2011 GBV_ILN_2014 GBV_ILN_2015 GBV_ILN_2020 GBV_ILN_2021 GBV_ILN_2025 GBV_ILN_2026 GBV_ILN_2027 GBV_ILN_2031 GBV_ILN_2034 GBV_ILN_2037 GBV_ILN_2038 GBV_ILN_2039 GBV_ILN_2044 GBV_ILN_2048 GBV_ILN_2049 GBV_ILN_2050 GBV_ILN_2055 GBV_ILN_2057 GBV_ILN_2059 GBV_ILN_2061 GBV_ILN_2064 GBV_ILN_2065 GBV_ILN_2068 GBV_ILN_2070 GBV_ILN_2086 GBV_ILN_2088 GBV_ILN_2093 GBV_ILN_2106 GBV_ILN_2107 GBV_ILN_2108 GBV_ILN_2110 GBV_ILN_2111 GBV_ILN_2112 GBV_ILN_2113 GBV_ILN_2116 GBV_ILN_2118 GBV_ILN_2119 GBV_ILN_2122 GBV_ILN_2129 GBV_ILN_2143 GBV_ILN_2144 GBV_ILN_2147 GBV_ILN_2148 GBV_ILN_2152 GBV_ILN_2153 GBV_ILN_2188 GBV_ILN_2190 GBV_ILN_2232 GBV_ILN_2336 GBV_ILN_2446 GBV_ILN_2470 GBV_ILN_2472 GBV_ILN_2507 GBV_ILN_2522 GBV_ILN_2548 GBV_ILN_4035 GBV_ILN_4037 GBV_ILN_4046 GBV_ILN_4112 GBV_ILN_4125 GBV_ILN_4242 GBV_ILN_4246 GBV_ILN_4249 GBV_ILN_4251 GBV_ILN_4305 GBV_ILN_4306 GBV_ILN_4307 GBV_ILN_4313 GBV_ILN_4322 GBV_ILN_4323 GBV_ILN_4324 GBV_ILN_4325 GBV_ILN_4326 GBV_ILN_4333 GBV_ILN_4334 GBV_ILN_4335 GBV_ILN_4336 GBV_ILN_4338 GBV_ILN_4393 GBV_ILN_4700 50.94 ASE AR 14 2008 6 25 01 775-785 |
allfieldsSound |
10.1007/s00542-007-0546-3 doi (DE-627)SPR006813461 (SPR)s00542-007-0546-3-e DE-627 ger DE-627 rakwb eng 510 ASE 50.94 bkl Chang, Honglong verfasserin aut One MEMS design tool with maximal six design flows 2008 Text txt rdacontent Computermedien c rdamedia Online-Ressource cr rdacarrier Abstract This paper presents one MEMS design tool with a total six of design flows, which makes it possible that the MEMS designers choose the most suitable design flow for their specific devices. The design tool is divided into three levels and interconnected by six interfaces. The three levels are the lumped-element model based system level, finite element analysis based device level and process level, which cover nearly all modeling and simulation functions for MEMS design. The six interfaces are proposed to automatically transmit the design data between every two levels, thus the maximal six design flows could be realized. The interfaces take the netlist, solid model and layout as the data inlet and outlet for the system, device and process level respectively. The realization of these interfaces are presented and verified by design examples, which also proves that enough flexibility in the design flow can really increase the design efficiency. Solid Model (dpeaa)DE-He213 Model Order Reduction (dpeaa)DE-He213 Design Flow (dpeaa)DE-He213 System Level Simulation (dpeaa)DE-He213 Device Level (dpeaa)DE-He213 Xu, Jinghui verfasserin aut Xie, Jianbing verfasserin aut Zhang, Chengliang verfasserin aut Yan, Zijian verfasserin aut Yuan, Weizheng verfasserin aut Enthalten in Microsystem technologies Berlin : Springer, 1994 14(2008), 6 vom: 25. Jan., Seite 775-785 (DE-627)270128182 (DE-600)1476561-5 1432-1858 nnns volume:14 year:2008 number:6 day:25 month:01 pages:775-785 https://dx.doi.org/10.1007/s00542-007-0546-3 lizenzpflichtig Volltext GBV_USEFLAG_A SYSFLAG_A GBV_SPRINGER SSG-OPC-MAT SSG-OPC-ASE GBV_ILN_11 GBV_ILN_20 GBV_ILN_22 GBV_ILN_23 GBV_ILN_24 GBV_ILN_31 GBV_ILN_32 GBV_ILN_39 GBV_ILN_40 GBV_ILN_60 GBV_ILN_62 GBV_ILN_63 GBV_ILN_69 GBV_ILN_70 GBV_ILN_73 GBV_ILN_74 GBV_ILN_90 GBV_ILN_95 GBV_ILN_100 GBV_ILN_105 GBV_ILN_110 GBV_ILN_120 GBV_ILN_138 GBV_ILN_150 GBV_ILN_151 GBV_ILN_152 GBV_ILN_161 GBV_ILN_170 GBV_ILN_171 GBV_ILN_187 GBV_ILN_213 GBV_ILN_224 GBV_ILN_230 GBV_ILN_250 GBV_ILN_266 GBV_ILN_267 GBV_ILN_281 GBV_ILN_285 GBV_ILN_293 GBV_ILN_370 GBV_ILN_602 GBV_ILN_636 GBV_ILN_702 GBV_ILN_2001 GBV_ILN_2003 GBV_ILN_2004 GBV_ILN_2005 GBV_ILN_2006 GBV_ILN_2007 GBV_ILN_2008 GBV_ILN_2009 GBV_ILN_2010 GBV_ILN_2011 GBV_ILN_2014 GBV_ILN_2015 GBV_ILN_2020 GBV_ILN_2021 GBV_ILN_2025 GBV_ILN_2026 GBV_ILN_2027 GBV_ILN_2031 GBV_ILN_2034 GBV_ILN_2037 GBV_ILN_2038 GBV_ILN_2039 GBV_ILN_2044 GBV_ILN_2048 GBV_ILN_2049 GBV_ILN_2050 GBV_ILN_2055 GBV_ILN_2057 GBV_ILN_2059 GBV_ILN_2061 GBV_ILN_2064 GBV_ILN_2065 GBV_ILN_2068 GBV_ILN_2070 GBV_ILN_2086 GBV_ILN_2088 GBV_ILN_2093 GBV_ILN_2106 GBV_ILN_2107 GBV_ILN_2108 GBV_ILN_2110 GBV_ILN_2111 GBV_ILN_2112 GBV_ILN_2113 GBV_ILN_2116 GBV_ILN_2118 GBV_ILN_2119 GBV_ILN_2122 GBV_ILN_2129 GBV_ILN_2143 GBV_ILN_2144 GBV_ILN_2147 GBV_ILN_2148 GBV_ILN_2152 GBV_ILN_2153 GBV_ILN_2188 GBV_ILN_2190 GBV_ILN_2232 GBV_ILN_2336 GBV_ILN_2446 GBV_ILN_2470 GBV_ILN_2472 GBV_ILN_2507 GBV_ILN_2522 GBV_ILN_2548 GBV_ILN_4035 GBV_ILN_4037 GBV_ILN_4046 GBV_ILN_4112 GBV_ILN_4125 GBV_ILN_4242 GBV_ILN_4246 GBV_ILN_4249 GBV_ILN_4251 GBV_ILN_4305 GBV_ILN_4306 GBV_ILN_4307 GBV_ILN_4313 GBV_ILN_4322 GBV_ILN_4323 GBV_ILN_4324 GBV_ILN_4325 GBV_ILN_4326 GBV_ILN_4333 GBV_ILN_4334 GBV_ILN_4335 GBV_ILN_4336 GBV_ILN_4338 GBV_ILN_4393 GBV_ILN_4700 50.94 ASE AR 14 2008 6 25 01 775-785 |
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Enthalten in Microsystem technologies 14(2008), 6 vom: 25. Jan., Seite 775-785 volume:14 year:2008 number:6 day:25 month:01 pages:775-785 |
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Microsystem technologies |
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Chang, Honglong @@aut@@ Xu, Jinghui @@aut@@ Xie, Jianbing @@aut@@ Zhang, Chengliang @@aut@@ Yan, Zijian @@aut@@ Yuan, Weizheng @@aut@@ |
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|
author |
Chang, Honglong |
spellingShingle |
Chang, Honglong ddc 510 bkl 50.94 misc Solid Model misc Model Order Reduction misc Design Flow misc System Level Simulation misc Device Level One MEMS design tool with maximal six design flows |
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510 ASE 50.94 bkl One MEMS design tool with maximal six design flows Solid Model (dpeaa)DE-He213 Model Order Reduction (dpeaa)DE-He213 Design Flow (dpeaa)DE-He213 System Level Simulation (dpeaa)DE-He213 Device Level (dpeaa)DE-He213 |
topic |
ddc 510 bkl 50.94 misc Solid Model misc Model Order Reduction misc Design Flow misc System Level Simulation misc Device Level |
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ddc 510 bkl 50.94 misc Solid Model misc Model Order Reduction misc Design Flow misc System Level Simulation misc Device Level |
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ddc 510 bkl 50.94 misc Solid Model misc Model Order Reduction misc Design Flow misc System Level Simulation misc Device Level |
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One MEMS design tool with maximal six design flows |
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One MEMS design tool with maximal six design flows |
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Chang, Honglong |
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Microsystem technologies |
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Chang, Honglong Xu, Jinghui Xie, Jianbing Zhang, Chengliang Yan, Zijian Yuan, Weizheng |
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510 ASE 50.94 bkl |
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Chang, Honglong |
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one mems design tool with maximal six design flows |
title_auth |
One MEMS design tool with maximal six design flows |
abstract |
Abstract This paper presents one MEMS design tool with a total six of design flows, which makes it possible that the MEMS designers choose the most suitable design flow for their specific devices. The design tool is divided into three levels and interconnected by six interfaces. The three levels are the lumped-element model based system level, finite element analysis based device level and process level, which cover nearly all modeling and simulation functions for MEMS design. The six interfaces are proposed to automatically transmit the design data between every two levels, thus the maximal six design flows could be realized. The interfaces take the netlist, solid model and layout as the data inlet and outlet for the system, device and process level respectively. The realization of these interfaces are presented and verified by design examples, which also proves that enough flexibility in the design flow can really increase the design efficiency. |
abstractGer |
Abstract This paper presents one MEMS design tool with a total six of design flows, which makes it possible that the MEMS designers choose the most suitable design flow for their specific devices. The design tool is divided into three levels and interconnected by six interfaces. The three levels are the lumped-element model based system level, finite element analysis based device level and process level, which cover nearly all modeling and simulation functions for MEMS design. The six interfaces are proposed to automatically transmit the design data between every two levels, thus the maximal six design flows could be realized. The interfaces take the netlist, solid model and layout as the data inlet and outlet for the system, device and process level respectively. The realization of these interfaces are presented and verified by design examples, which also proves that enough flexibility in the design flow can really increase the design efficiency. |
abstract_unstemmed |
Abstract This paper presents one MEMS design tool with a total six of design flows, which makes it possible that the MEMS designers choose the most suitable design flow for their specific devices. The design tool is divided into three levels and interconnected by six interfaces. The three levels are the lumped-element model based system level, finite element analysis based device level and process level, which cover nearly all modeling and simulation functions for MEMS design. The six interfaces are proposed to automatically transmit the design data between every two levels, thus the maximal six design flows could be realized. The interfaces take the netlist, solid model and layout as the data inlet and outlet for the system, device and process level respectively. The realization of these interfaces are presented and verified by design examples, which also proves that enough flexibility in the design flow can really increase the design efficiency. |
collection_details |
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6 |
title_short |
One MEMS design tool with maximal six design flows |
url |
https://dx.doi.org/10.1007/s00542-007-0546-3 |
remote_bool |
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author2 |
Xu, Jinghui Xie, Jianbing Zhang, Chengliang Yan, Zijian Yuan, Weizheng |
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Xu, Jinghui Xie, Jianbing Zhang, Chengliang Yan, Zijian Yuan, Weizheng |
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270128182 |
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doi_str |
10.1007/s00542-007-0546-3 |
up_date |
2024-07-04T00:47:32.817Z |
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score |
7.401187 |