New swapping technique for background calibration of capacitor mismatch and amplifier finite DC-gain in pipeline ADCs
Abstract A novel swapping technique for stage non-linear error calibration in Pipeline ADCs (analogue-to-digital converters) is presented in this paper. The proposed algorithm obtains an estimation of the mismatch between sampling capacitors in the MDAC (multiplying digital-to-analogue converter) in...
Ausführliche Beschreibung
Autor*in: |
Ginés, Antonio J. [verfasserIn] Peralías, Eduardo J. [verfasserIn] Rueda, Adoración [verfasserIn] |
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Format: |
E-Artikel |
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Sprache: |
Englisch |
Erschienen: |
2008 |
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Schlagwörter: |
Background (on-line) calibration Full calibration of capacitor mismatch and amplifier finite DC-gain |
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Übergeordnetes Werk: |
Enthalten in: Analog integrated circuits and signal processing - Dordrecht [u.a.] : Springer Science + Business Media B.V, 1991, 57(2008), 1-2 vom: 29. Juli, Seite 57-68 |
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Übergeordnetes Werk: |
volume:57 ; year:2008 ; number:1-2 ; day:29 ; month:07 ; pages:57-68 |
Links: |
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DOI / URN: |
10.1007/s10470-008-9195-4 |
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Katalog-ID: |
SPR010308393 |
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100 | 1 | |a Ginés, Antonio J. |e verfasserin |4 aut | |
245 | 1 | 0 | |a New swapping technique for background calibration of capacitor mismatch and amplifier finite DC-gain in pipeline ADCs |
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520 | |a Abstract A novel swapping technique for stage non-linear error calibration in Pipeline ADCs (analogue-to-digital converters) is presented in this paper. The proposed algorithm obtains an estimation of the mismatch between sampling capacitors in the MDAC (multiplying digital-to-analogue converter) inside each stage, without the necessity of interrupting the ADC operation, and therefore, suitable for background calibration applications. The technique also shows its applicability for the amplifier finite DC-gain error, providing a low-cost solution for full calibration of the main static errors in the Pipeline topology with less convergence time, memory resources and simpler calibration hardware than other existing calibration methods. In addition, this work overcomes practical limitations of previous adaptive approaches based on capacitor swapping by introducing a novel modulation scheme. This new scheme minimizes the impact on the analogue part and employs a very simple digital modulation logic. | ||
650 | 4 | |a Pipeline ADC |7 (dpeaa)DE-He213 | |
650 | 4 | |a Switched-capacitor |7 (dpeaa)DE-He213 | |
650 | 4 | |a Background (on-line) calibration |7 (dpeaa)DE-He213 | |
650 | 4 | |a Capacitor swapping technique |7 (dpeaa)DE-He213 | |
650 | 4 | |a Full calibration of capacitor mismatch and amplifier finite DC-gain |7 (dpeaa)DE-He213 | |
700 | 1 | |a Peralías, Eduardo J. |e verfasserin |4 aut | |
700 | 1 | |a Rueda, Adoración |e verfasserin |4 aut | |
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2008 |
allfields |
10.1007/s10470-008-9195-4 doi (DE-627)SPR010308393 (SPR)s10470-008-9195-4-e DE-627 ger DE-627 rakwb eng 004 ASE 53.55 bkl 53.73 bkl Ginés, Antonio J. verfasserin aut New swapping technique for background calibration of capacitor mismatch and amplifier finite DC-gain in pipeline ADCs 2008 Text txt rdacontent Computermedien c rdamedia Online-Ressource cr rdacarrier Abstract A novel swapping technique for stage non-linear error calibration in Pipeline ADCs (analogue-to-digital converters) is presented in this paper. The proposed algorithm obtains an estimation of the mismatch between sampling capacitors in the MDAC (multiplying digital-to-analogue converter) inside each stage, without the necessity of interrupting the ADC operation, and therefore, suitable for background calibration applications. The technique also shows its applicability for the amplifier finite DC-gain error, providing a low-cost solution for full calibration of the main static errors in the Pipeline topology with less convergence time, memory resources and simpler calibration hardware than other existing calibration methods. In addition, this work overcomes practical limitations of previous adaptive approaches based on capacitor swapping by introducing a novel modulation scheme. This new scheme minimizes the impact on the analogue part and employs a very simple digital modulation logic. Pipeline ADC (dpeaa)DE-He213 Switched-capacitor (dpeaa)DE-He213 Background (on-line) calibration (dpeaa)DE-He213 Capacitor swapping technique (dpeaa)DE-He213 Full calibration of capacitor mismatch and amplifier finite DC-gain (dpeaa)DE-He213 Peralías, Eduardo J. verfasserin aut Rueda, Adoración verfasserin aut Enthalten in Analog integrated circuits and signal processing Dordrecht [u.a.] : Springer Science + Business Media B.V, 1991 57(2008), 1-2 vom: 29. Juli, Seite 57-68 (DE-627)271348925 (DE-600)1479772-0 1573-1979 nnns volume:57 year:2008 number:1-2 day:29 month:07 pages:57-68 https://dx.doi.org/10.1007/s10470-008-9195-4 lizenzpflichtig Volltext GBV_USEFLAG_A SYSFLAG_A GBV_SPRINGER GBV_ILN_11 GBV_ILN_20 GBV_ILN_22 GBV_ILN_23 GBV_ILN_24 GBV_ILN_31 GBV_ILN_32 GBV_ILN_39 GBV_ILN_40 GBV_ILN_60 GBV_ILN_62 GBV_ILN_63 GBV_ILN_69 GBV_ILN_70 GBV_ILN_73 GBV_ILN_74 GBV_ILN_90 GBV_ILN_95 GBV_ILN_100 GBV_ILN_101 GBV_ILN_105 GBV_ILN_110 GBV_ILN_120 GBV_ILN_138 GBV_ILN_150 GBV_ILN_151 GBV_ILN_152 GBV_ILN_161 GBV_ILN_170 GBV_ILN_171 GBV_ILN_187 GBV_ILN_213 GBV_ILN_224 GBV_ILN_230 GBV_ILN_250 GBV_ILN_281 GBV_ILN_285 GBV_ILN_293 GBV_ILN_370 GBV_ILN_602 GBV_ILN_636 GBV_ILN_702 GBV_ILN_2001 GBV_ILN_2003 GBV_ILN_2004 GBV_ILN_2005 GBV_ILN_2006 GBV_ILN_2007 GBV_ILN_2008 GBV_ILN_2009 GBV_ILN_2010 GBV_ILN_2011 GBV_ILN_2014 GBV_ILN_2015 GBV_ILN_2020 GBV_ILN_2021 GBV_ILN_2025 GBV_ILN_2026 GBV_ILN_2027 GBV_ILN_2031 GBV_ILN_2034 GBV_ILN_2037 GBV_ILN_2038 GBV_ILN_2039 GBV_ILN_2044 GBV_ILN_2048 GBV_ILN_2049 GBV_ILN_2050 GBV_ILN_2055 GBV_ILN_2057 GBV_ILN_2059 GBV_ILN_2061 GBV_ILN_2064 GBV_ILN_2065 GBV_ILN_2068 GBV_ILN_2070 GBV_ILN_2086 GBV_ILN_2088 GBV_ILN_2093 GBV_ILN_2106 GBV_ILN_2107 GBV_ILN_2108 GBV_ILN_2110 GBV_ILN_2111 GBV_ILN_2112 GBV_ILN_2113 GBV_ILN_2116 GBV_ILN_2118 GBV_ILN_2119 GBV_ILN_2122 GBV_ILN_2129 GBV_ILN_2143 GBV_ILN_2144 GBV_ILN_2147 GBV_ILN_2148 GBV_ILN_2152 GBV_ILN_2153 GBV_ILN_2188 GBV_ILN_2190 GBV_ILN_2232 GBV_ILN_2336 GBV_ILN_2446 GBV_ILN_2470 GBV_ILN_2472 GBV_ILN_2507 GBV_ILN_2522 GBV_ILN_2548 GBV_ILN_4012 GBV_ILN_4035 GBV_ILN_4037 GBV_ILN_4046 GBV_ILN_4112 GBV_ILN_4125 GBV_ILN_4126 GBV_ILN_4242 GBV_ILN_4246 GBV_ILN_4249 GBV_ILN_4251 GBV_ILN_4305 GBV_ILN_4306 GBV_ILN_4307 GBV_ILN_4313 GBV_ILN_4322 GBV_ILN_4323 GBV_ILN_4324 GBV_ILN_4325 GBV_ILN_4326 GBV_ILN_4333 GBV_ILN_4334 GBV_ILN_4335 GBV_ILN_4336 GBV_ILN_4338 GBV_ILN_4393 GBV_ILN_4700 53.55 ASE 53.73 ASE AR 57 2008 1-2 29 07 57-68 |
spelling |
10.1007/s10470-008-9195-4 doi (DE-627)SPR010308393 (SPR)s10470-008-9195-4-e DE-627 ger DE-627 rakwb eng 004 ASE 53.55 bkl 53.73 bkl Ginés, Antonio J. verfasserin aut New swapping technique for background calibration of capacitor mismatch and amplifier finite DC-gain in pipeline ADCs 2008 Text txt rdacontent Computermedien c rdamedia Online-Ressource cr rdacarrier Abstract A novel swapping technique for stage non-linear error calibration in Pipeline ADCs (analogue-to-digital converters) is presented in this paper. The proposed algorithm obtains an estimation of the mismatch between sampling capacitors in the MDAC (multiplying digital-to-analogue converter) inside each stage, without the necessity of interrupting the ADC operation, and therefore, suitable for background calibration applications. The technique also shows its applicability for the amplifier finite DC-gain error, providing a low-cost solution for full calibration of the main static errors in the Pipeline topology with less convergence time, memory resources and simpler calibration hardware than other existing calibration methods. In addition, this work overcomes practical limitations of previous adaptive approaches based on capacitor swapping by introducing a novel modulation scheme. This new scheme minimizes the impact on the analogue part and employs a very simple digital modulation logic. Pipeline ADC (dpeaa)DE-He213 Switched-capacitor (dpeaa)DE-He213 Background (on-line) calibration (dpeaa)DE-He213 Capacitor swapping technique (dpeaa)DE-He213 Full calibration of capacitor mismatch and amplifier finite DC-gain (dpeaa)DE-He213 Peralías, Eduardo J. verfasserin aut Rueda, Adoración verfasserin aut Enthalten in Analog integrated circuits and signal processing Dordrecht [u.a.] : Springer Science + Business Media B.V, 1991 57(2008), 1-2 vom: 29. Juli, Seite 57-68 (DE-627)271348925 (DE-600)1479772-0 1573-1979 nnns volume:57 year:2008 number:1-2 day:29 month:07 pages:57-68 https://dx.doi.org/10.1007/s10470-008-9195-4 lizenzpflichtig Volltext GBV_USEFLAG_A SYSFLAG_A GBV_SPRINGER GBV_ILN_11 GBV_ILN_20 GBV_ILN_22 GBV_ILN_23 GBV_ILN_24 GBV_ILN_31 GBV_ILN_32 GBV_ILN_39 GBV_ILN_40 GBV_ILN_60 GBV_ILN_62 GBV_ILN_63 GBV_ILN_69 GBV_ILN_70 GBV_ILN_73 GBV_ILN_74 GBV_ILN_90 GBV_ILN_95 GBV_ILN_100 GBV_ILN_101 GBV_ILN_105 GBV_ILN_110 GBV_ILN_120 GBV_ILN_138 GBV_ILN_150 GBV_ILN_151 GBV_ILN_152 GBV_ILN_161 GBV_ILN_170 GBV_ILN_171 GBV_ILN_187 GBV_ILN_213 GBV_ILN_224 GBV_ILN_230 GBV_ILN_250 GBV_ILN_281 GBV_ILN_285 GBV_ILN_293 GBV_ILN_370 GBV_ILN_602 GBV_ILN_636 GBV_ILN_702 GBV_ILN_2001 GBV_ILN_2003 GBV_ILN_2004 GBV_ILN_2005 GBV_ILN_2006 GBV_ILN_2007 GBV_ILN_2008 GBV_ILN_2009 GBV_ILN_2010 GBV_ILN_2011 GBV_ILN_2014 GBV_ILN_2015 GBV_ILN_2020 GBV_ILN_2021 GBV_ILN_2025 GBV_ILN_2026 GBV_ILN_2027 GBV_ILN_2031 GBV_ILN_2034 GBV_ILN_2037 GBV_ILN_2038 GBV_ILN_2039 GBV_ILN_2044 GBV_ILN_2048 GBV_ILN_2049 GBV_ILN_2050 GBV_ILN_2055 GBV_ILN_2057 GBV_ILN_2059 GBV_ILN_2061 GBV_ILN_2064 GBV_ILN_2065 GBV_ILN_2068 GBV_ILN_2070 GBV_ILN_2086 GBV_ILN_2088 GBV_ILN_2093 GBV_ILN_2106 GBV_ILN_2107 GBV_ILN_2108 GBV_ILN_2110 GBV_ILN_2111 GBV_ILN_2112 GBV_ILN_2113 GBV_ILN_2116 GBV_ILN_2118 GBV_ILN_2119 GBV_ILN_2122 GBV_ILN_2129 GBV_ILN_2143 GBV_ILN_2144 GBV_ILN_2147 GBV_ILN_2148 GBV_ILN_2152 GBV_ILN_2153 GBV_ILN_2188 GBV_ILN_2190 GBV_ILN_2232 GBV_ILN_2336 GBV_ILN_2446 GBV_ILN_2470 GBV_ILN_2472 GBV_ILN_2507 GBV_ILN_2522 GBV_ILN_2548 GBV_ILN_4012 GBV_ILN_4035 GBV_ILN_4037 GBV_ILN_4046 GBV_ILN_4112 GBV_ILN_4125 GBV_ILN_4126 GBV_ILN_4242 GBV_ILN_4246 GBV_ILN_4249 GBV_ILN_4251 GBV_ILN_4305 GBV_ILN_4306 GBV_ILN_4307 GBV_ILN_4313 GBV_ILN_4322 GBV_ILN_4323 GBV_ILN_4324 GBV_ILN_4325 GBV_ILN_4326 GBV_ILN_4333 GBV_ILN_4334 GBV_ILN_4335 GBV_ILN_4336 GBV_ILN_4338 GBV_ILN_4393 GBV_ILN_4700 53.55 ASE 53.73 ASE AR 57 2008 1-2 29 07 57-68 |
allfields_unstemmed |
10.1007/s10470-008-9195-4 doi (DE-627)SPR010308393 (SPR)s10470-008-9195-4-e DE-627 ger DE-627 rakwb eng 004 ASE 53.55 bkl 53.73 bkl Ginés, Antonio J. verfasserin aut New swapping technique for background calibration of capacitor mismatch and amplifier finite DC-gain in pipeline ADCs 2008 Text txt rdacontent Computermedien c rdamedia Online-Ressource cr rdacarrier Abstract A novel swapping technique for stage non-linear error calibration in Pipeline ADCs (analogue-to-digital converters) is presented in this paper. The proposed algorithm obtains an estimation of the mismatch between sampling capacitors in the MDAC (multiplying digital-to-analogue converter) inside each stage, without the necessity of interrupting the ADC operation, and therefore, suitable for background calibration applications. The technique also shows its applicability for the amplifier finite DC-gain error, providing a low-cost solution for full calibration of the main static errors in the Pipeline topology with less convergence time, memory resources and simpler calibration hardware than other existing calibration methods. In addition, this work overcomes practical limitations of previous adaptive approaches based on capacitor swapping by introducing a novel modulation scheme. This new scheme minimizes the impact on the analogue part and employs a very simple digital modulation logic. Pipeline ADC (dpeaa)DE-He213 Switched-capacitor (dpeaa)DE-He213 Background (on-line) calibration (dpeaa)DE-He213 Capacitor swapping technique (dpeaa)DE-He213 Full calibration of capacitor mismatch and amplifier finite DC-gain (dpeaa)DE-He213 Peralías, Eduardo J. verfasserin aut Rueda, Adoración verfasserin aut Enthalten in Analog integrated circuits and signal processing Dordrecht [u.a.] : Springer Science + Business Media B.V, 1991 57(2008), 1-2 vom: 29. Juli, Seite 57-68 (DE-627)271348925 (DE-600)1479772-0 1573-1979 nnns volume:57 year:2008 number:1-2 day:29 month:07 pages:57-68 https://dx.doi.org/10.1007/s10470-008-9195-4 lizenzpflichtig Volltext GBV_USEFLAG_A SYSFLAG_A GBV_SPRINGER GBV_ILN_11 GBV_ILN_20 GBV_ILN_22 GBV_ILN_23 GBV_ILN_24 GBV_ILN_31 GBV_ILN_32 GBV_ILN_39 GBV_ILN_40 GBV_ILN_60 GBV_ILN_62 GBV_ILN_63 GBV_ILN_69 GBV_ILN_70 GBV_ILN_73 GBV_ILN_74 GBV_ILN_90 GBV_ILN_95 GBV_ILN_100 GBV_ILN_101 GBV_ILN_105 GBV_ILN_110 GBV_ILN_120 GBV_ILN_138 GBV_ILN_150 GBV_ILN_151 GBV_ILN_152 GBV_ILN_161 GBV_ILN_170 GBV_ILN_171 GBV_ILN_187 GBV_ILN_213 GBV_ILN_224 GBV_ILN_230 GBV_ILN_250 GBV_ILN_281 GBV_ILN_285 GBV_ILN_293 GBV_ILN_370 GBV_ILN_602 GBV_ILN_636 GBV_ILN_702 GBV_ILN_2001 GBV_ILN_2003 GBV_ILN_2004 GBV_ILN_2005 GBV_ILN_2006 GBV_ILN_2007 GBV_ILN_2008 GBV_ILN_2009 GBV_ILN_2010 GBV_ILN_2011 GBV_ILN_2014 GBV_ILN_2015 GBV_ILN_2020 GBV_ILN_2021 GBV_ILN_2025 GBV_ILN_2026 GBV_ILN_2027 GBV_ILN_2031 GBV_ILN_2034 GBV_ILN_2037 GBV_ILN_2038 GBV_ILN_2039 GBV_ILN_2044 GBV_ILN_2048 GBV_ILN_2049 GBV_ILN_2050 GBV_ILN_2055 GBV_ILN_2057 GBV_ILN_2059 GBV_ILN_2061 GBV_ILN_2064 GBV_ILN_2065 GBV_ILN_2068 GBV_ILN_2070 GBV_ILN_2086 GBV_ILN_2088 GBV_ILN_2093 GBV_ILN_2106 GBV_ILN_2107 GBV_ILN_2108 GBV_ILN_2110 GBV_ILN_2111 GBV_ILN_2112 GBV_ILN_2113 GBV_ILN_2116 GBV_ILN_2118 GBV_ILN_2119 GBV_ILN_2122 GBV_ILN_2129 GBV_ILN_2143 GBV_ILN_2144 GBV_ILN_2147 GBV_ILN_2148 GBV_ILN_2152 GBV_ILN_2153 GBV_ILN_2188 GBV_ILN_2190 GBV_ILN_2232 GBV_ILN_2336 GBV_ILN_2446 GBV_ILN_2470 GBV_ILN_2472 GBV_ILN_2507 GBV_ILN_2522 GBV_ILN_2548 GBV_ILN_4012 GBV_ILN_4035 GBV_ILN_4037 GBV_ILN_4046 GBV_ILN_4112 GBV_ILN_4125 GBV_ILN_4126 GBV_ILN_4242 GBV_ILN_4246 GBV_ILN_4249 GBV_ILN_4251 GBV_ILN_4305 GBV_ILN_4306 GBV_ILN_4307 GBV_ILN_4313 GBV_ILN_4322 GBV_ILN_4323 GBV_ILN_4324 GBV_ILN_4325 GBV_ILN_4326 GBV_ILN_4333 GBV_ILN_4334 GBV_ILN_4335 GBV_ILN_4336 GBV_ILN_4338 GBV_ILN_4393 GBV_ILN_4700 53.55 ASE 53.73 ASE AR 57 2008 1-2 29 07 57-68 |
allfieldsGer |
10.1007/s10470-008-9195-4 doi (DE-627)SPR010308393 (SPR)s10470-008-9195-4-e DE-627 ger DE-627 rakwb eng 004 ASE 53.55 bkl 53.73 bkl Ginés, Antonio J. verfasserin aut New swapping technique for background calibration of capacitor mismatch and amplifier finite DC-gain in pipeline ADCs 2008 Text txt rdacontent Computermedien c rdamedia Online-Ressource cr rdacarrier Abstract A novel swapping technique for stage non-linear error calibration in Pipeline ADCs (analogue-to-digital converters) is presented in this paper. The proposed algorithm obtains an estimation of the mismatch between sampling capacitors in the MDAC (multiplying digital-to-analogue converter) inside each stage, without the necessity of interrupting the ADC operation, and therefore, suitable for background calibration applications. The technique also shows its applicability for the amplifier finite DC-gain error, providing a low-cost solution for full calibration of the main static errors in the Pipeline topology with less convergence time, memory resources and simpler calibration hardware than other existing calibration methods. In addition, this work overcomes practical limitations of previous adaptive approaches based on capacitor swapping by introducing a novel modulation scheme. This new scheme minimizes the impact on the analogue part and employs a very simple digital modulation logic. Pipeline ADC (dpeaa)DE-He213 Switched-capacitor (dpeaa)DE-He213 Background (on-line) calibration (dpeaa)DE-He213 Capacitor swapping technique (dpeaa)DE-He213 Full calibration of capacitor mismatch and amplifier finite DC-gain (dpeaa)DE-He213 Peralías, Eduardo J. verfasserin aut Rueda, Adoración verfasserin aut Enthalten in Analog integrated circuits and signal processing Dordrecht [u.a.] : Springer Science + Business Media B.V, 1991 57(2008), 1-2 vom: 29. Juli, Seite 57-68 (DE-627)271348925 (DE-600)1479772-0 1573-1979 nnns volume:57 year:2008 number:1-2 day:29 month:07 pages:57-68 https://dx.doi.org/10.1007/s10470-008-9195-4 lizenzpflichtig Volltext GBV_USEFLAG_A SYSFLAG_A GBV_SPRINGER GBV_ILN_11 GBV_ILN_20 GBV_ILN_22 GBV_ILN_23 GBV_ILN_24 GBV_ILN_31 GBV_ILN_32 GBV_ILN_39 GBV_ILN_40 GBV_ILN_60 GBV_ILN_62 GBV_ILN_63 GBV_ILN_69 GBV_ILN_70 GBV_ILN_73 GBV_ILN_74 GBV_ILN_90 GBV_ILN_95 GBV_ILN_100 GBV_ILN_101 GBV_ILN_105 GBV_ILN_110 GBV_ILN_120 GBV_ILN_138 GBV_ILN_150 GBV_ILN_151 GBV_ILN_152 GBV_ILN_161 GBV_ILN_170 GBV_ILN_171 GBV_ILN_187 GBV_ILN_213 GBV_ILN_224 GBV_ILN_230 GBV_ILN_250 GBV_ILN_281 GBV_ILN_285 GBV_ILN_293 GBV_ILN_370 GBV_ILN_602 GBV_ILN_636 GBV_ILN_702 GBV_ILN_2001 GBV_ILN_2003 GBV_ILN_2004 GBV_ILN_2005 GBV_ILN_2006 GBV_ILN_2007 GBV_ILN_2008 GBV_ILN_2009 GBV_ILN_2010 GBV_ILN_2011 GBV_ILN_2014 GBV_ILN_2015 GBV_ILN_2020 GBV_ILN_2021 GBV_ILN_2025 GBV_ILN_2026 GBV_ILN_2027 GBV_ILN_2031 GBV_ILN_2034 GBV_ILN_2037 GBV_ILN_2038 GBV_ILN_2039 GBV_ILN_2044 GBV_ILN_2048 GBV_ILN_2049 GBV_ILN_2050 GBV_ILN_2055 GBV_ILN_2057 GBV_ILN_2059 GBV_ILN_2061 GBV_ILN_2064 GBV_ILN_2065 GBV_ILN_2068 GBV_ILN_2070 GBV_ILN_2086 GBV_ILN_2088 GBV_ILN_2093 GBV_ILN_2106 GBV_ILN_2107 GBV_ILN_2108 GBV_ILN_2110 GBV_ILN_2111 GBV_ILN_2112 GBV_ILN_2113 GBV_ILN_2116 GBV_ILN_2118 GBV_ILN_2119 GBV_ILN_2122 GBV_ILN_2129 GBV_ILN_2143 GBV_ILN_2144 GBV_ILN_2147 GBV_ILN_2148 GBV_ILN_2152 GBV_ILN_2153 GBV_ILN_2188 GBV_ILN_2190 GBV_ILN_2232 GBV_ILN_2336 GBV_ILN_2446 GBV_ILN_2470 GBV_ILN_2472 GBV_ILN_2507 GBV_ILN_2522 GBV_ILN_2548 GBV_ILN_4012 GBV_ILN_4035 GBV_ILN_4037 GBV_ILN_4046 GBV_ILN_4112 GBV_ILN_4125 GBV_ILN_4126 GBV_ILN_4242 GBV_ILN_4246 GBV_ILN_4249 GBV_ILN_4251 GBV_ILN_4305 GBV_ILN_4306 GBV_ILN_4307 GBV_ILN_4313 GBV_ILN_4322 GBV_ILN_4323 GBV_ILN_4324 GBV_ILN_4325 GBV_ILN_4326 GBV_ILN_4333 GBV_ILN_4334 GBV_ILN_4335 GBV_ILN_4336 GBV_ILN_4338 GBV_ILN_4393 GBV_ILN_4700 53.55 ASE 53.73 ASE AR 57 2008 1-2 29 07 57-68 |
allfieldsSound |
10.1007/s10470-008-9195-4 doi (DE-627)SPR010308393 (SPR)s10470-008-9195-4-e DE-627 ger DE-627 rakwb eng 004 ASE 53.55 bkl 53.73 bkl Ginés, Antonio J. verfasserin aut New swapping technique for background calibration of capacitor mismatch and amplifier finite DC-gain in pipeline ADCs 2008 Text txt rdacontent Computermedien c rdamedia Online-Ressource cr rdacarrier Abstract A novel swapping technique for stage non-linear error calibration in Pipeline ADCs (analogue-to-digital converters) is presented in this paper. The proposed algorithm obtains an estimation of the mismatch between sampling capacitors in the MDAC (multiplying digital-to-analogue converter) inside each stage, without the necessity of interrupting the ADC operation, and therefore, suitable for background calibration applications. The technique also shows its applicability for the amplifier finite DC-gain error, providing a low-cost solution for full calibration of the main static errors in the Pipeline topology with less convergence time, memory resources and simpler calibration hardware than other existing calibration methods. In addition, this work overcomes practical limitations of previous adaptive approaches based on capacitor swapping by introducing a novel modulation scheme. This new scheme minimizes the impact on the analogue part and employs a very simple digital modulation logic. Pipeline ADC (dpeaa)DE-He213 Switched-capacitor (dpeaa)DE-He213 Background (on-line) calibration (dpeaa)DE-He213 Capacitor swapping technique (dpeaa)DE-He213 Full calibration of capacitor mismatch and amplifier finite DC-gain (dpeaa)DE-He213 Peralías, Eduardo J. verfasserin aut Rueda, Adoración verfasserin aut Enthalten in Analog integrated circuits and signal processing Dordrecht [u.a.] : Springer Science + Business Media B.V, 1991 57(2008), 1-2 vom: 29. Juli, Seite 57-68 (DE-627)271348925 (DE-600)1479772-0 1573-1979 nnns volume:57 year:2008 number:1-2 day:29 month:07 pages:57-68 https://dx.doi.org/10.1007/s10470-008-9195-4 lizenzpflichtig Volltext GBV_USEFLAG_A SYSFLAG_A GBV_SPRINGER GBV_ILN_11 GBV_ILN_20 GBV_ILN_22 GBV_ILN_23 GBV_ILN_24 GBV_ILN_31 GBV_ILN_32 GBV_ILN_39 GBV_ILN_40 GBV_ILN_60 GBV_ILN_62 GBV_ILN_63 GBV_ILN_69 GBV_ILN_70 GBV_ILN_73 GBV_ILN_74 GBV_ILN_90 GBV_ILN_95 GBV_ILN_100 GBV_ILN_101 GBV_ILN_105 GBV_ILN_110 GBV_ILN_120 GBV_ILN_138 GBV_ILN_150 GBV_ILN_151 GBV_ILN_152 GBV_ILN_161 GBV_ILN_170 GBV_ILN_171 GBV_ILN_187 GBV_ILN_213 GBV_ILN_224 GBV_ILN_230 GBV_ILN_250 GBV_ILN_281 GBV_ILN_285 GBV_ILN_293 GBV_ILN_370 GBV_ILN_602 GBV_ILN_636 GBV_ILN_702 GBV_ILN_2001 GBV_ILN_2003 GBV_ILN_2004 GBV_ILN_2005 GBV_ILN_2006 GBV_ILN_2007 GBV_ILN_2008 GBV_ILN_2009 GBV_ILN_2010 GBV_ILN_2011 GBV_ILN_2014 GBV_ILN_2015 GBV_ILN_2020 GBV_ILN_2021 GBV_ILN_2025 GBV_ILN_2026 GBV_ILN_2027 GBV_ILN_2031 GBV_ILN_2034 GBV_ILN_2037 GBV_ILN_2038 GBV_ILN_2039 GBV_ILN_2044 GBV_ILN_2048 GBV_ILN_2049 GBV_ILN_2050 GBV_ILN_2055 GBV_ILN_2057 GBV_ILN_2059 GBV_ILN_2061 GBV_ILN_2064 GBV_ILN_2065 GBV_ILN_2068 GBV_ILN_2070 GBV_ILN_2086 GBV_ILN_2088 GBV_ILN_2093 GBV_ILN_2106 GBV_ILN_2107 GBV_ILN_2108 GBV_ILN_2110 GBV_ILN_2111 GBV_ILN_2112 GBV_ILN_2113 GBV_ILN_2116 GBV_ILN_2118 GBV_ILN_2119 GBV_ILN_2122 GBV_ILN_2129 GBV_ILN_2143 GBV_ILN_2144 GBV_ILN_2147 GBV_ILN_2148 GBV_ILN_2152 GBV_ILN_2153 GBV_ILN_2188 GBV_ILN_2190 GBV_ILN_2232 GBV_ILN_2336 GBV_ILN_2446 GBV_ILN_2470 GBV_ILN_2472 GBV_ILN_2507 GBV_ILN_2522 GBV_ILN_2548 GBV_ILN_4012 GBV_ILN_4035 GBV_ILN_4037 GBV_ILN_4046 GBV_ILN_4112 GBV_ILN_4125 GBV_ILN_4126 GBV_ILN_4242 GBV_ILN_4246 GBV_ILN_4249 GBV_ILN_4251 GBV_ILN_4305 GBV_ILN_4306 GBV_ILN_4307 GBV_ILN_4313 GBV_ILN_4322 GBV_ILN_4323 GBV_ILN_4324 GBV_ILN_4325 GBV_ILN_4326 GBV_ILN_4333 GBV_ILN_4334 GBV_ILN_4335 GBV_ILN_4336 GBV_ILN_4338 GBV_ILN_4393 GBV_ILN_4700 53.55 ASE 53.73 ASE AR 57 2008 1-2 29 07 57-68 |
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Pipeline ADC Switched-capacitor Background (on-line) calibration Capacitor swapping technique Full calibration of capacitor mismatch and amplifier finite DC-gain |
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Ginés, Antonio J. @@aut@@ Peralías, Eduardo J. @@aut@@ Rueda, Adoración @@aut@@ |
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The proposed algorithm obtains an estimation of the mismatch between sampling capacitors in the MDAC (multiplying digital-to-analogue converter) inside each stage, without the necessity of interrupting the ADC operation, and therefore, suitable for background calibration applications. The technique also shows its applicability for the amplifier finite DC-gain error, providing a low-cost solution for full calibration of the main static errors in the Pipeline topology with less convergence time, memory resources and simpler calibration hardware than other existing calibration methods. In addition, this work overcomes practical limitations of previous adaptive approaches based on capacitor swapping by introducing a novel modulation scheme. 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Ginés, Antonio J. |
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Ginés, Antonio J. ddc 004 bkl 53.55 bkl 53.73 misc Pipeline ADC misc Switched-capacitor misc Background (on-line) calibration misc Capacitor swapping technique misc Full calibration of capacitor mismatch and amplifier finite DC-gain New swapping technique for background calibration of capacitor mismatch and amplifier finite DC-gain in pipeline ADCs |
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004 ASE 53.55 bkl 53.73 bkl New swapping technique for background calibration of capacitor mismatch and amplifier finite DC-gain in pipeline ADCs Pipeline ADC (dpeaa)DE-He213 Switched-capacitor (dpeaa)DE-He213 Background (on-line) calibration (dpeaa)DE-He213 Capacitor swapping technique (dpeaa)DE-He213 Full calibration of capacitor mismatch and amplifier finite DC-gain (dpeaa)DE-He213 |
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ddc 004 bkl 53.55 bkl 53.73 misc Pipeline ADC misc Switched-capacitor misc Background (on-line) calibration misc Capacitor swapping technique misc Full calibration of capacitor mismatch and amplifier finite DC-gain |
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ddc 004 bkl 53.55 bkl 53.73 misc Pipeline ADC misc Switched-capacitor misc Background (on-line) calibration misc Capacitor swapping technique misc Full calibration of capacitor mismatch and amplifier finite DC-gain |
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New swapping technique for background calibration of capacitor mismatch and amplifier finite DC-gain in pipeline ADCs |
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New swapping technique for background calibration of capacitor mismatch and amplifier finite DC-gain in pipeline ADCs |
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Ginés, Antonio J. |
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Analog integrated circuits and signal processing |
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Ginés, Antonio J. Peralías, Eduardo J. Rueda, Adoración |
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new swapping technique for background calibration of capacitor mismatch and amplifier finite dc-gain in pipeline adcs |
title_auth |
New swapping technique for background calibration of capacitor mismatch and amplifier finite DC-gain in pipeline ADCs |
abstract |
Abstract A novel swapping technique for stage non-linear error calibration in Pipeline ADCs (analogue-to-digital converters) is presented in this paper. The proposed algorithm obtains an estimation of the mismatch between sampling capacitors in the MDAC (multiplying digital-to-analogue converter) inside each stage, without the necessity of interrupting the ADC operation, and therefore, suitable for background calibration applications. The technique also shows its applicability for the amplifier finite DC-gain error, providing a low-cost solution for full calibration of the main static errors in the Pipeline topology with less convergence time, memory resources and simpler calibration hardware than other existing calibration methods. In addition, this work overcomes practical limitations of previous adaptive approaches based on capacitor swapping by introducing a novel modulation scheme. This new scheme minimizes the impact on the analogue part and employs a very simple digital modulation logic. |
abstractGer |
Abstract A novel swapping technique for stage non-linear error calibration in Pipeline ADCs (analogue-to-digital converters) is presented in this paper. The proposed algorithm obtains an estimation of the mismatch between sampling capacitors in the MDAC (multiplying digital-to-analogue converter) inside each stage, without the necessity of interrupting the ADC operation, and therefore, suitable for background calibration applications. The technique also shows its applicability for the amplifier finite DC-gain error, providing a low-cost solution for full calibration of the main static errors in the Pipeline topology with less convergence time, memory resources and simpler calibration hardware than other existing calibration methods. In addition, this work overcomes practical limitations of previous adaptive approaches based on capacitor swapping by introducing a novel modulation scheme. This new scheme minimizes the impact on the analogue part and employs a very simple digital modulation logic. |
abstract_unstemmed |
Abstract A novel swapping technique for stage non-linear error calibration in Pipeline ADCs (analogue-to-digital converters) is presented in this paper. The proposed algorithm obtains an estimation of the mismatch between sampling capacitors in the MDAC (multiplying digital-to-analogue converter) inside each stage, without the necessity of interrupting the ADC operation, and therefore, suitable for background calibration applications. The technique also shows its applicability for the amplifier finite DC-gain error, providing a low-cost solution for full calibration of the main static errors in the Pipeline topology with less convergence time, memory resources and simpler calibration hardware than other existing calibration methods. In addition, this work overcomes practical limitations of previous adaptive approaches based on capacitor swapping by introducing a novel modulation scheme. This new scheme minimizes the impact on the analogue part and employs a very simple digital modulation logic. |
collection_details |
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container_issue |
1-2 |
title_short |
New swapping technique for background calibration of capacitor mismatch and amplifier finite DC-gain in pipeline ADCs |
url |
https://dx.doi.org/10.1007/s10470-008-9195-4 |
remote_bool |
true |
author2 |
Peralías, Eduardo J. Rueda, Adoración |
author2Str |
Peralías, Eduardo J. Rueda, Adoración |
ppnlink |
271348925 |
mediatype_str_mv |
c |
isOA_txt |
false |
hochschulschrift_bool |
false |
doi_str |
10.1007/s10470-008-9195-4 |
up_date |
2024-07-03T15:17:05.568Z |
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|
score |
7.39989 |