DSP design tool requirements for embedded systems: A telecommunications industrial perspective
Abstract This paper describes the trends in DSP (Digital Signal Processing) for telecommunications design at Bell Northern Research (BNR)1 and the tools needed to address them. The paper is in three parts: First, we present the results of a three month survey of DSP design practices at BNR. We brief...
Ausführliche Beschreibung
Gespeichert in:
| Autor*in: |
Paulin, Pierre G. [verfasserIn] Liem, Clifford [verfasserIn] May, Trevor C. [verfasserIn] Sutarwala, Shailesh [verfasserIn] |
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| Format: |
E-Artikel |
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| Sprache: |
Englisch |
| Erschienen: |
1995 |
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| Schlagwörter: |
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| Übergeordnetes Werk: |
Enthalten in: Journal of VLSI signal processing systems for signal, image and video technology - Springer Netherlands, 1989, 9(1995), 1-2 vom: 01. Jan., Seite 23-47 |
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| Übergeordnetes Werk: |
volume:9 ; year:1995 ; number:1-2 ; day:01 ; month:01 ; pages:23-47 |
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| DOI / URN: |
10.1007/BF02406469 |
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SPR018310842 |
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| 520 | |a Abstract This paper describes the trends in DSP (Digital Signal Processing) for telecommunications design at Bell Northern Research (BNR)1 and the tools needed to address them. The paper is in three parts: First, we present the results of a three month survey of DSP design practices at BNR. We briefly describe the characteristics of the designs, as well as the DSP design tools used. However, the emphasis is on the main bottlenecks in the design process, and the tools required to address them in the future. Then, we present a proposal for a next generation DSP design environment for telecommunication applications, based on the survey results. Particular emphasis will be given to code generation, system-level simulation, and behavioral synthesis, the three most requested design tools. Finally, we provide a description of FlexWare, an embedded software development system which is being developed internally. This system addresses one important aspect of this next generation environment, namely design tools for application-specific instruction-set processors (ASIP). FlexWare is composed of two main components: CodeSyn, a retargetable microcode synthesis system; and Insulin, a VHDL-based instruction set simulation system. | ||
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10.1007/BF02406469 doi (DE-627)SPR018310842 (SPR)BF02406469-e DE-627 ger DE-627 rakwb eng Paulin, Pierre G. verfasserin aut DSP design tool requirements for embedded systems: A telecommunications industrial perspective 1995 Text txt rdacontent Computermedien c rdamedia Online-Ressource cr rdacarrier Abstract This paper describes the trends in DSP (Digital Signal Processing) for telecommunications design at Bell Northern Research (BNR)1 and the tools needed to address them. The paper is in three parts: First, we present the results of a three month survey of DSP design practices at BNR. We briefly describe the characteristics of the designs, as well as the DSP design tools used. However, the emphasis is on the main bottlenecks in the design process, and the tools required to address them in the future. Then, we present a proposal for a next generation DSP design environment for telecommunication applications, based on the survey results. Particular emphasis will be given to code generation, system-level simulation, and behavioral synthesis, the three most requested design tools. Finally, we provide a description of FlexWare, an embedded software development system which is being developed internally. This system addresses one important aspect of this next generation environment, namely design tools for application-specific instruction-set processors (ASIP). FlexWare is composed of two main components: CodeSyn, a retargetable microcode synthesis system; and Insulin, a VHDL-based instruction set simulation system. Digital Signal Processing (dpeaa)DE-He213 Register Allocation (dpeaa)DE-He213 Synthesis Tool (dpeaa)DE-He213 Signal Flow Graph (dpeaa)DE-He213 Design Automation Conference (dpeaa)DE-He213 Liem, Clifford verfasserin aut May, Trevor C. verfasserin aut Sutarwala, Shailesh verfasserin aut Enthalten in Journal of VLSI signal processing systems for signal, image and video technology Springer Netherlands, 1989 9(1995), 1-2 vom: 01. Jan., Seite 23-47 (DE-627)SPR018308090 nnns volume:9 year:1995 number:1-2 day:01 month:01 pages:23-47 https://dx.doi.org/10.1007/BF02406469 lizenzpflichtig Volltext GBV_USEFLAG_A SYSFLAG_A GBV_SPRINGER GBV_ILN_40 GBV_ILN_2006 GBV_ILN_2027 AR 9 1995 1-2 01 01 23-47 |
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10.1007/BF02406469 doi (DE-627)SPR018310842 (SPR)BF02406469-e DE-627 ger DE-627 rakwb eng Paulin, Pierre G. verfasserin aut DSP design tool requirements for embedded systems: A telecommunications industrial perspective 1995 Text txt rdacontent Computermedien c rdamedia Online-Ressource cr rdacarrier Abstract This paper describes the trends in DSP (Digital Signal Processing) for telecommunications design at Bell Northern Research (BNR)1 and the tools needed to address them. The paper is in three parts: First, we present the results of a three month survey of DSP design practices at BNR. We briefly describe the characteristics of the designs, as well as the DSP design tools used. However, the emphasis is on the main bottlenecks in the design process, and the tools required to address them in the future. Then, we present a proposal for a next generation DSP design environment for telecommunication applications, based on the survey results. Particular emphasis will be given to code generation, system-level simulation, and behavioral synthesis, the three most requested design tools. Finally, we provide a description of FlexWare, an embedded software development system which is being developed internally. This system addresses one important aspect of this next generation environment, namely design tools for application-specific instruction-set processors (ASIP). FlexWare is composed of two main components: CodeSyn, a retargetable microcode synthesis system; and Insulin, a VHDL-based instruction set simulation system. Digital Signal Processing (dpeaa)DE-He213 Register Allocation (dpeaa)DE-He213 Synthesis Tool (dpeaa)DE-He213 Signal Flow Graph (dpeaa)DE-He213 Design Automation Conference (dpeaa)DE-He213 Liem, Clifford verfasserin aut May, Trevor C. verfasserin aut Sutarwala, Shailesh verfasserin aut Enthalten in Journal of VLSI signal processing systems for signal, image and video technology Springer Netherlands, 1989 9(1995), 1-2 vom: 01. Jan., Seite 23-47 (DE-627)SPR018308090 nnns volume:9 year:1995 number:1-2 day:01 month:01 pages:23-47 https://dx.doi.org/10.1007/BF02406469 lizenzpflichtig Volltext GBV_USEFLAG_A SYSFLAG_A GBV_SPRINGER GBV_ILN_40 GBV_ILN_2006 GBV_ILN_2027 AR 9 1995 1-2 01 01 23-47 |
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10.1007/BF02406469 doi (DE-627)SPR018310842 (SPR)BF02406469-e DE-627 ger DE-627 rakwb eng Paulin, Pierre G. verfasserin aut DSP design tool requirements for embedded systems: A telecommunications industrial perspective 1995 Text txt rdacontent Computermedien c rdamedia Online-Ressource cr rdacarrier Abstract This paper describes the trends in DSP (Digital Signal Processing) for telecommunications design at Bell Northern Research (BNR)1 and the tools needed to address them. The paper is in three parts: First, we present the results of a three month survey of DSP design practices at BNR. We briefly describe the characteristics of the designs, as well as the DSP design tools used. However, the emphasis is on the main bottlenecks in the design process, and the tools required to address them in the future. Then, we present a proposal for a next generation DSP design environment for telecommunication applications, based on the survey results. Particular emphasis will be given to code generation, system-level simulation, and behavioral synthesis, the three most requested design tools. Finally, we provide a description of FlexWare, an embedded software development system which is being developed internally. This system addresses one important aspect of this next generation environment, namely design tools for application-specific instruction-set processors (ASIP). FlexWare is composed of two main components: CodeSyn, a retargetable microcode synthesis system; and Insulin, a VHDL-based instruction set simulation system. Digital Signal Processing (dpeaa)DE-He213 Register Allocation (dpeaa)DE-He213 Synthesis Tool (dpeaa)DE-He213 Signal Flow Graph (dpeaa)DE-He213 Design Automation Conference (dpeaa)DE-He213 Liem, Clifford verfasserin aut May, Trevor C. verfasserin aut Sutarwala, Shailesh verfasserin aut Enthalten in Journal of VLSI signal processing systems for signal, image and video technology Springer Netherlands, 1989 9(1995), 1-2 vom: 01. Jan., Seite 23-47 (DE-627)SPR018308090 nnns volume:9 year:1995 number:1-2 day:01 month:01 pages:23-47 https://dx.doi.org/10.1007/BF02406469 lizenzpflichtig Volltext GBV_USEFLAG_A SYSFLAG_A GBV_SPRINGER GBV_ILN_40 GBV_ILN_2006 GBV_ILN_2027 AR 9 1995 1-2 01 01 23-47 |
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10.1007/BF02406469 doi (DE-627)SPR018310842 (SPR)BF02406469-e DE-627 ger DE-627 rakwb eng Paulin, Pierre G. verfasserin aut DSP design tool requirements for embedded systems: A telecommunications industrial perspective 1995 Text txt rdacontent Computermedien c rdamedia Online-Ressource cr rdacarrier Abstract This paper describes the trends in DSP (Digital Signal Processing) for telecommunications design at Bell Northern Research (BNR)1 and the tools needed to address them. The paper is in three parts: First, we present the results of a three month survey of DSP design practices at BNR. We briefly describe the characteristics of the designs, as well as the DSP design tools used. However, the emphasis is on the main bottlenecks in the design process, and the tools required to address them in the future. Then, we present a proposal for a next generation DSP design environment for telecommunication applications, based on the survey results. Particular emphasis will be given to code generation, system-level simulation, and behavioral synthesis, the three most requested design tools. Finally, we provide a description of FlexWare, an embedded software development system which is being developed internally. This system addresses one important aspect of this next generation environment, namely design tools for application-specific instruction-set processors (ASIP). FlexWare is composed of two main components: CodeSyn, a retargetable microcode synthesis system; and Insulin, a VHDL-based instruction set simulation system. Digital Signal Processing (dpeaa)DE-He213 Register Allocation (dpeaa)DE-He213 Synthesis Tool (dpeaa)DE-He213 Signal Flow Graph (dpeaa)DE-He213 Design Automation Conference (dpeaa)DE-He213 Liem, Clifford verfasserin aut May, Trevor C. verfasserin aut Sutarwala, Shailesh verfasserin aut Enthalten in Journal of VLSI signal processing systems for signal, image and video technology Springer Netherlands, 1989 9(1995), 1-2 vom: 01. Jan., Seite 23-47 (DE-627)SPR018308090 nnns volume:9 year:1995 number:1-2 day:01 month:01 pages:23-47 https://dx.doi.org/10.1007/BF02406469 lizenzpflichtig Volltext GBV_USEFLAG_A SYSFLAG_A GBV_SPRINGER GBV_ILN_40 GBV_ILN_2006 GBV_ILN_2027 AR 9 1995 1-2 01 01 23-47 |
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10.1007/BF02406469 doi (DE-627)SPR018310842 (SPR)BF02406469-e DE-627 ger DE-627 rakwb eng Paulin, Pierre G. verfasserin aut DSP design tool requirements for embedded systems: A telecommunications industrial perspective 1995 Text txt rdacontent Computermedien c rdamedia Online-Ressource cr rdacarrier Abstract This paper describes the trends in DSP (Digital Signal Processing) for telecommunications design at Bell Northern Research (BNR)1 and the tools needed to address them. The paper is in three parts: First, we present the results of a three month survey of DSP design practices at BNR. We briefly describe the characteristics of the designs, as well as the DSP design tools used. However, the emphasis is on the main bottlenecks in the design process, and the tools required to address them in the future. Then, we present a proposal for a next generation DSP design environment for telecommunication applications, based on the survey results. Particular emphasis will be given to code generation, system-level simulation, and behavioral synthesis, the three most requested design tools. Finally, we provide a description of FlexWare, an embedded software development system which is being developed internally. This system addresses one important aspect of this next generation environment, namely design tools for application-specific instruction-set processors (ASIP). FlexWare is composed of two main components: CodeSyn, a retargetable microcode synthesis system; and Insulin, a VHDL-based instruction set simulation system. Digital Signal Processing (dpeaa)DE-He213 Register Allocation (dpeaa)DE-He213 Synthesis Tool (dpeaa)DE-He213 Signal Flow Graph (dpeaa)DE-He213 Design Automation Conference (dpeaa)DE-He213 Liem, Clifford verfasserin aut May, Trevor C. verfasserin aut Sutarwala, Shailesh verfasserin aut Enthalten in Journal of VLSI signal processing systems for signal, image and video technology Springer Netherlands, 1989 9(1995), 1-2 vom: 01. Jan., Seite 23-47 (DE-627)SPR018308090 nnns volume:9 year:1995 number:1-2 day:01 month:01 pages:23-47 https://dx.doi.org/10.1007/BF02406469 lizenzpflichtig Volltext GBV_USEFLAG_A SYSFLAG_A GBV_SPRINGER GBV_ILN_40 GBV_ILN_2006 GBV_ILN_2027 AR 9 1995 1-2 01 01 23-47 |
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Abstract This paper describes the trends in DSP (Digital Signal Processing) for telecommunications design at Bell Northern Research (BNR)1 and the tools needed to address them. The paper is in three parts: First, we present the results of a three month survey of DSP design practices at BNR. We briefly describe the characteristics of the designs, as well as the DSP design tools used. However, the emphasis is on the main bottlenecks in the design process, and the tools required to address them in the future. Then, we present a proposal for a next generation DSP design environment for telecommunication applications, based on the survey results. Particular emphasis will be given to code generation, system-level simulation, and behavioral synthesis, the three most requested design tools. Finally, we provide a description of FlexWare, an embedded software development system which is being developed internally. This system addresses one important aspect of this next generation environment, namely design tools for application-specific instruction-set processors (ASIP). FlexWare is composed of two main components: CodeSyn, a retargetable microcode synthesis system; and Insulin, a VHDL-based instruction set simulation system. |
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Abstract This paper describes the trends in DSP (Digital Signal Processing) for telecommunications design at Bell Northern Research (BNR)1 and the tools needed to address them. The paper is in three parts: First, we present the results of a three month survey of DSP design practices at BNR. We briefly describe the characteristics of the designs, as well as the DSP design tools used. However, the emphasis is on the main bottlenecks in the design process, and the tools required to address them in the future. Then, we present a proposal for a next generation DSP design environment for telecommunication applications, based on the survey results. Particular emphasis will be given to code generation, system-level simulation, and behavioral synthesis, the three most requested design tools. Finally, we provide a description of FlexWare, an embedded software development system which is being developed internally. This system addresses one important aspect of this next generation environment, namely design tools for application-specific instruction-set processors (ASIP). FlexWare is composed of two main components: CodeSyn, a retargetable microcode synthesis system; and Insulin, a VHDL-based instruction set simulation system. |
| abstract_unstemmed |
Abstract This paper describes the trends in DSP (Digital Signal Processing) for telecommunications design at Bell Northern Research (BNR)1 and the tools needed to address them. The paper is in three parts: First, we present the results of a three month survey of DSP design practices at BNR. We briefly describe the characteristics of the designs, as well as the DSP design tools used. However, the emphasis is on the main bottlenecks in the design process, and the tools required to address them in the future. Then, we present a proposal for a next generation DSP design environment for telecommunication applications, based on the survey results. Particular emphasis will be given to code generation, system-level simulation, and behavioral synthesis, the three most requested design tools. Finally, we provide a description of FlexWare, an embedded software development system which is being developed internally. This system addresses one important aspect of this next generation environment, namely design tools for application-specific instruction-set processors (ASIP). FlexWare is composed of two main components: CodeSyn, a retargetable microcode synthesis system; and Insulin, a VHDL-based instruction set simulation system. |
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DSP design tool requirements for embedded systems: A telecommunications industrial perspective |
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Liem, Clifford May, Trevor C. Sutarwala, Shailesh |
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