Efficient Loop Scheduling for Chip Multiprocessors with Non-Volatile Main Memory
Abstract Non-volatile memories (NVMs) show great potential in replacing DRAM as the main memory in many embedded systems because of their attractive characteristics such as low cost, high density, and low energy consumption. However, the problem of asymmetric read and write costs has to be addressed...
Ausführliche Beschreibung
Gespeichert in:
| Autor*in: |
Du, Jiayi [verfasserIn] Wang, Yan [verfasserIn] Zhuge, Qingfeng [verfasserIn] Hu, Jingtong [verfasserIn] Sha, Edwin H. -M. [verfasserIn] |
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| Format: |
E-Artikel |
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| Sprache: |
Englisch |
| Erschienen: |
2012 |
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| Schlagwörter: |
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| Übergeordnetes Werk: |
Enthalten in: Journal of VLSI signal processing systems for signal, image and video technology - Springer Netherlands, 1989, 71(2012), 3 vom: 12. Okt., Seite 261-273 |
|---|---|
| Übergeordnetes Werk: |
volume:71 ; year:2012 ; number:3 ; day:12 ; month:10 ; pages:261-273 |
| Links: |
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| DOI / URN: |
10.1007/s11265-012-0703-5 |
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| Katalog-ID: |
SPR018326145 |
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| 520 | |a Abstract Non-volatile memories (NVMs) show great potential in replacing DRAM as the main memory in many embedded systems because of their attractive characteristics such as low cost, high density, and low energy consumption. However, the problem of asymmetric read and write costs has to be addressed before the advantages of NVM can be fully exploited. That is, the cost of write operation is much more expensive than the cost of read operation on NVMs. The existing techniques for loop optimization cannot be used effectively with non-volatile main memory because this special feature is not considered. In this paper, we propose an efficient loop scheduling algorithm, the Rotation with Maximum Bipartite Matching (RMBM) algorithm, to address the problem of expensive write operations on non-volatile main memory for chip multiprocessors (CMPs). It achieves high parallelism for a loop and, at the same time, reduces the number of write operations on NVM. The experimental results show that the RMBM algorithm reduces the number of write activities on NVM by 34.5 % on average compared with the traditional rotation scheduling algorithm. The execution time is reduced by 20.5 %, and the energy consumption is also reduced by 15.03 % on average using the RMBM algorithm. In other words, the average lifetime of NVM can be extended by more than 2 times using the proposed technique. | ||
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| 650 | 4 | |a Loop scheduling algorithm |7 (dpeaa)DE-He213 | |
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| 700 | 1 | |a Wang, Yan |e verfasserin |4 aut | |
| 700 | 1 | |a Zhuge, Qingfeng |e verfasserin |4 aut | |
| 700 | 1 | |a Hu, Jingtong |e verfasserin |4 aut | |
| 700 | 1 | |a Sha, Edwin H. -M. |e verfasserin |4 aut | |
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10.1007/s11265-012-0703-5 doi (DE-627)SPR018326145 (SPR)s11265-012-0703-5-e DE-627 ger DE-627 rakwb eng Du, Jiayi verfasserin aut Efficient Loop Scheduling for Chip Multiprocessors with Non-Volatile Main Memory 2012 Text txt rdacontent Computermedien c rdamedia Online-Ressource cr rdacarrier Abstract Non-volatile memories (NVMs) show great potential in replacing DRAM as the main memory in many embedded systems because of their attractive characteristics such as low cost, high density, and low energy consumption. However, the problem of asymmetric read and write costs has to be addressed before the advantages of NVM can be fully exploited. That is, the cost of write operation is much more expensive than the cost of read operation on NVMs. The existing techniques for loop optimization cannot be used effectively with non-volatile main memory because this special feature is not considered. In this paper, we propose an efficient loop scheduling algorithm, the Rotation with Maximum Bipartite Matching (RMBM) algorithm, to address the problem of expensive write operations on non-volatile main memory for chip multiprocessors (CMPs). It achieves high parallelism for a loop and, at the same time, reduces the number of write operations on NVM. The experimental results show that the RMBM algorithm reduces the number of write activities on NVM by 34.5 % on average compared with the traditional rotation scheduling algorithm. The execution time is reduced by 20.5 %, and the energy consumption is also reduced by 15.03 % on average using the RMBM algorithm. In other words, the average lifetime of NVM can be extended by more than 2 times using the proposed technique. Non-volatile memory (dpeaa)DE-He213 Loop scheduling algorithm (dpeaa)DE-He213 Chip multiprocessor (dpeaa)DE-He213 Wang, Yan verfasserin aut Zhuge, Qingfeng verfasserin aut Hu, Jingtong verfasserin aut Sha, Edwin H. -M. verfasserin aut Enthalten in Journal of VLSI signal processing systems for signal, image and video technology Springer Netherlands, 1989 71(2012), 3 vom: 12. Okt., Seite 261-273 (DE-627)SPR018308090 nnns volume:71 year:2012 number:3 day:12 month:10 pages:261-273 https://dx.doi.org/10.1007/s11265-012-0703-5 lizenzpflichtig Volltext GBV_USEFLAG_A SYSFLAG_A GBV_SPRINGER GBV_ILN_40 GBV_ILN_2006 GBV_ILN_2027 AR 71 2012 3 12 10 261-273 |
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10.1007/s11265-012-0703-5 doi (DE-627)SPR018326145 (SPR)s11265-012-0703-5-e DE-627 ger DE-627 rakwb eng Du, Jiayi verfasserin aut Efficient Loop Scheduling for Chip Multiprocessors with Non-Volatile Main Memory 2012 Text txt rdacontent Computermedien c rdamedia Online-Ressource cr rdacarrier Abstract Non-volatile memories (NVMs) show great potential in replacing DRAM as the main memory in many embedded systems because of their attractive characteristics such as low cost, high density, and low energy consumption. However, the problem of asymmetric read and write costs has to be addressed before the advantages of NVM can be fully exploited. That is, the cost of write operation is much more expensive than the cost of read operation on NVMs. The existing techniques for loop optimization cannot be used effectively with non-volatile main memory because this special feature is not considered. In this paper, we propose an efficient loop scheduling algorithm, the Rotation with Maximum Bipartite Matching (RMBM) algorithm, to address the problem of expensive write operations on non-volatile main memory for chip multiprocessors (CMPs). It achieves high parallelism for a loop and, at the same time, reduces the number of write operations on NVM. The experimental results show that the RMBM algorithm reduces the number of write activities on NVM by 34.5 % on average compared with the traditional rotation scheduling algorithm. The execution time is reduced by 20.5 %, and the energy consumption is also reduced by 15.03 % on average using the RMBM algorithm. In other words, the average lifetime of NVM can be extended by more than 2 times using the proposed technique. Non-volatile memory (dpeaa)DE-He213 Loop scheduling algorithm (dpeaa)DE-He213 Chip multiprocessor (dpeaa)DE-He213 Wang, Yan verfasserin aut Zhuge, Qingfeng verfasserin aut Hu, Jingtong verfasserin aut Sha, Edwin H. -M. verfasserin aut Enthalten in Journal of VLSI signal processing systems for signal, image and video technology Springer Netherlands, 1989 71(2012), 3 vom: 12. Okt., Seite 261-273 (DE-627)SPR018308090 nnns volume:71 year:2012 number:3 day:12 month:10 pages:261-273 https://dx.doi.org/10.1007/s11265-012-0703-5 lizenzpflichtig Volltext GBV_USEFLAG_A SYSFLAG_A GBV_SPRINGER GBV_ILN_40 GBV_ILN_2006 GBV_ILN_2027 AR 71 2012 3 12 10 261-273 |
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10.1007/s11265-012-0703-5 doi (DE-627)SPR018326145 (SPR)s11265-012-0703-5-e DE-627 ger DE-627 rakwb eng Du, Jiayi verfasserin aut Efficient Loop Scheduling for Chip Multiprocessors with Non-Volatile Main Memory 2012 Text txt rdacontent Computermedien c rdamedia Online-Ressource cr rdacarrier Abstract Non-volatile memories (NVMs) show great potential in replacing DRAM as the main memory in many embedded systems because of their attractive characteristics such as low cost, high density, and low energy consumption. However, the problem of asymmetric read and write costs has to be addressed before the advantages of NVM can be fully exploited. That is, the cost of write operation is much more expensive than the cost of read operation on NVMs. The existing techniques for loop optimization cannot be used effectively with non-volatile main memory because this special feature is not considered. In this paper, we propose an efficient loop scheduling algorithm, the Rotation with Maximum Bipartite Matching (RMBM) algorithm, to address the problem of expensive write operations on non-volatile main memory for chip multiprocessors (CMPs). It achieves high parallelism for a loop and, at the same time, reduces the number of write operations on NVM. The experimental results show that the RMBM algorithm reduces the number of write activities on NVM by 34.5 % on average compared with the traditional rotation scheduling algorithm. The execution time is reduced by 20.5 %, and the energy consumption is also reduced by 15.03 % on average using the RMBM algorithm. In other words, the average lifetime of NVM can be extended by more than 2 times using the proposed technique. Non-volatile memory (dpeaa)DE-He213 Loop scheduling algorithm (dpeaa)DE-He213 Chip multiprocessor (dpeaa)DE-He213 Wang, Yan verfasserin aut Zhuge, Qingfeng verfasserin aut Hu, Jingtong verfasserin aut Sha, Edwin H. -M. verfasserin aut Enthalten in Journal of VLSI signal processing systems for signal, image and video technology Springer Netherlands, 1989 71(2012), 3 vom: 12. Okt., Seite 261-273 (DE-627)SPR018308090 nnns volume:71 year:2012 number:3 day:12 month:10 pages:261-273 https://dx.doi.org/10.1007/s11265-012-0703-5 lizenzpflichtig Volltext GBV_USEFLAG_A SYSFLAG_A GBV_SPRINGER GBV_ILN_40 GBV_ILN_2006 GBV_ILN_2027 AR 71 2012 3 12 10 261-273 |
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10.1007/s11265-012-0703-5 doi (DE-627)SPR018326145 (SPR)s11265-012-0703-5-e DE-627 ger DE-627 rakwb eng Du, Jiayi verfasserin aut Efficient Loop Scheduling for Chip Multiprocessors with Non-Volatile Main Memory 2012 Text txt rdacontent Computermedien c rdamedia Online-Ressource cr rdacarrier Abstract Non-volatile memories (NVMs) show great potential in replacing DRAM as the main memory in many embedded systems because of their attractive characteristics such as low cost, high density, and low energy consumption. However, the problem of asymmetric read and write costs has to be addressed before the advantages of NVM can be fully exploited. That is, the cost of write operation is much more expensive than the cost of read operation on NVMs. The existing techniques for loop optimization cannot be used effectively with non-volatile main memory because this special feature is not considered. In this paper, we propose an efficient loop scheduling algorithm, the Rotation with Maximum Bipartite Matching (RMBM) algorithm, to address the problem of expensive write operations on non-volatile main memory for chip multiprocessors (CMPs). It achieves high parallelism for a loop and, at the same time, reduces the number of write operations on NVM. The experimental results show that the RMBM algorithm reduces the number of write activities on NVM by 34.5 % on average compared with the traditional rotation scheduling algorithm. The execution time is reduced by 20.5 %, and the energy consumption is also reduced by 15.03 % on average using the RMBM algorithm. In other words, the average lifetime of NVM can be extended by more than 2 times using the proposed technique. Non-volatile memory (dpeaa)DE-He213 Loop scheduling algorithm (dpeaa)DE-He213 Chip multiprocessor (dpeaa)DE-He213 Wang, Yan verfasserin aut Zhuge, Qingfeng verfasserin aut Hu, Jingtong verfasserin aut Sha, Edwin H. -M. verfasserin aut Enthalten in Journal of VLSI signal processing systems for signal, image and video technology Springer Netherlands, 1989 71(2012), 3 vom: 12. Okt., Seite 261-273 (DE-627)SPR018308090 nnns volume:71 year:2012 number:3 day:12 month:10 pages:261-273 https://dx.doi.org/10.1007/s11265-012-0703-5 lizenzpflichtig Volltext GBV_USEFLAG_A SYSFLAG_A GBV_SPRINGER GBV_ILN_40 GBV_ILN_2006 GBV_ILN_2027 AR 71 2012 3 12 10 261-273 |
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10.1007/s11265-012-0703-5 doi (DE-627)SPR018326145 (SPR)s11265-012-0703-5-e DE-627 ger DE-627 rakwb eng Du, Jiayi verfasserin aut Efficient Loop Scheduling for Chip Multiprocessors with Non-Volatile Main Memory 2012 Text txt rdacontent Computermedien c rdamedia Online-Ressource cr rdacarrier Abstract Non-volatile memories (NVMs) show great potential in replacing DRAM as the main memory in many embedded systems because of their attractive characteristics such as low cost, high density, and low energy consumption. However, the problem of asymmetric read and write costs has to be addressed before the advantages of NVM can be fully exploited. That is, the cost of write operation is much more expensive than the cost of read operation on NVMs. The existing techniques for loop optimization cannot be used effectively with non-volatile main memory because this special feature is not considered. In this paper, we propose an efficient loop scheduling algorithm, the Rotation with Maximum Bipartite Matching (RMBM) algorithm, to address the problem of expensive write operations on non-volatile main memory for chip multiprocessors (CMPs). It achieves high parallelism for a loop and, at the same time, reduces the number of write operations on NVM. The experimental results show that the RMBM algorithm reduces the number of write activities on NVM by 34.5 % on average compared with the traditional rotation scheduling algorithm. The execution time is reduced by 20.5 %, and the energy consumption is also reduced by 15.03 % on average using the RMBM algorithm. In other words, the average lifetime of NVM can be extended by more than 2 times using the proposed technique. Non-volatile memory (dpeaa)DE-He213 Loop scheduling algorithm (dpeaa)DE-He213 Chip multiprocessor (dpeaa)DE-He213 Wang, Yan verfasserin aut Zhuge, Qingfeng verfasserin aut Hu, Jingtong verfasserin aut Sha, Edwin H. -M. verfasserin aut Enthalten in Journal of VLSI signal processing systems for signal, image and video technology Springer Netherlands, 1989 71(2012), 3 vom: 12. Okt., Seite 261-273 (DE-627)SPR018308090 nnns volume:71 year:2012 number:3 day:12 month:10 pages:261-273 https://dx.doi.org/10.1007/s11265-012-0703-5 lizenzpflichtig Volltext GBV_USEFLAG_A SYSFLAG_A GBV_SPRINGER GBV_ILN_40 GBV_ILN_2006 GBV_ILN_2027 AR 71 2012 3 12 10 261-273 |
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Efficient Loop Scheduling for Chip Multiprocessors with Non-Volatile Main Memory |
| abstract |
Abstract Non-volatile memories (NVMs) show great potential in replacing DRAM as the main memory in many embedded systems because of their attractive characteristics such as low cost, high density, and low energy consumption. However, the problem of asymmetric read and write costs has to be addressed before the advantages of NVM can be fully exploited. That is, the cost of write operation is much more expensive than the cost of read operation on NVMs. The existing techniques for loop optimization cannot be used effectively with non-volatile main memory because this special feature is not considered. In this paper, we propose an efficient loop scheduling algorithm, the Rotation with Maximum Bipartite Matching (RMBM) algorithm, to address the problem of expensive write operations on non-volatile main memory for chip multiprocessors (CMPs). It achieves high parallelism for a loop and, at the same time, reduces the number of write operations on NVM. The experimental results show that the RMBM algorithm reduces the number of write activities on NVM by 34.5 % on average compared with the traditional rotation scheduling algorithm. The execution time is reduced by 20.5 %, and the energy consumption is also reduced by 15.03 % on average using the RMBM algorithm. In other words, the average lifetime of NVM can be extended by more than 2 times using the proposed technique. |
| abstractGer |
Abstract Non-volatile memories (NVMs) show great potential in replacing DRAM as the main memory in many embedded systems because of their attractive characteristics such as low cost, high density, and low energy consumption. However, the problem of asymmetric read and write costs has to be addressed before the advantages of NVM can be fully exploited. That is, the cost of write operation is much more expensive than the cost of read operation on NVMs. The existing techniques for loop optimization cannot be used effectively with non-volatile main memory because this special feature is not considered. In this paper, we propose an efficient loop scheduling algorithm, the Rotation with Maximum Bipartite Matching (RMBM) algorithm, to address the problem of expensive write operations on non-volatile main memory for chip multiprocessors (CMPs). It achieves high parallelism for a loop and, at the same time, reduces the number of write operations on NVM. The experimental results show that the RMBM algorithm reduces the number of write activities on NVM by 34.5 % on average compared with the traditional rotation scheduling algorithm. The execution time is reduced by 20.5 %, and the energy consumption is also reduced by 15.03 % on average using the RMBM algorithm. In other words, the average lifetime of NVM can be extended by more than 2 times using the proposed technique. |
| abstract_unstemmed |
Abstract Non-volatile memories (NVMs) show great potential in replacing DRAM as the main memory in many embedded systems because of their attractive characteristics such as low cost, high density, and low energy consumption. However, the problem of asymmetric read and write costs has to be addressed before the advantages of NVM can be fully exploited. That is, the cost of write operation is much more expensive than the cost of read operation on NVMs. The existing techniques for loop optimization cannot be used effectively with non-volatile main memory because this special feature is not considered. In this paper, we propose an efficient loop scheduling algorithm, the Rotation with Maximum Bipartite Matching (RMBM) algorithm, to address the problem of expensive write operations on non-volatile main memory for chip multiprocessors (CMPs). It achieves high parallelism for a loop and, at the same time, reduces the number of write operations on NVM. The experimental results show that the RMBM algorithm reduces the number of write activities on NVM by 34.5 % on average compared with the traditional rotation scheduling algorithm. The execution time is reduced by 20.5 %, and the energy consumption is also reduced by 15.03 % on average using the RMBM algorithm. In other words, the average lifetime of NVM can be extended by more than 2 times using the proposed technique. |
| collection_details |
GBV_USEFLAG_A SYSFLAG_A GBV_SPRINGER GBV_ILN_40 GBV_ILN_2006 GBV_ILN_2027 |
| container_issue |
3 |
| title_short |
Efficient Loop Scheduling for Chip Multiprocessors with Non-Volatile Main Memory |
| url |
https://dx.doi.org/10.1007/s11265-012-0703-5 |
| remote_bool |
true |
| author2 |
Wang, Yan Zhuge, Qingfeng Hu, Jingtong Sha, Edwin H. -M. |
| author2Str |
Wang, Yan Zhuge, Qingfeng Hu, Jingtong Sha, Edwin H. -M. |
| ppnlink |
SPR018308090 |
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c |
| isOA_txt |
false |
| hochschulschrift_bool |
false |
| doi_str |
10.1007/s11265-012-0703-5 |
| up_date |
2024-07-03T18:55:14.457Z |
| _version_ |
1803585233312808960 |
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| score |
7.401518 |