Efficient Berlekamp-Massey Algorithm and Architecture for Reed-Solomon Decoder
Abstract This paper presents a novel area-efficient key equation solver (KES) architecture for the syndrome-based Reed-Solomon (RS) decoders. We develop the compensated simplified reformulated inversionless Berlekamp-Massey (CS-RiBM) algorithm, which is proved to successfully remove unnecessary comp...
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| Autor*in: |
Liang, Zhibin [verfasserIn] Zhang, Wei [verfasserIn] |
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| Format: |
E-Artikel |
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| Sprache: |
Englisch |
| Erschienen: |
2016 |
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| Schlagwörter: |
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| Übergeordnetes Werk: |
Enthalten in: Journal of VLSI signal processing systems for signal, image and video technology - Springer Netherlands, 1989, 86(2016), 1 vom: 06. Jan., Seite 51-65 |
|---|---|
| Übergeordnetes Werk: |
volume:86 ; year:2016 ; number:1 ; day:06 ; month:01 ; pages:51-65 |
| Links: |
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| DOI / URN: |
10.1007/s11265-015-1094-1 |
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SPR018330401 |
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| 520 | |a Abstract This paper presents a novel area-efficient key equation solver (KES) architecture for the syndrome-based Reed-Solomon (RS) decoders. We develop the compensated simplified reformulated inversionless Berlekamp-Massey (CS-RiBM) algorithm, which is proved to successfully remove unnecessary computations in the conventional reformulated inversionless Berlekamp-Massey (RiBM) algorithm with simple compensation. The proposed algorithm results in a simplified KES architecture using much fewer processing elements and can be implemented by a homogenous systolic architecture. The RS (255, 239) and RS (255, 223) decoders using the CS-RiBM architecture have been designed and synthesized with SMIC 0.18 μm CMOS technology library. The synthesis results, excluding FIFO stacks, show that the CS-RiBM architecture can reduce 14 to 29 % area compared with the prior related architectures based on the Berlekamp-Massey (BM) and modified Euclidean (ME) algorithms. The proposed RS decoders achieve similarly high throughput to the RS decoders using the RiBM architecture with lower hardware complexity and are 17 to 22 % more efficient. Higher efficiency is achievable as the error-correcting capability of the RS code increases. | ||
| 650 | 4 | |a Reed-Solomon decoder |7 (dpeaa)DE-He213 | |
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10.1007/s11265-015-1094-1 doi (DE-627)SPR018330401 (SPR)s11265-015-1094-1-e DE-627 ger DE-627 rakwb eng Liang, Zhibin verfasserin aut Efficient Berlekamp-Massey Algorithm and Architecture for Reed-Solomon Decoder 2016 Text txt rdacontent Computermedien c rdamedia Online-Ressource cr rdacarrier Abstract This paper presents a novel area-efficient key equation solver (KES) architecture for the syndrome-based Reed-Solomon (RS) decoders. We develop the compensated simplified reformulated inversionless Berlekamp-Massey (CS-RiBM) algorithm, which is proved to successfully remove unnecessary computations in the conventional reformulated inversionless Berlekamp-Massey (RiBM) algorithm with simple compensation. The proposed algorithm results in a simplified KES architecture using much fewer processing elements and can be implemented by a homogenous systolic architecture. The RS (255, 239) and RS (255, 223) decoders using the CS-RiBM architecture have been designed and synthesized with SMIC 0.18 μm CMOS technology library. The synthesis results, excluding FIFO stacks, show that the CS-RiBM architecture can reduce 14 to 29 % area compared with the prior related architectures based on the Berlekamp-Massey (BM) and modified Euclidean (ME) algorithms. The proposed RS decoders achieve similarly high throughput to the RS decoders using the RiBM architecture with lower hardware complexity and are 17 to 22 % more efficient. Higher efficiency is achievable as the error-correcting capability of the RS code increases. Reed-Solomon decoder (dpeaa)DE-He213 Key equation (dpeaa)DE-He213 Low hardware complexity (dpeaa)DE-He213 Berlekamp-Massey algorithm (dpeaa)DE-He213 Pipelined (dpeaa)DE-He213 VLSI architecture (dpeaa)DE-He213 Zhang, Wei verfasserin aut Enthalten in Journal of VLSI signal processing systems for signal, image and video technology Springer Netherlands, 1989 86(2016), 1 vom: 06. Jan., Seite 51-65 (DE-627)SPR018308090 nnns volume:86 year:2016 number:1 day:06 month:01 pages:51-65 https://dx.doi.org/10.1007/s11265-015-1094-1 lizenzpflichtig Volltext GBV_USEFLAG_A SYSFLAG_A GBV_SPRINGER GBV_ILN_40 GBV_ILN_2006 GBV_ILN_2027 AR 86 2016 1 06 01 51-65 |
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10.1007/s11265-015-1094-1 doi (DE-627)SPR018330401 (SPR)s11265-015-1094-1-e DE-627 ger DE-627 rakwb eng Liang, Zhibin verfasserin aut Efficient Berlekamp-Massey Algorithm and Architecture for Reed-Solomon Decoder 2016 Text txt rdacontent Computermedien c rdamedia Online-Ressource cr rdacarrier Abstract This paper presents a novel area-efficient key equation solver (KES) architecture for the syndrome-based Reed-Solomon (RS) decoders. We develop the compensated simplified reformulated inversionless Berlekamp-Massey (CS-RiBM) algorithm, which is proved to successfully remove unnecessary computations in the conventional reformulated inversionless Berlekamp-Massey (RiBM) algorithm with simple compensation. The proposed algorithm results in a simplified KES architecture using much fewer processing elements and can be implemented by a homogenous systolic architecture. The RS (255, 239) and RS (255, 223) decoders using the CS-RiBM architecture have been designed and synthesized with SMIC 0.18 μm CMOS technology library. The synthesis results, excluding FIFO stacks, show that the CS-RiBM architecture can reduce 14 to 29 % area compared with the prior related architectures based on the Berlekamp-Massey (BM) and modified Euclidean (ME) algorithms. The proposed RS decoders achieve similarly high throughput to the RS decoders using the RiBM architecture with lower hardware complexity and are 17 to 22 % more efficient. Higher efficiency is achievable as the error-correcting capability of the RS code increases. Reed-Solomon decoder (dpeaa)DE-He213 Key equation (dpeaa)DE-He213 Low hardware complexity (dpeaa)DE-He213 Berlekamp-Massey algorithm (dpeaa)DE-He213 Pipelined (dpeaa)DE-He213 VLSI architecture (dpeaa)DE-He213 Zhang, Wei verfasserin aut Enthalten in Journal of VLSI signal processing systems for signal, image and video technology Springer Netherlands, 1989 86(2016), 1 vom: 06. Jan., Seite 51-65 (DE-627)SPR018308090 nnns volume:86 year:2016 number:1 day:06 month:01 pages:51-65 https://dx.doi.org/10.1007/s11265-015-1094-1 lizenzpflichtig Volltext GBV_USEFLAG_A SYSFLAG_A GBV_SPRINGER GBV_ILN_40 GBV_ILN_2006 GBV_ILN_2027 AR 86 2016 1 06 01 51-65 |
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10.1007/s11265-015-1094-1 doi (DE-627)SPR018330401 (SPR)s11265-015-1094-1-e DE-627 ger DE-627 rakwb eng Liang, Zhibin verfasserin aut Efficient Berlekamp-Massey Algorithm and Architecture for Reed-Solomon Decoder 2016 Text txt rdacontent Computermedien c rdamedia Online-Ressource cr rdacarrier Abstract This paper presents a novel area-efficient key equation solver (KES) architecture for the syndrome-based Reed-Solomon (RS) decoders. We develop the compensated simplified reformulated inversionless Berlekamp-Massey (CS-RiBM) algorithm, which is proved to successfully remove unnecessary computations in the conventional reformulated inversionless Berlekamp-Massey (RiBM) algorithm with simple compensation. The proposed algorithm results in a simplified KES architecture using much fewer processing elements and can be implemented by a homogenous systolic architecture. The RS (255, 239) and RS (255, 223) decoders using the CS-RiBM architecture have been designed and synthesized with SMIC 0.18 μm CMOS technology library. The synthesis results, excluding FIFO stacks, show that the CS-RiBM architecture can reduce 14 to 29 % area compared with the prior related architectures based on the Berlekamp-Massey (BM) and modified Euclidean (ME) algorithms. The proposed RS decoders achieve similarly high throughput to the RS decoders using the RiBM architecture with lower hardware complexity and are 17 to 22 % more efficient. Higher efficiency is achievable as the error-correcting capability of the RS code increases. Reed-Solomon decoder (dpeaa)DE-He213 Key equation (dpeaa)DE-He213 Low hardware complexity (dpeaa)DE-He213 Berlekamp-Massey algorithm (dpeaa)DE-He213 Pipelined (dpeaa)DE-He213 VLSI architecture (dpeaa)DE-He213 Zhang, Wei verfasserin aut Enthalten in Journal of VLSI signal processing systems for signal, image and video technology Springer Netherlands, 1989 86(2016), 1 vom: 06. Jan., Seite 51-65 (DE-627)SPR018308090 nnns volume:86 year:2016 number:1 day:06 month:01 pages:51-65 https://dx.doi.org/10.1007/s11265-015-1094-1 lizenzpflichtig Volltext GBV_USEFLAG_A SYSFLAG_A GBV_SPRINGER GBV_ILN_40 GBV_ILN_2006 GBV_ILN_2027 AR 86 2016 1 06 01 51-65 |
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10.1007/s11265-015-1094-1 doi (DE-627)SPR018330401 (SPR)s11265-015-1094-1-e DE-627 ger DE-627 rakwb eng Liang, Zhibin verfasserin aut Efficient Berlekamp-Massey Algorithm and Architecture for Reed-Solomon Decoder 2016 Text txt rdacontent Computermedien c rdamedia Online-Ressource cr rdacarrier Abstract This paper presents a novel area-efficient key equation solver (KES) architecture for the syndrome-based Reed-Solomon (RS) decoders. We develop the compensated simplified reformulated inversionless Berlekamp-Massey (CS-RiBM) algorithm, which is proved to successfully remove unnecessary computations in the conventional reformulated inversionless Berlekamp-Massey (RiBM) algorithm with simple compensation. The proposed algorithm results in a simplified KES architecture using much fewer processing elements and can be implemented by a homogenous systolic architecture. The RS (255, 239) and RS (255, 223) decoders using the CS-RiBM architecture have been designed and synthesized with SMIC 0.18 μm CMOS technology library. The synthesis results, excluding FIFO stacks, show that the CS-RiBM architecture can reduce 14 to 29 % area compared with the prior related architectures based on the Berlekamp-Massey (BM) and modified Euclidean (ME) algorithms. The proposed RS decoders achieve similarly high throughput to the RS decoders using the RiBM architecture with lower hardware complexity and are 17 to 22 % more efficient. Higher efficiency is achievable as the error-correcting capability of the RS code increases. Reed-Solomon decoder (dpeaa)DE-He213 Key equation (dpeaa)DE-He213 Low hardware complexity (dpeaa)DE-He213 Berlekamp-Massey algorithm (dpeaa)DE-He213 Pipelined (dpeaa)DE-He213 VLSI architecture (dpeaa)DE-He213 Zhang, Wei verfasserin aut Enthalten in Journal of VLSI signal processing systems for signal, image and video technology Springer Netherlands, 1989 86(2016), 1 vom: 06. Jan., Seite 51-65 (DE-627)SPR018308090 nnns volume:86 year:2016 number:1 day:06 month:01 pages:51-65 https://dx.doi.org/10.1007/s11265-015-1094-1 lizenzpflichtig Volltext GBV_USEFLAG_A SYSFLAG_A GBV_SPRINGER GBV_ILN_40 GBV_ILN_2006 GBV_ILN_2027 AR 86 2016 1 06 01 51-65 |
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10.1007/s11265-015-1094-1 doi (DE-627)SPR018330401 (SPR)s11265-015-1094-1-e DE-627 ger DE-627 rakwb eng Liang, Zhibin verfasserin aut Efficient Berlekamp-Massey Algorithm and Architecture for Reed-Solomon Decoder 2016 Text txt rdacontent Computermedien c rdamedia Online-Ressource cr rdacarrier Abstract This paper presents a novel area-efficient key equation solver (KES) architecture for the syndrome-based Reed-Solomon (RS) decoders. We develop the compensated simplified reformulated inversionless Berlekamp-Massey (CS-RiBM) algorithm, which is proved to successfully remove unnecessary computations in the conventional reformulated inversionless Berlekamp-Massey (RiBM) algorithm with simple compensation. The proposed algorithm results in a simplified KES architecture using much fewer processing elements and can be implemented by a homogenous systolic architecture. The RS (255, 239) and RS (255, 223) decoders using the CS-RiBM architecture have been designed and synthesized with SMIC 0.18 μm CMOS technology library. The synthesis results, excluding FIFO stacks, show that the CS-RiBM architecture can reduce 14 to 29 % area compared with the prior related architectures based on the Berlekamp-Massey (BM) and modified Euclidean (ME) algorithms. The proposed RS decoders achieve similarly high throughput to the RS decoders using the RiBM architecture with lower hardware complexity and are 17 to 22 % more efficient. Higher efficiency is achievable as the error-correcting capability of the RS code increases. Reed-Solomon decoder (dpeaa)DE-He213 Key equation (dpeaa)DE-He213 Low hardware complexity (dpeaa)DE-He213 Berlekamp-Massey algorithm (dpeaa)DE-He213 Pipelined (dpeaa)DE-He213 VLSI architecture (dpeaa)DE-He213 Zhang, Wei verfasserin aut Enthalten in Journal of VLSI signal processing systems for signal, image and video technology Springer Netherlands, 1989 86(2016), 1 vom: 06. Jan., Seite 51-65 (DE-627)SPR018308090 nnns volume:86 year:2016 number:1 day:06 month:01 pages:51-65 https://dx.doi.org/10.1007/s11265-015-1094-1 lizenzpflichtig Volltext GBV_USEFLAG_A SYSFLAG_A GBV_SPRINGER GBV_ILN_40 GBV_ILN_2006 GBV_ILN_2027 AR 86 2016 1 06 01 51-65 |
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Efficient Berlekamp-Massey Algorithm and Architecture for Reed-Solomon Decoder |
| abstract |
Abstract This paper presents a novel area-efficient key equation solver (KES) architecture for the syndrome-based Reed-Solomon (RS) decoders. We develop the compensated simplified reformulated inversionless Berlekamp-Massey (CS-RiBM) algorithm, which is proved to successfully remove unnecessary computations in the conventional reformulated inversionless Berlekamp-Massey (RiBM) algorithm with simple compensation. The proposed algorithm results in a simplified KES architecture using much fewer processing elements and can be implemented by a homogenous systolic architecture. The RS (255, 239) and RS (255, 223) decoders using the CS-RiBM architecture have been designed and synthesized with SMIC 0.18 μm CMOS technology library. The synthesis results, excluding FIFO stacks, show that the CS-RiBM architecture can reduce 14 to 29 % area compared with the prior related architectures based on the Berlekamp-Massey (BM) and modified Euclidean (ME) algorithms. The proposed RS decoders achieve similarly high throughput to the RS decoders using the RiBM architecture with lower hardware complexity and are 17 to 22 % more efficient. Higher efficiency is achievable as the error-correcting capability of the RS code increases. |
| abstractGer |
Abstract This paper presents a novel area-efficient key equation solver (KES) architecture for the syndrome-based Reed-Solomon (RS) decoders. We develop the compensated simplified reformulated inversionless Berlekamp-Massey (CS-RiBM) algorithm, which is proved to successfully remove unnecessary computations in the conventional reformulated inversionless Berlekamp-Massey (RiBM) algorithm with simple compensation. The proposed algorithm results in a simplified KES architecture using much fewer processing elements and can be implemented by a homogenous systolic architecture. The RS (255, 239) and RS (255, 223) decoders using the CS-RiBM architecture have been designed and synthesized with SMIC 0.18 μm CMOS technology library. The synthesis results, excluding FIFO stacks, show that the CS-RiBM architecture can reduce 14 to 29 % area compared with the prior related architectures based on the Berlekamp-Massey (BM) and modified Euclidean (ME) algorithms. The proposed RS decoders achieve similarly high throughput to the RS decoders using the RiBM architecture with lower hardware complexity and are 17 to 22 % more efficient. Higher efficiency is achievable as the error-correcting capability of the RS code increases. |
| abstract_unstemmed |
Abstract This paper presents a novel area-efficient key equation solver (KES) architecture for the syndrome-based Reed-Solomon (RS) decoders. We develop the compensated simplified reformulated inversionless Berlekamp-Massey (CS-RiBM) algorithm, which is proved to successfully remove unnecessary computations in the conventional reformulated inversionless Berlekamp-Massey (RiBM) algorithm with simple compensation. The proposed algorithm results in a simplified KES architecture using much fewer processing elements and can be implemented by a homogenous systolic architecture. The RS (255, 239) and RS (255, 223) decoders using the CS-RiBM architecture have been designed and synthesized with SMIC 0.18 μm CMOS technology library. The synthesis results, excluding FIFO stacks, show that the CS-RiBM architecture can reduce 14 to 29 % area compared with the prior related architectures based on the Berlekamp-Massey (BM) and modified Euclidean (ME) algorithms. The proposed RS decoders achieve similarly high throughput to the RS decoders using the RiBM architecture with lower hardware complexity and are 17 to 22 % more efficient. Higher efficiency is achievable as the error-correcting capability of the RS code increases. |
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| title_short |
Efficient Berlekamp-Massey Algorithm and Architecture for Reed-Solomon Decoder |
| url |
https://dx.doi.org/10.1007/s11265-015-1094-1 |
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| author2 |
Zhang, Wei |
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Zhang, Wei |
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| doi_str |
10.1007/s11265-015-1094-1 |
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2024-07-03T18:56:30.342Z |
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7.4030848 |