A High-Throughput and Low-Complexity Decoding Scheme based on Logarithmic Domain
Abstract This paper proposes a high-throughput and low-complexity decoder (D_LBAC) based on Logarithmic Binary Arithmetic Coding (LBAC). It can easily implement multiple symbols decoding. The proposed scheme does not use multiplication and division operations nor look up tables (LUTs). It has a simp...
Ausführliche Beschreibung
Gespeichert in:
| Autor*in: |
Yu, Quanhe [verfasserIn] Yu, Wei [verfasserIn] Zheng, Jianhua [verfasserIn] Zheng, Xiaozhen [verfasserIn] He, Yun [verfasserIn] Rong, Yaocheng [verfasserIn] |
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| Format: |
E-Artikel |
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| Sprache: |
Englisch |
| Erschienen: |
2016 |
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| Schlagwörter: |
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| Übergeordnetes Werk: |
Enthalten in: Journal of VLSI signal processing systems for signal, image and video technology - Springer Netherlands, 1989, 88(2016), 3 vom: 14. Mai, Seite 245-257 |
|---|---|
| Übergeordnetes Werk: |
volume:88 ; year:2016 ; number:3 ; day:14 ; month:05 ; pages:245-257 |
| Links: |
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| DOI / URN: |
10.1007/s11265-016-1143-4 |
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SPR018331181 |
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| 520 | |a Abstract This paper proposes a high-throughput and low-complexity decoder (D_LBAC) based on Logarithmic Binary Arithmetic Coding (LBAC). It can easily implement multiple symbols decoding. The proposed scheme does not use multiplication and division operations nor look up tables (LUTs). It has a simple algorithm structure and only requires additions and shift operations. Experimental results show that it has about 0.2–0.7 % bit-rate savings and can decode 3.5 symbols per cycle on average. The hardware implementation design described in this paper can achieve a high symbol processing capability and the lower hardware costs. | ||
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10.1007/s11265-016-1143-4 doi (DE-627)SPR018331181 (SPR)s11265-016-1143-4-e DE-627 ger DE-627 rakwb eng Yu, Quanhe verfasserin aut A High-Throughput and Low-Complexity Decoding Scheme based on Logarithmic Domain 2016 Text txt rdacontent Computermedien c rdamedia Online-Ressource cr rdacarrier Abstract This paper proposes a high-throughput and low-complexity decoder (D_LBAC) based on Logarithmic Binary Arithmetic Coding (LBAC). It can easily implement multiple symbols decoding. The proposed scheme does not use multiplication and division operations nor look up tables (LUTs). It has a simple algorithm structure and only requires additions and shift operations. Experimental results show that it has about 0.2–0.7 % bit-rate savings and can decode 3.5 symbols per cycle on average. The hardware implementation design described in this paper can achieve a high symbol processing capability and the lower hardware costs. Binary arithmetic coding (dpeaa)DE-He213 LBAC (dpeaa)DE-He213 CABAC (dpeaa)DE-He213 Entropy coding (dpeaa)DE-He213 H.265/HEVC (dpeaa)DE-He213 Yu, Wei verfasserin aut Zheng, Jianhua verfasserin aut Zheng, Xiaozhen verfasserin aut He, Yun verfasserin aut Rong, Yaocheng verfasserin aut Enthalten in Journal of VLSI signal processing systems for signal, image and video technology Springer Netherlands, 1989 88(2016), 3 vom: 14. Mai, Seite 245-257 (DE-627)SPR018308090 nnns volume:88 year:2016 number:3 day:14 month:05 pages:245-257 https://dx.doi.org/10.1007/s11265-016-1143-4 lizenzpflichtig Volltext GBV_USEFLAG_A SYSFLAG_A GBV_SPRINGER GBV_ILN_40 GBV_ILN_2006 GBV_ILN_2027 AR 88 2016 3 14 05 245-257 |
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10.1007/s11265-016-1143-4 doi (DE-627)SPR018331181 (SPR)s11265-016-1143-4-e DE-627 ger DE-627 rakwb eng Yu, Quanhe verfasserin aut A High-Throughput and Low-Complexity Decoding Scheme based on Logarithmic Domain 2016 Text txt rdacontent Computermedien c rdamedia Online-Ressource cr rdacarrier Abstract This paper proposes a high-throughput and low-complexity decoder (D_LBAC) based on Logarithmic Binary Arithmetic Coding (LBAC). It can easily implement multiple symbols decoding. The proposed scheme does not use multiplication and division operations nor look up tables (LUTs). It has a simple algorithm structure and only requires additions and shift operations. Experimental results show that it has about 0.2–0.7 % bit-rate savings and can decode 3.5 symbols per cycle on average. The hardware implementation design described in this paper can achieve a high symbol processing capability and the lower hardware costs. Binary arithmetic coding (dpeaa)DE-He213 LBAC (dpeaa)DE-He213 CABAC (dpeaa)DE-He213 Entropy coding (dpeaa)DE-He213 H.265/HEVC (dpeaa)DE-He213 Yu, Wei verfasserin aut Zheng, Jianhua verfasserin aut Zheng, Xiaozhen verfasserin aut He, Yun verfasserin aut Rong, Yaocheng verfasserin aut Enthalten in Journal of VLSI signal processing systems for signal, image and video technology Springer Netherlands, 1989 88(2016), 3 vom: 14. Mai, Seite 245-257 (DE-627)SPR018308090 nnns volume:88 year:2016 number:3 day:14 month:05 pages:245-257 https://dx.doi.org/10.1007/s11265-016-1143-4 lizenzpflichtig Volltext GBV_USEFLAG_A SYSFLAG_A GBV_SPRINGER GBV_ILN_40 GBV_ILN_2006 GBV_ILN_2027 AR 88 2016 3 14 05 245-257 |
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10.1007/s11265-016-1143-4 doi (DE-627)SPR018331181 (SPR)s11265-016-1143-4-e DE-627 ger DE-627 rakwb eng Yu, Quanhe verfasserin aut A High-Throughput and Low-Complexity Decoding Scheme based on Logarithmic Domain 2016 Text txt rdacontent Computermedien c rdamedia Online-Ressource cr rdacarrier Abstract This paper proposes a high-throughput and low-complexity decoder (D_LBAC) based on Logarithmic Binary Arithmetic Coding (LBAC). It can easily implement multiple symbols decoding. The proposed scheme does not use multiplication and division operations nor look up tables (LUTs). It has a simple algorithm structure and only requires additions and shift operations. Experimental results show that it has about 0.2–0.7 % bit-rate savings and can decode 3.5 symbols per cycle on average. The hardware implementation design described in this paper can achieve a high symbol processing capability and the lower hardware costs. Binary arithmetic coding (dpeaa)DE-He213 LBAC (dpeaa)DE-He213 CABAC (dpeaa)DE-He213 Entropy coding (dpeaa)DE-He213 H.265/HEVC (dpeaa)DE-He213 Yu, Wei verfasserin aut Zheng, Jianhua verfasserin aut Zheng, Xiaozhen verfasserin aut He, Yun verfasserin aut Rong, Yaocheng verfasserin aut Enthalten in Journal of VLSI signal processing systems for signal, image and video technology Springer Netherlands, 1989 88(2016), 3 vom: 14. Mai, Seite 245-257 (DE-627)SPR018308090 nnns volume:88 year:2016 number:3 day:14 month:05 pages:245-257 https://dx.doi.org/10.1007/s11265-016-1143-4 lizenzpflichtig Volltext GBV_USEFLAG_A SYSFLAG_A GBV_SPRINGER GBV_ILN_40 GBV_ILN_2006 GBV_ILN_2027 AR 88 2016 3 14 05 245-257 |
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10.1007/s11265-016-1143-4 doi (DE-627)SPR018331181 (SPR)s11265-016-1143-4-e DE-627 ger DE-627 rakwb eng Yu, Quanhe verfasserin aut A High-Throughput and Low-Complexity Decoding Scheme based on Logarithmic Domain 2016 Text txt rdacontent Computermedien c rdamedia Online-Ressource cr rdacarrier Abstract This paper proposes a high-throughput and low-complexity decoder (D_LBAC) based on Logarithmic Binary Arithmetic Coding (LBAC). It can easily implement multiple symbols decoding. The proposed scheme does not use multiplication and division operations nor look up tables (LUTs). It has a simple algorithm structure and only requires additions and shift operations. Experimental results show that it has about 0.2–0.7 % bit-rate savings and can decode 3.5 symbols per cycle on average. The hardware implementation design described in this paper can achieve a high symbol processing capability and the lower hardware costs. Binary arithmetic coding (dpeaa)DE-He213 LBAC (dpeaa)DE-He213 CABAC (dpeaa)DE-He213 Entropy coding (dpeaa)DE-He213 H.265/HEVC (dpeaa)DE-He213 Yu, Wei verfasserin aut Zheng, Jianhua verfasserin aut Zheng, Xiaozhen verfasserin aut He, Yun verfasserin aut Rong, Yaocheng verfasserin aut Enthalten in Journal of VLSI signal processing systems for signal, image and video technology Springer Netherlands, 1989 88(2016), 3 vom: 14. Mai, Seite 245-257 (DE-627)SPR018308090 nnns volume:88 year:2016 number:3 day:14 month:05 pages:245-257 https://dx.doi.org/10.1007/s11265-016-1143-4 lizenzpflichtig Volltext GBV_USEFLAG_A SYSFLAG_A GBV_SPRINGER GBV_ILN_40 GBV_ILN_2006 GBV_ILN_2027 AR 88 2016 3 14 05 245-257 |
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10.1007/s11265-016-1143-4 doi (DE-627)SPR018331181 (SPR)s11265-016-1143-4-e DE-627 ger DE-627 rakwb eng Yu, Quanhe verfasserin aut A High-Throughput and Low-Complexity Decoding Scheme based on Logarithmic Domain 2016 Text txt rdacontent Computermedien c rdamedia Online-Ressource cr rdacarrier Abstract This paper proposes a high-throughput and low-complexity decoder (D_LBAC) based on Logarithmic Binary Arithmetic Coding (LBAC). It can easily implement multiple symbols decoding. The proposed scheme does not use multiplication and division operations nor look up tables (LUTs). It has a simple algorithm structure and only requires additions and shift operations. Experimental results show that it has about 0.2–0.7 % bit-rate savings and can decode 3.5 symbols per cycle on average. The hardware implementation design described in this paper can achieve a high symbol processing capability and the lower hardware costs. Binary arithmetic coding (dpeaa)DE-He213 LBAC (dpeaa)DE-He213 CABAC (dpeaa)DE-He213 Entropy coding (dpeaa)DE-He213 H.265/HEVC (dpeaa)DE-He213 Yu, Wei verfasserin aut Zheng, Jianhua verfasserin aut Zheng, Xiaozhen verfasserin aut He, Yun verfasserin aut Rong, Yaocheng verfasserin aut Enthalten in Journal of VLSI signal processing systems for signal, image and video technology Springer Netherlands, 1989 88(2016), 3 vom: 14. Mai, Seite 245-257 (DE-627)SPR018308090 nnns volume:88 year:2016 number:3 day:14 month:05 pages:245-257 https://dx.doi.org/10.1007/s11265-016-1143-4 lizenzpflichtig Volltext GBV_USEFLAG_A SYSFLAG_A GBV_SPRINGER GBV_ILN_40 GBV_ILN_2006 GBV_ILN_2027 AR 88 2016 3 14 05 245-257 |
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A High-Throughput and Low-Complexity Decoding Scheme based on Logarithmic Domain |
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Abstract This paper proposes a high-throughput and low-complexity decoder (D_LBAC) based on Logarithmic Binary Arithmetic Coding (LBAC). It can easily implement multiple symbols decoding. The proposed scheme does not use multiplication and division operations nor look up tables (LUTs). It has a simple algorithm structure and only requires additions and shift operations. Experimental results show that it has about 0.2–0.7 % bit-rate savings and can decode 3.5 symbols per cycle on average. The hardware implementation design described in this paper can achieve a high symbol processing capability and the lower hardware costs. |
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Abstract This paper proposes a high-throughput and low-complexity decoder (D_LBAC) based on Logarithmic Binary Arithmetic Coding (LBAC). It can easily implement multiple symbols decoding. The proposed scheme does not use multiplication and division operations nor look up tables (LUTs). It has a simple algorithm structure and only requires additions and shift operations. Experimental results show that it has about 0.2–0.7 % bit-rate savings and can decode 3.5 symbols per cycle on average. The hardware implementation design described in this paper can achieve a high symbol processing capability and the lower hardware costs. |
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Abstract This paper proposes a high-throughput and low-complexity decoder (D_LBAC) based on Logarithmic Binary Arithmetic Coding (LBAC). It can easily implement multiple symbols decoding. The proposed scheme does not use multiplication and division operations nor look up tables (LUTs). It has a simple algorithm structure and only requires additions and shift operations. Experimental results show that it has about 0.2–0.7 % bit-rate savings and can decode 3.5 symbols per cycle on average. The hardware implementation design described in this paper can achieve a high symbol processing capability and the lower hardware costs. |
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<?xml version="1.0" encoding="UTF-8"?><collection xmlns="http://www.loc.gov/MARC21/slim"><record><leader>01000caa a22002652 4500</leader><controlfield tag="001">SPR018331181</controlfield><controlfield tag="003">DE-627</controlfield><controlfield tag="005">20201124222418.0</controlfield><controlfield tag="007">cr uuu---uuuuu</controlfield><controlfield tag="008">201006s2016 xx |||||o 00| ||eng c</controlfield><datafield tag="024" ind1="7" ind2=" "><subfield code="a">10.1007/s11265-016-1143-4</subfield><subfield code="2">doi</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(DE-627)SPR018331181</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(SPR)s11265-016-1143-4-e</subfield></datafield><datafield tag="040" ind1=" " ind2=" "><subfield code="a">DE-627</subfield><subfield code="b">ger</subfield><subfield code="c">DE-627</subfield><subfield code="e">rakwb</subfield></datafield><datafield tag="041" ind1=" " ind2=" "><subfield code="a">eng</subfield></datafield><datafield tag="100" ind1="1" ind2=" "><subfield code="a">Yu, Quanhe</subfield><subfield code="e">verfasserin</subfield><subfield code="4">aut</subfield></datafield><datafield tag="245" ind1="1" ind2="2"><subfield code="a">A High-Throughput and Low-Complexity Decoding Scheme based on Logarithmic Domain</subfield></datafield><datafield tag="264" ind1=" " ind2="1"><subfield code="c">2016</subfield></datafield><datafield tag="336" ind1=" " ind2=" "><subfield code="a">Text</subfield><subfield code="b">txt</subfield><subfield code="2">rdacontent</subfield></datafield><datafield tag="337" ind1=" " ind2=" "><subfield code="a">Computermedien</subfield><subfield code="b">c</subfield><subfield code="2">rdamedia</subfield></datafield><datafield tag="338" ind1=" " ind2=" "><subfield code="a">Online-Ressource</subfield><subfield code="b">cr</subfield><subfield code="2">rdacarrier</subfield></datafield><datafield tag="520" ind1=" " ind2=" "><subfield code="a">Abstract This paper proposes a high-throughput and low-complexity decoder (D_LBAC) based on Logarithmic Binary Arithmetic Coding (LBAC). It can easily implement multiple symbols decoding. The proposed scheme does not use multiplication and division operations nor look up tables (LUTs). It has a simple algorithm structure and only requires additions and shift operations. Experimental results show that it has about 0.2–0.7 % bit-rate savings and can decode 3.5 symbols per cycle on average. The hardware implementation design described in this paper can achieve a high symbol processing capability and the lower hardware costs.</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Binary arithmetic coding</subfield><subfield code="7">(dpeaa)DE-He213</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">LBAC</subfield><subfield code="7">(dpeaa)DE-He213</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">CABAC</subfield><subfield code="7">(dpeaa)DE-He213</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Entropy coding</subfield><subfield code="7">(dpeaa)DE-He213</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">H.265/HEVC</subfield><subfield code="7">(dpeaa)DE-He213</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Yu, Wei</subfield><subfield code="e">verfasserin</subfield><subfield code="4">aut</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Zheng, Jianhua</subfield><subfield code="e">verfasserin</subfield><subfield code="4">aut</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Zheng, Xiaozhen</subfield><subfield code="e">verfasserin</subfield><subfield code="4">aut</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">He, Yun</subfield><subfield code="e">verfasserin</subfield><subfield code="4">aut</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Rong, Yaocheng</subfield><subfield code="e">verfasserin</subfield><subfield code="4">aut</subfield></datafield><datafield tag="773" ind1="0" ind2="8"><subfield code="i">Enthalten in</subfield><subfield code="t">Journal of VLSI signal processing systems for signal, image and video technology</subfield><subfield code="d">Springer Netherlands, 1989</subfield><subfield code="g">88(2016), 3 vom: 14. Mai, Seite 245-257</subfield><subfield code="w">(DE-627)SPR018308090</subfield><subfield code="7">nnns</subfield></datafield><datafield tag="773" ind1="1" ind2="8"><subfield code="g">volume:88</subfield><subfield code="g">year:2016</subfield><subfield code="g">number:3</subfield><subfield code="g">day:14</subfield><subfield code="g">month:05</subfield><subfield code="g">pages:245-257</subfield></datafield><datafield tag="856" ind1="4" ind2="0"><subfield code="u">https://dx.doi.org/10.1007/s11265-016-1143-4</subfield><subfield code="z">lizenzpflichtig</subfield><subfield code="3">Volltext</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_USEFLAG_A</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">SYSFLAG_A</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_SPRINGER</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_40</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_2006</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">GBV_ILN_2027</subfield></datafield><datafield tag="951" ind1=" " ind2=" "><subfield code="a">AR</subfield></datafield><datafield tag="952" ind1=" " ind2=" "><subfield code="d">88</subfield><subfield code="j">2016</subfield><subfield code="e">3</subfield><subfield code="b">14</subfield><subfield code="c">05</subfield><subfield code="h">245-257</subfield></datafield></record></collection>
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