The design and development of low- and high-voltage ASICs for space-borne CCD cameras

Abstract The CCD remains the pre-eminent visible and UV wavelength image sensor in space science, Earth and planetary remote sensing. However, the design of space-qualified CCD readout electronics is a significant challenge with requirements for low-volume, low-mass, low-power, high-reliability and...
Ausführliche Beschreibung

Abstract The CCD remains the pre-eminent visible and UV wavelength image sensor in space science, Earth and planetary remote sensing. However, the design of space-qualified CCD readout electronics is a significant challenge with requirements for low-volume, low-mass, low-power, high-reliability and tolerance to space radiation. Space-qualified components are frequently unavailable and up-screened commercial components seldom meet project or international space agency requirements. In this paper, we describe an alternative approach of designing and space-qualifying a series of low- and high-voltage mixed-signal application-specific integrated circuits (ASICs), the ongoing development of two low-voltage ASICs with successful flight heritage, and two new high-voltage designs. A challenging sub-system of any CCD camera is the video processing and digitisation electronics. We describe recent developments to improve performance and tolerance to radiation-induced single event latchup of a CCD video processing ASIC originally developed for NASA’s Solar Terrestrial Relations Observatory and Solar Dynamics Observatory. We also describe a programme to develop two high-voltage ASICs to address the challenges presented with generating a CCD’s bias voltages and drive clocks. A 0.35 μm, 50 V tolerant, CMOS process has been used to combine standard low-voltage 3.3 V transistors with high-voltage 50 V diffused MOSFET transistors that enable output buffers to drive CCD bias drains, gates and clock electrodes directly. We describe a CCD bias voltage generator ASIC that provides 24 independent and programmable 0–32 V outputs. Each channel incorporates a 10-bit digital-to-analogue converter, provides current drive of up to 20 mA into loads of 10 μF, and includes current-limiting and short-circuit protection. An on-chip telemetry system with a 12-bit analogue-to-digital converter enables the outputs and multiple off-chip camera voltages to be monitored. The ASIC can drive one or more CCDs and replaces the many discrete components required in current cameras. We also describe a CCD clock driver ASIC that provides six independent and programmable drivers with high-current capacity. The device enables various CCD clock parameters to be programmed independently, for example the clock-low and clock-high voltage levels, and the clock-rise and clock-fall times, allowing configuration for serial clock frequencies in the range 0.1–2 MHz and image clock frequencies in the range 10–100 kHz. Finally, we demonstrate the impact and importance of this technology for the development of compact, high-performance and low-power integrated focal plane electronics. Ausführliche Beschreibung

Autor*in:	Waltham, N. [verfasserIn] Morrissey, Q. Clapp, M. Bell, S. Jones, L. Torbet, M.

Format:	E-Artikel
Sprache:	Englisch

Erschienen:	2017

Schlagwörter:	CCD camera ASIC Space Readout electronics

Anmerkung:	© CEAS 2017

Übergeordnetes Werk:	Enthalten in: CEAS space journal - Wien [u.a.] : Springer, 2011, 9(2017), 4 vom: 07. Nov., Seite 517-529
Übergeordnetes Werk:	volume:9 ; year:2017 ; number:4 ; day:07 ; month:11 ; pages:517-529

Links:	Volltext

DOI / URN:	10.1007/s12567-017-0181-5

Katalog-ID:	SPR026139065