Performance Modelling and Design Techniques for Efficiency Improvement in On-chip Switched-Capacitor DC-DC Converter
Abstract Fundamental charge vector method analysis is a single parameter optimization technique limited to conduction loss assuming all frequency-dependent switching (parasitic) loss negligible. This paper investigates a generalized structure to design DC-DC SC converters based on conduction and swi...
Ausführliche Beschreibung
Autor*in: |
Saini, Sunita [verfasserIn] |
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E-Artikel |
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Sprache: |
Englisch |
Erschienen: |
2022 |
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Schlagwörter: |
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Anmerkung: |
© The Author(s), under exclusive licence to Springer Science+Business Media, LLC, part of Springer Nature 2022 |
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Übergeordnetes Werk: |
Enthalten in: Wireless personal communications - Dordrecht [u.a.] : Springer Science + Business Media B.V, 1994, 127(2022), 4 vom: 19. Juli, Seite 3379-3405 |
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Übergeordnetes Werk: |
volume:127 ; year:2022 ; number:4 ; day:19 ; month:07 ; pages:3379-3405 |
Links: |
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DOI / URN: |
10.1007/s11277-022-09925-2 |
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Katalog-ID: |
SPR048846163 |
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520 | |a Abstract Fundamental charge vector method analysis is a single parameter optimization technique limited to conduction loss assuming all frequency-dependent switching (parasitic) loss negligible. This paper investigates a generalized structure to design DC-DC SC converters based on conduction and switching loss. A new technique is proposed to find the optimum value of switching frequency and switch size to calculate target load current and output voltage that maximize the efficiency. The analysis is done to identify switching frequency and switch size for two-phase 2:1 series–parallel SC converter for a target load current of 2.67 mA implemented on a 22 nm technology node. Results show that a minimum of 250 MHz switching frequency is required for target efficiency more than 90% and the output voltage greater than 0.85 V where the switch size of a unit cell corresponds to 10Ω on-resistance. MATLAB and PSpice simulation tools are used for results and validation. | ||
650 | 4 | |a Switched-Capacitor |7 (dpeaa)DE-He213 | |
650 | 4 | |a Performance modelling |7 (dpeaa)DE-He213 | |
650 | 4 | |a DC–DC converter |7 (dpeaa)DE-He213 | |
650 | 4 | |a Power efficiency |7 (dpeaa)DE-He213 | |
650 | 4 | |a Switching loss |7 (dpeaa)DE-He213 | |
700 | 1 | |a Saini, Davinder Singh |0 (orcid)0000-0003-3177-1193 |4 aut | |
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10.1007/s11277-022-09925-2 doi (DE-627)SPR048846163 (SPR)s11277-022-09925-2-e DE-627 ger DE-627 rakwb eng Saini, Sunita verfasserin aut Performance Modelling and Design Techniques for Efficiency Improvement in On-chip Switched-Capacitor DC-DC Converter 2022 Text txt rdacontent Computermedien c rdamedia Online-Ressource cr rdacarrier © The Author(s), under exclusive licence to Springer Science+Business Media, LLC, part of Springer Nature 2022 Abstract Fundamental charge vector method analysis is a single parameter optimization technique limited to conduction loss assuming all frequency-dependent switching (parasitic) loss negligible. This paper investigates a generalized structure to design DC-DC SC converters based on conduction and switching loss. A new technique is proposed to find the optimum value of switching frequency and switch size to calculate target load current and output voltage that maximize the efficiency. The analysis is done to identify switching frequency and switch size for two-phase 2:1 series–parallel SC converter for a target load current of 2.67 mA implemented on a 22 nm technology node. Results show that a minimum of 250 MHz switching frequency is required for target efficiency more than 90% and the output voltage greater than 0.85 V where the switch size of a unit cell corresponds to 10Ω on-resistance. MATLAB and PSpice simulation tools are used for results and validation. Switched-Capacitor (dpeaa)DE-He213 Performance modelling (dpeaa)DE-He213 DC–DC converter (dpeaa)DE-He213 Power efficiency (dpeaa)DE-He213 Switching loss (dpeaa)DE-He213 Saini, Davinder Singh (orcid)0000-0003-3177-1193 aut Enthalten in Wireless personal communications Dordrecht [u.a.] : Springer Science + Business Media B.V, 1994 127(2022), 4 vom: 19. Juli, Seite 3379-3405 (DE-627)271179120 (DE-600)1479327-1 1572-834X nnns volume:127 year:2022 number:4 day:19 month:07 pages:3379-3405 https://dx.doi.org/10.1007/s11277-022-09925-2 lizenzpflichtig Volltext GBV_USEFLAG_A SYSFLAG_A GBV_SPRINGER GBV_ILN_11 GBV_ILN_20 GBV_ILN_22 GBV_ILN_23 GBV_ILN_24 GBV_ILN_31 GBV_ILN_32 GBV_ILN_39 GBV_ILN_40 GBV_ILN_60 GBV_ILN_62 GBV_ILN_63 GBV_ILN_69 GBV_ILN_70 GBV_ILN_73 GBV_ILN_74 GBV_ILN_90 GBV_ILN_95 GBV_ILN_100 GBV_ILN_105 GBV_ILN_110 GBV_ILN_120 GBV_ILN_138 GBV_ILN_150 GBV_ILN_151 GBV_ILN_152 GBV_ILN_161 GBV_ILN_170 GBV_ILN_171 GBV_ILN_187 GBV_ILN_213 GBV_ILN_224 GBV_ILN_230 GBV_ILN_250 GBV_ILN_281 GBV_ILN_285 GBV_ILN_293 GBV_ILN_370 GBV_ILN_602 GBV_ILN_636 GBV_ILN_702 GBV_ILN_2001 GBV_ILN_2003 GBV_ILN_2004 GBV_ILN_2005 GBV_ILN_2006 GBV_ILN_2007 GBV_ILN_2008 GBV_ILN_2009 GBV_ILN_2010 GBV_ILN_2011 GBV_ILN_2014 GBV_ILN_2015 GBV_ILN_2020 GBV_ILN_2021 GBV_ILN_2025 GBV_ILN_2026 GBV_ILN_2027 GBV_ILN_2031 GBV_ILN_2034 GBV_ILN_2037 GBV_ILN_2038 GBV_ILN_2039 GBV_ILN_2044 GBV_ILN_2048 GBV_ILN_2049 GBV_ILN_2050 GBV_ILN_2055 GBV_ILN_2056 GBV_ILN_2057 GBV_ILN_2059 GBV_ILN_2061 GBV_ILN_2064 GBV_ILN_2065 GBV_ILN_2068 GBV_ILN_2088 GBV_ILN_2093 GBV_ILN_2106 GBV_ILN_2107 GBV_ILN_2108 GBV_ILN_2110 GBV_ILN_2111 GBV_ILN_2112 GBV_ILN_2113 GBV_ILN_2118 GBV_ILN_2119 GBV_ILN_2122 GBV_ILN_2129 GBV_ILN_2143 GBV_ILN_2144 GBV_ILN_2147 GBV_ILN_2148 GBV_ILN_2152 GBV_ILN_2153 GBV_ILN_2188 GBV_ILN_2190 GBV_ILN_2232 GBV_ILN_2336 GBV_ILN_2446 GBV_ILN_2470 GBV_ILN_2472 GBV_ILN_2507 GBV_ILN_2522 GBV_ILN_2548 GBV_ILN_4035 GBV_ILN_4037 GBV_ILN_4046 GBV_ILN_4112 GBV_ILN_4125 GBV_ILN_4126 GBV_ILN_4242 GBV_ILN_4246 GBV_ILN_4249 GBV_ILN_4251 GBV_ILN_4305 GBV_ILN_4306 GBV_ILN_4307 GBV_ILN_4313 GBV_ILN_4322 GBV_ILN_4323 GBV_ILN_4324 GBV_ILN_4325 GBV_ILN_4326 GBV_ILN_4328 GBV_ILN_4333 GBV_ILN_4334 GBV_ILN_4335 GBV_ILN_4336 GBV_ILN_4338 GBV_ILN_4393 GBV_ILN_4700 AR 127 2022 4 19 07 3379-3405 |
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10.1007/s11277-022-09925-2 doi (DE-627)SPR048846163 (SPR)s11277-022-09925-2-e DE-627 ger DE-627 rakwb eng Saini, Sunita verfasserin aut Performance Modelling and Design Techniques for Efficiency Improvement in On-chip Switched-Capacitor DC-DC Converter 2022 Text txt rdacontent Computermedien c rdamedia Online-Ressource cr rdacarrier © The Author(s), under exclusive licence to Springer Science+Business Media, LLC, part of Springer Nature 2022 Abstract Fundamental charge vector method analysis is a single parameter optimization technique limited to conduction loss assuming all frequency-dependent switching (parasitic) loss negligible. This paper investigates a generalized structure to design DC-DC SC converters based on conduction and switching loss. A new technique is proposed to find the optimum value of switching frequency and switch size to calculate target load current and output voltage that maximize the efficiency. The analysis is done to identify switching frequency and switch size for two-phase 2:1 series–parallel SC converter for a target load current of 2.67 mA implemented on a 22 nm technology node. Results show that a minimum of 250 MHz switching frequency is required for target efficiency more than 90% and the output voltage greater than 0.85 V where the switch size of a unit cell corresponds to 10Ω on-resistance. MATLAB and PSpice simulation tools are used for results and validation. Switched-Capacitor (dpeaa)DE-He213 Performance modelling (dpeaa)DE-He213 DC–DC converter (dpeaa)DE-He213 Power efficiency (dpeaa)DE-He213 Switching loss (dpeaa)DE-He213 Saini, Davinder Singh (orcid)0000-0003-3177-1193 aut Enthalten in Wireless personal communications Dordrecht [u.a.] : Springer Science + Business Media B.V, 1994 127(2022), 4 vom: 19. Juli, Seite 3379-3405 (DE-627)271179120 (DE-600)1479327-1 1572-834X nnns volume:127 year:2022 number:4 day:19 month:07 pages:3379-3405 https://dx.doi.org/10.1007/s11277-022-09925-2 lizenzpflichtig Volltext GBV_USEFLAG_A SYSFLAG_A GBV_SPRINGER GBV_ILN_11 GBV_ILN_20 GBV_ILN_22 GBV_ILN_23 GBV_ILN_24 GBV_ILN_31 GBV_ILN_32 GBV_ILN_39 GBV_ILN_40 GBV_ILN_60 GBV_ILN_62 GBV_ILN_63 GBV_ILN_69 GBV_ILN_70 GBV_ILN_73 GBV_ILN_74 GBV_ILN_90 GBV_ILN_95 GBV_ILN_100 GBV_ILN_105 GBV_ILN_110 GBV_ILN_120 GBV_ILN_138 GBV_ILN_150 GBV_ILN_151 GBV_ILN_152 GBV_ILN_161 GBV_ILN_170 GBV_ILN_171 GBV_ILN_187 GBV_ILN_213 GBV_ILN_224 GBV_ILN_230 GBV_ILN_250 GBV_ILN_281 GBV_ILN_285 GBV_ILN_293 GBV_ILN_370 GBV_ILN_602 GBV_ILN_636 GBV_ILN_702 GBV_ILN_2001 GBV_ILN_2003 GBV_ILN_2004 GBV_ILN_2005 GBV_ILN_2006 GBV_ILN_2007 GBV_ILN_2008 GBV_ILN_2009 GBV_ILN_2010 GBV_ILN_2011 GBV_ILN_2014 GBV_ILN_2015 GBV_ILN_2020 GBV_ILN_2021 GBV_ILN_2025 GBV_ILN_2026 GBV_ILN_2027 GBV_ILN_2031 GBV_ILN_2034 GBV_ILN_2037 GBV_ILN_2038 GBV_ILN_2039 GBV_ILN_2044 GBV_ILN_2048 GBV_ILN_2049 GBV_ILN_2050 GBV_ILN_2055 GBV_ILN_2056 GBV_ILN_2057 GBV_ILN_2059 GBV_ILN_2061 GBV_ILN_2064 GBV_ILN_2065 GBV_ILN_2068 GBV_ILN_2088 GBV_ILN_2093 GBV_ILN_2106 GBV_ILN_2107 GBV_ILN_2108 GBV_ILN_2110 GBV_ILN_2111 GBV_ILN_2112 GBV_ILN_2113 GBV_ILN_2118 GBV_ILN_2119 GBV_ILN_2122 GBV_ILN_2129 GBV_ILN_2143 GBV_ILN_2144 GBV_ILN_2147 GBV_ILN_2148 GBV_ILN_2152 GBV_ILN_2153 GBV_ILN_2188 GBV_ILN_2190 GBV_ILN_2232 GBV_ILN_2336 GBV_ILN_2446 GBV_ILN_2470 GBV_ILN_2472 GBV_ILN_2507 GBV_ILN_2522 GBV_ILN_2548 GBV_ILN_4035 GBV_ILN_4037 GBV_ILN_4046 GBV_ILN_4112 GBV_ILN_4125 GBV_ILN_4126 GBV_ILN_4242 GBV_ILN_4246 GBV_ILN_4249 GBV_ILN_4251 GBV_ILN_4305 GBV_ILN_4306 GBV_ILN_4307 GBV_ILN_4313 GBV_ILN_4322 GBV_ILN_4323 GBV_ILN_4324 GBV_ILN_4325 GBV_ILN_4326 GBV_ILN_4328 GBV_ILN_4333 GBV_ILN_4334 GBV_ILN_4335 GBV_ILN_4336 GBV_ILN_4338 GBV_ILN_4393 GBV_ILN_4700 AR 127 2022 4 19 07 3379-3405 |
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10.1007/s11277-022-09925-2 doi (DE-627)SPR048846163 (SPR)s11277-022-09925-2-e DE-627 ger DE-627 rakwb eng Saini, Sunita verfasserin aut Performance Modelling and Design Techniques for Efficiency Improvement in On-chip Switched-Capacitor DC-DC Converter 2022 Text txt rdacontent Computermedien c rdamedia Online-Ressource cr rdacarrier © The Author(s), under exclusive licence to Springer Science+Business Media, LLC, part of Springer Nature 2022 Abstract Fundamental charge vector method analysis is a single parameter optimization technique limited to conduction loss assuming all frequency-dependent switching (parasitic) loss negligible. This paper investigates a generalized structure to design DC-DC SC converters based on conduction and switching loss. A new technique is proposed to find the optimum value of switching frequency and switch size to calculate target load current and output voltage that maximize the efficiency. The analysis is done to identify switching frequency and switch size for two-phase 2:1 series–parallel SC converter for a target load current of 2.67 mA implemented on a 22 nm technology node. Results show that a minimum of 250 MHz switching frequency is required for target efficiency more than 90% and the output voltage greater than 0.85 V where the switch size of a unit cell corresponds to 10Ω on-resistance. MATLAB and PSpice simulation tools are used for results and validation. Switched-Capacitor (dpeaa)DE-He213 Performance modelling (dpeaa)DE-He213 DC–DC converter (dpeaa)DE-He213 Power efficiency (dpeaa)DE-He213 Switching loss (dpeaa)DE-He213 Saini, Davinder Singh (orcid)0000-0003-3177-1193 aut Enthalten in Wireless personal communications Dordrecht [u.a.] : Springer Science + Business Media B.V, 1994 127(2022), 4 vom: 19. Juli, Seite 3379-3405 (DE-627)271179120 (DE-600)1479327-1 1572-834X nnns volume:127 year:2022 number:4 day:19 month:07 pages:3379-3405 https://dx.doi.org/10.1007/s11277-022-09925-2 lizenzpflichtig Volltext GBV_USEFLAG_A SYSFLAG_A GBV_SPRINGER GBV_ILN_11 GBV_ILN_20 GBV_ILN_22 GBV_ILN_23 GBV_ILN_24 GBV_ILN_31 GBV_ILN_32 GBV_ILN_39 GBV_ILN_40 GBV_ILN_60 GBV_ILN_62 GBV_ILN_63 GBV_ILN_69 GBV_ILN_70 GBV_ILN_73 GBV_ILN_74 GBV_ILN_90 GBV_ILN_95 GBV_ILN_100 GBV_ILN_105 GBV_ILN_110 GBV_ILN_120 GBV_ILN_138 GBV_ILN_150 GBV_ILN_151 GBV_ILN_152 GBV_ILN_161 GBV_ILN_170 GBV_ILN_171 GBV_ILN_187 GBV_ILN_213 GBV_ILN_224 GBV_ILN_230 GBV_ILN_250 GBV_ILN_281 GBV_ILN_285 GBV_ILN_293 GBV_ILN_370 GBV_ILN_602 GBV_ILN_636 GBV_ILN_702 GBV_ILN_2001 GBV_ILN_2003 GBV_ILN_2004 GBV_ILN_2005 GBV_ILN_2006 GBV_ILN_2007 GBV_ILN_2008 GBV_ILN_2009 GBV_ILN_2010 GBV_ILN_2011 GBV_ILN_2014 GBV_ILN_2015 GBV_ILN_2020 GBV_ILN_2021 GBV_ILN_2025 GBV_ILN_2026 GBV_ILN_2027 GBV_ILN_2031 GBV_ILN_2034 GBV_ILN_2037 GBV_ILN_2038 GBV_ILN_2039 GBV_ILN_2044 GBV_ILN_2048 GBV_ILN_2049 GBV_ILN_2050 GBV_ILN_2055 GBV_ILN_2056 GBV_ILN_2057 GBV_ILN_2059 GBV_ILN_2061 GBV_ILN_2064 GBV_ILN_2065 GBV_ILN_2068 GBV_ILN_2088 GBV_ILN_2093 GBV_ILN_2106 GBV_ILN_2107 GBV_ILN_2108 GBV_ILN_2110 GBV_ILN_2111 GBV_ILN_2112 GBV_ILN_2113 GBV_ILN_2118 GBV_ILN_2119 GBV_ILN_2122 GBV_ILN_2129 GBV_ILN_2143 GBV_ILN_2144 GBV_ILN_2147 GBV_ILN_2148 GBV_ILN_2152 GBV_ILN_2153 GBV_ILN_2188 GBV_ILN_2190 GBV_ILN_2232 GBV_ILN_2336 GBV_ILN_2446 GBV_ILN_2470 GBV_ILN_2472 GBV_ILN_2507 GBV_ILN_2522 GBV_ILN_2548 GBV_ILN_4035 GBV_ILN_4037 GBV_ILN_4046 GBV_ILN_4112 GBV_ILN_4125 GBV_ILN_4126 GBV_ILN_4242 GBV_ILN_4246 GBV_ILN_4249 GBV_ILN_4251 GBV_ILN_4305 GBV_ILN_4306 GBV_ILN_4307 GBV_ILN_4313 GBV_ILN_4322 GBV_ILN_4323 GBV_ILN_4324 GBV_ILN_4325 GBV_ILN_4326 GBV_ILN_4328 GBV_ILN_4333 GBV_ILN_4334 GBV_ILN_4335 GBV_ILN_4336 GBV_ILN_4338 GBV_ILN_4393 GBV_ILN_4700 AR 127 2022 4 19 07 3379-3405 |
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10.1007/s11277-022-09925-2 doi (DE-627)SPR048846163 (SPR)s11277-022-09925-2-e DE-627 ger DE-627 rakwb eng Saini, Sunita verfasserin aut Performance Modelling and Design Techniques for Efficiency Improvement in On-chip Switched-Capacitor DC-DC Converter 2022 Text txt rdacontent Computermedien c rdamedia Online-Ressource cr rdacarrier © The Author(s), under exclusive licence to Springer Science+Business Media, LLC, part of Springer Nature 2022 Abstract Fundamental charge vector method analysis is a single parameter optimization technique limited to conduction loss assuming all frequency-dependent switching (parasitic) loss negligible. This paper investigates a generalized structure to design DC-DC SC converters based on conduction and switching loss. A new technique is proposed to find the optimum value of switching frequency and switch size to calculate target load current and output voltage that maximize the efficiency. The analysis is done to identify switching frequency and switch size for two-phase 2:1 series–parallel SC converter for a target load current of 2.67 mA implemented on a 22 nm technology node. Results show that a minimum of 250 MHz switching frequency is required for target efficiency more than 90% and the output voltage greater than 0.85 V where the switch size of a unit cell corresponds to 10Ω on-resistance. MATLAB and PSpice simulation tools are used for results and validation. Switched-Capacitor (dpeaa)DE-He213 Performance modelling (dpeaa)DE-He213 DC–DC converter (dpeaa)DE-He213 Power efficiency (dpeaa)DE-He213 Switching loss (dpeaa)DE-He213 Saini, Davinder Singh (orcid)0000-0003-3177-1193 aut Enthalten in Wireless personal communications Dordrecht [u.a.] : Springer Science + Business Media B.V, 1994 127(2022), 4 vom: 19. Juli, Seite 3379-3405 (DE-627)271179120 (DE-600)1479327-1 1572-834X nnns volume:127 year:2022 number:4 day:19 month:07 pages:3379-3405 https://dx.doi.org/10.1007/s11277-022-09925-2 lizenzpflichtig Volltext GBV_USEFLAG_A SYSFLAG_A GBV_SPRINGER GBV_ILN_11 GBV_ILN_20 GBV_ILN_22 GBV_ILN_23 GBV_ILN_24 GBV_ILN_31 GBV_ILN_32 GBV_ILN_39 GBV_ILN_40 GBV_ILN_60 GBV_ILN_62 GBV_ILN_63 GBV_ILN_69 GBV_ILN_70 GBV_ILN_73 GBV_ILN_74 GBV_ILN_90 GBV_ILN_95 GBV_ILN_100 GBV_ILN_105 GBV_ILN_110 GBV_ILN_120 GBV_ILN_138 GBV_ILN_150 GBV_ILN_151 GBV_ILN_152 GBV_ILN_161 GBV_ILN_170 GBV_ILN_171 GBV_ILN_187 GBV_ILN_213 GBV_ILN_224 GBV_ILN_230 GBV_ILN_250 GBV_ILN_281 GBV_ILN_285 GBV_ILN_293 GBV_ILN_370 GBV_ILN_602 GBV_ILN_636 GBV_ILN_702 GBV_ILN_2001 GBV_ILN_2003 GBV_ILN_2004 GBV_ILN_2005 GBV_ILN_2006 GBV_ILN_2007 GBV_ILN_2008 GBV_ILN_2009 GBV_ILN_2010 GBV_ILN_2011 GBV_ILN_2014 GBV_ILN_2015 GBV_ILN_2020 GBV_ILN_2021 GBV_ILN_2025 GBV_ILN_2026 GBV_ILN_2027 GBV_ILN_2031 GBV_ILN_2034 GBV_ILN_2037 GBV_ILN_2038 GBV_ILN_2039 GBV_ILN_2044 GBV_ILN_2048 GBV_ILN_2049 GBV_ILN_2050 GBV_ILN_2055 GBV_ILN_2056 GBV_ILN_2057 GBV_ILN_2059 GBV_ILN_2061 GBV_ILN_2064 GBV_ILN_2065 GBV_ILN_2068 GBV_ILN_2088 GBV_ILN_2093 GBV_ILN_2106 GBV_ILN_2107 GBV_ILN_2108 GBV_ILN_2110 GBV_ILN_2111 GBV_ILN_2112 GBV_ILN_2113 GBV_ILN_2118 GBV_ILN_2119 GBV_ILN_2122 GBV_ILN_2129 GBV_ILN_2143 GBV_ILN_2144 GBV_ILN_2147 GBV_ILN_2148 GBV_ILN_2152 GBV_ILN_2153 GBV_ILN_2188 GBV_ILN_2190 GBV_ILN_2232 GBV_ILN_2336 GBV_ILN_2446 GBV_ILN_2470 GBV_ILN_2472 GBV_ILN_2507 GBV_ILN_2522 GBV_ILN_2548 GBV_ILN_4035 GBV_ILN_4037 GBV_ILN_4046 GBV_ILN_4112 GBV_ILN_4125 GBV_ILN_4126 GBV_ILN_4242 GBV_ILN_4246 GBV_ILN_4249 GBV_ILN_4251 GBV_ILN_4305 GBV_ILN_4306 GBV_ILN_4307 GBV_ILN_4313 GBV_ILN_4322 GBV_ILN_4323 GBV_ILN_4324 GBV_ILN_4325 GBV_ILN_4326 GBV_ILN_4328 GBV_ILN_4333 GBV_ILN_4334 GBV_ILN_4335 GBV_ILN_4336 GBV_ILN_4338 GBV_ILN_4393 GBV_ILN_4700 AR 127 2022 4 19 07 3379-3405 |
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10.1007/s11277-022-09925-2 doi (DE-627)SPR048846163 (SPR)s11277-022-09925-2-e DE-627 ger DE-627 rakwb eng Saini, Sunita verfasserin aut Performance Modelling and Design Techniques for Efficiency Improvement in On-chip Switched-Capacitor DC-DC Converter 2022 Text txt rdacontent Computermedien c rdamedia Online-Ressource cr rdacarrier © The Author(s), under exclusive licence to Springer Science+Business Media, LLC, part of Springer Nature 2022 Abstract Fundamental charge vector method analysis is a single parameter optimization technique limited to conduction loss assuming all frequency-dependent switching (parasitic) loss negligible. This paper investigates a generalized structure to design DC-DC SC converters based on conduction and switching loss. A new technique is proposed to find the optimum value of switching frequency and switch size to calculate target load current and output voltage that maximize the efficiency. The analysis is done to identify switching frequency and switch size for two-phase 2:1 series–parallel SC converter for a target load current of 2.67 mA implemented on a 22 nm technology node. Results show that a minimum of 250 MHz switching frequency is required for target efficiency more than 90% and the output voltage greater than 0.85 V where the switch size of a unit cell corresponds to 10Ω on-resistance. MATLAB and PSpice simulation tools are used for results and validation. Switched-Capacitor (dpeaa)DE-He213 Performance modelling (dpeaa)DE-He213 DC–DC converter (dpeaa)DE-He213 Power efficiency (dpeaa)DE-He213 Switching loss (dpeaa)DE-He213 Saini, Davinder Singh (orcid)0000-0003-3177-1193 aut Enthalten in Wireless personal communications Dordrecht [u.a.] : Springer Science + Business Media B.V, 1994 127(2022), 4 vom: 19. Juli, Seite 3379-3405 (DE-627)271179120 (DE-600)1479327-1 1572-834X nnns volume:127 year:2022 number:4 day:19 month:07 pages:3379-3405 https://dx.doi.org/10.1007/s11277-022-09925-2 lizenzpflichtig Volltext GBV_USEFLAG_A SYSFLAG_A GBV_SPRINGER GBV_ILN_11 GBV_ILN_20 GBV_ILN_22 GBV_ILN_23 GBV_ILN_24 GBV_ILN_31 GBV_ILN_32 GBV_ILN_39 GBV_ILN_40 GBV_ILN_60 GBV_ILN_62 GBV_ILN_63 GBV_ILN_69 GBV_ILN_70 GBV_ILN_73 GBV_ILN_74 GBV_ILN_90 GBV_ILN_95 GBV_ILN_100 GBV_ILN_105 GBV_ILN_110 GBV_ILN_120 GBV_ILN_138 GBV_ILN_150 GBV_ILN_151 GBV_ILN_152 GBV_ILN_161 GBV_ILN_170 GBV_ILN_171 GBV_ILN_187 GBV_ILN_213 GBV_ILN_224 GBV_ILN_230 GBV_ILN_250 GBV_ILN_281 GBV_ILN_285 GBV_ILN_293 GBV_ILN_370 GBV_ILN_602 GBV_ILN_636 GBV_ILN_702 GBV_ILN_2001 GBV_ILN_2003 GBV_ILN_2004 GBV_ILN_2005 GBV_ILN_2006 GBV_ILN_2007 GBV_ILN_2008 GBV_ILN_2009 GBV_ILN_2010 GBV_ILN_2011 GBV_ILN_2014 GBV_ILN_2015 GBV_ILN_2020 GBV_ILN_2021 GBV_ILN_2025 GBV_ILN_2026 GBV_ILN_2027 GBV_ILN_2031 GBV_ILN_2034 GBV_ILN_2037 GBV_ILN_2038 GBV_ILN_2039 GBV_ILN_2044 GBV_ILN_2048 GBV_ILN_2049 GBV_ILN_2050 GBV_ILN_2055 GBV_ILN_2056 GBV_ILN_2057 GBV_ILN_2059 GBV_ILN_2061 GBV_ILN_2064 GBV_ILN_2065 GBV_ILN_2068 GBV_ILN_2088 GBV_ILN_2093 GBV_ILN_2106 GBV_ILN_2107 GBV_ILN_2108 GBV_ILN_2110 GBV_ILN_2111 GBV_ILN_2112 GBV_ILN_2113 GBV_ILN_2118 GBV_ILN_2119 GBV_ILN_2122 GBV_ILN_2129 GBV_ILN_2143 GBV_ILN_2144 GBV_ILN_2147 GBV_ILN_2148 GBV_ILN_2152 GBV_ILN_2153 GBV_ILN_2188 GBV_ILN_2190 GBV_ILN_2232 GBV_ILN_2336 GBV_ILN_2446 GBV_ILN_2470 GBV_ILN_2472 GBV_ILN_2507 GBV_ILN_2522 GBV_ILN_2548 GBV_ILN_4035 GBV_ILN_4037 GBV_ILN_4046 GBV_ILN_4112 GBV_ILN_4125 GBV_ILN_4126 GBV_ILN_4242 GBV_ILN_4246 GBV_ILN_4249 GBV_ILN_4251 GBV_ILN_4305 GBV_ILN_4306 GBV_ILN_4307 GBV_ILN_4313 GBV_ILN_4322 GBV_ILN_4323 GBV_ILN_4324 GBV_ILN_4325 GBV_ILN_4326 GBV_ILN_4328 GBV_ILN_4333 GBV_ILN_4334 GBV_ILN_4335 GBV_ILN_4336 GBV_ILN_4338 GBV_ILN_4393 GBV_ILN_4700 AR 127 2022 4 19 07 3379-3405 |
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performance modelling and design techniques for efficiency improvement in on-chip switched-capacitor dc-dc converter |
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Performance Modelling and Design Techniques for Efficiency Improvement in On-chip Switched-Capacitor DC-DC Converter |
abstract |
Abstract Fundamental charge vector method analysis is a single parameter optimization technique limited to conduction loss assuming all frequency-dependent switching (parasitic) loss negligible. This paper investigates a generalized structure to design DC-DC SC converters based on conduction and switching loss. A new technique is proposed to find the optimum value of switching frequency and switch size to calculate target load current and output voltage that maximize the efficiency. The analysis is done to identify switching frequency and switch size for two-phase 2:1 series–parallel SC converter for a target load current of 2.67 mA implemented on a 22 nm technology node. Results show that a minimum of 250 MHz switching frequency is required for target efficiency more than 90% and the output voltage greater than 0.85 V where the switch size of a unit cell corresponds to 10Ω on-resistance. MATLAB and PSpice simulation tools are used for results and validation. © The Author(s), under exclusive licence to Springer Science+Business Media, LLC, part of Springer Nature 2022 |
abstractGer |
Abstract Fundamental charge vector method analysis is a single parameter optimization technique limited to conduction loss assuming all frequency-dependent switching (parasitic) loss negligible. This paper investigates a generalized structure to design DC-DC SC converters based on conduction and switching loss. A new technique is proposed to find the optimum value of switching frequency and switch size to calculate target load current and output voltage that maximize the efficiency. The analysis is done to identify switching frequency and switch size for two-phase 2:1 series–parallel SC converter for a target load current of 2.67 mA implemented on a 22 nm technology node. Results show that a minimum of 250 MHz switching frequency is required for target efficiency more than 90% and the output voltage greater than 0.85 V where the switch size of a unit cell corresponds to 10Ω on-resistance. MATLAB and PSpice simulation tools are used for results and validation. © The Author(s), under exclusive licence to Springer Science+Business Media, LLC, part of Springer Nature 2022 |
abstract_unstemmed |
Abstract Fundamental charge vector method analysis is a single parameter optimization technique limited to conduction loss assuming all frequency-dependent switching (parasitic) loss negligible. This paper investigates a generalized structure to design DC-DC SC converters based on conduction and switching loss. A new technique is proposed to find the optimum value of switching frequency and switch size to calculate target load current and output voltage that maximize the efficiency. The analysis is done to identify switching frequency and switch size for two-phase 2:1 series–parallel SC converter for a target load current of 2.67 mA implemented on a 22 nm technology node. Results show that a minimum of 250 MHz switching frequency is required for target efficiency more than 90% and the output voltage greater than 0.85 V where the switch size of a unit cell corresponds to 10Ω on-resistance. MATLAB and PSpice simulation tools are used for results and validation. © The Author(s), under exclusive licence to Springer Science+Business Media, LLC, part of Springer Nature 2022 |
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title_short |
Performance Modelling and Design Techniques for Efficiency Improvement in On-chip Switched-Capacitor DC-DC Converter |
url |
https://dx.doi.org/10.1007/s11277-022-09925-2 |
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Saini, Davinder Singh |
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2024-07-03T21:50:43.218Z |
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