A Novel Physical Unclonable Function Based on Hybrid Current Mirror
Abstract Intrinsic manufacturing process variations are extensive, unpredictable, and inevitable in modern semiconductor technology. This is advantageously utilized in physically unclonable function (PUF) circuits for enhancing hardware and software security. Among widely-known PUF variants, the Arb...
Ausführliche Beschreibung
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| Autor*in: |
C. G., Gisha [verfasserIn] |
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| Format: |
E-Artikel |
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| Sprache: |
Englisch |
| Erschienen: |
2023 |
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| Schlagwörter: |
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| Anmerkung: |
© The Author(s), under exclusive licence to Springer Nature Switzerland AG 2023. Springer Nature or its licensor (e.g. a society or other partner) holds exclusive rights to this article under a publishing agreement with the author(s) or other rightsholder(s); author self-archiving of the accepted manuscript version of this article is solely governed by the terms of such publishing agreement and applicable law. |
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| Übergeordnetes Werk: |
Enthalten in: Journal of hardware and systems security - [Cham] : Springer International Publishing, 2017, 7(2023), 4 vom: 16. Okt., Seite 125-137 |
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| Übergeordnetes Werk: |
volume:7 ; year:2023 ; number:4 ; day:16 ; month:10 ; pages:125-137 |
| Links: |
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| DOI / URN: |
10.1007/s41635-023-00138-y |
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| Katalog-ID: |
SPR054842999 |
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| 245 | 1 | 2 | |a A Novel Physical Unclonable Function Based on Hybrid Current Mirror |
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| 520 | |a Abstract Intrinsic manufacturing process variations are extensive, unpredictable, and inevitable in modern semiconductor technology. This is advantageously utilized in physically unclonable function (PUF) circuits for enhancing hardware and software security. Among widely-known PUF variants, the Arbiter PUF based on digital building blocks has a regular structure and low hardware footprint; however, it is susceptible to machine learning-based modeling attacks. In this work, we propose a new low-power and reliable PUF, based on the hybrid current mirror inverter (CMI). The proposed PUF circuit exploits the process variation-induced randomness in the CMI circuits to generate instance-specific challenge-response characteristics. The current mirror ensures the stability of the overdrive voltages across all the transistors in the CMI blocks, thereby improving the reliability of the proposed PUF. The PUF circuit was simulated at a 45 nm CMOS technology node, and its major performance metrics were evaluated. The simulation results demonstrated that the proposed PUF has excellent performance metrics while having low hardware and resource footprint. In addition, the proposed PUF demonstrated robustness against machine learning-based model-building attacks. | ||
| 650 | 4 | |a Hybrid PUF |7 (dpeaa)DE-He213 | |
| 650 | 4 | |a Current mirror inverter |7 (dpeaa)DE-He213 | |
| 650 | 4 | |a Delay-based PUF |7 (dpeaa)DE-He213 | |
| 650 | 4 | |a Inverter circuit |7 (dpeaa)DE-He213 | |
| 650 | 4 | |a Machine learning attack |7 (dpeaa)DE-He213 | |
| 700 | 1 | |a Chakraborty, Ananda Sankar |4 aut | |
| 700 | 1 | |a Chakraborty, Rajat Subhra |4 aut | |
| 700 | 1 | |a Antony Jose, Bijoy |4 aut | |
| 700 | 1 | |a Mathew, Jimson |4 aut | |
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| 773 | 1 | 8 | |g volume:7 |g year:2023 |g number:4 |g day:16 |g month:10 |g pages:125-137 |
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10.1007/s41635-023-00138-y doi (DE-627)SPR054842999 (SPR)s41635-023-00138-y-e DE-627 ger DE-627 rakwb eng C. G., Gisha verfasserin aut A Novel Physical Unclonable Function Based on Hybrid Current Mirror 2023 Text txt rdacontent Computermedien c rdamedia Online-Ressource cr rdacarrier © The Author(s), under exclusive licence to Springer Nature Switzerland AG 2023. Springer Nature or its licensor (e.g. a society or other partner) holds exclusive rights to this article under a publishing agreement with the author(s) or other rightsholder(s); author self-archiving of the accepted manuscript version of this article is solely governed by the terms of such publishing agreement and applicable law. Abstract Intrinsic manufacturing process variations are extensive, unpredictable, and inevitable in modern semiconductor technology. This is advantageously utilized in physically unclonable function (PUF) circuits for enhancing hardware and software security. Among widely-known PUF variants, the Arbiter PUF based on digital building blocks has a regular structure and low hardware footprint; however, it is susceptible to machine learning-based modeling attacks. In this work, we propose a new low-power and reliable PUF, based on the hybrid current mirror inverter (CMI). The proposed PUF circuit exploits the process variation-induced randomness in the CMI circuits to generate instance-specific challenge-response characteristics. The current mirror ensures the stability of the overdrive voltages across all the transistors in the CMI blocks, thereby improving the reliability of the proposed PUF. The PUF circuit was simulated at a 45 nm CMOS technology node, and its major performance metrics were evaluated. The simulation results demonstrated that the proposed PUF has excellent performance metrics while having low hardware and resource footprint. In addition, the proposed PUF demonstrated robustness against machine learning-based model-building attacks. Hybrid PUF (dpeaa)DE-He213 Current mirror inverter (dpeaa)DE-He213 Delay-based PUF (dpeaa)DE-He213 Inverter circuit (dpeaa)DE-He213 Machine learning attack (dpeaa)DE-He213 Chakraborty, Ananda Sankar aut Chakraborty, Rajat Subhra aut Antony Jose, Bijoy aut Mathew, Jimson aut Enthalten in Journal of hardware and systems security [Cham] : Springer International Publishing, 2017 7(2023), 4 vom: 16. Okt., Seite 125-137 (DE-627)885200780 (DE-600)2892763-1 2509-3436 nnns volume:7 year:2023 number:4 day:16 month:10 pages:125-137 https://dx.doi.org/10.1007/s41635-023-00138-y lizenzpflichtig Volltext GBV_USEFLAG_A SYSFLAG_A GBV_SPRINGER GBV_ILN_11 GBV_ILN_20 GBV_ILN_22 GBV_ILN_23 GBV_ILN_24 GBV_ILN_31 GBV_ILN_32 GBV_ILN_39 GBV_ILN_40 GBV_ILN_60 GBV_ILN_62 GBV_ILN_63 GBV_ILN_65 GBV_ILN_69 GBV_ILN_70 GBV_ILN_73 GBV_ILN_74 GBV_ILN_90 GBV_ILN_95 GBV_ILN_100 GBV_ILN_101 GBV_ILN_105 GBV_ILN_110 GBV_ILN_120 GBV_ILN_138 GBV_ILN_150 GBV_ILN_151 GBV_ILN_152 GBV_ILN_161 GBV_ILN_170 GBV_ILN_171 GBV_ILN_187 GBV_ILN_213 GBV_ILN_224 GBV_ILN_230 GBV_ILN_250 GBV_ILN_266 GBV_ILN_281 GBV_ILN_285 GBV_ILN_293 GBV_ILN_370 GBV_ILN_602 GBV_ILN_636 GBV_ILN_702 GBV_ILN_2001 GBV_ILN_2003 GBV_ILN_2004 GBV_ILN_2005 GBV_ILN_2006 GBV_ILN_2007 GBV_ILN_2008 GBV_ILN_2009 GBV_ILN_2010 GBV_ILN_2011 GBV_ILN_2014 GBV_ILN_2015 GBV_ILN_2020 GBV_ILN_2021 GBV_ILN_2025 GBV_ILN_2026 GBV_ILN_2027 GBV_ILN_2031 GBV_ILN_2034 GBV_ILN_2037 GBV_ILN_2038 GBV_ILN_2039 GBV_ILN_2044 GBV_ILN_2048 GBV_ILN_2049 GBV_ILN_2050 GBV_ILN_2055 GBV_ILN_2056 GBV_ILN_2057 GBV_ILN_2059 GBV_ILN_2061 GBV_ILN_2064 GBV_ILN_2065 GBV_ILN_2068 GBV_ILN_2088 GBV_ILN_2093 GBV_ILN_2106 GBV_ILN_2107 GBV_ILN_2108 GBV_ILN_2110 GBV_ILN_2111 GBV_ILN_2112 GBV_ILN_2113 GBV_ILN_2118 GBV_ILN_2122 GBV_ILN_2129 GBV_ILN_2143 GBV_ILN_2144 GBV_ILN_2147 GBV_ILN_2148 GBV_ILN_2152 GBV_ILN_2153 GBV_ILN_2188 GBV_ILN_2190 GBV_ILN_2232 GBV_ILN_2336 GBV_ILN_2446 GBV_ILN_2470 GBV_ILN_2472 GBV_ILN_2507 GBV_ILN_2522 GBV_ILN_2548 GBV_ILN_4035 GBV_ILN_4037 GBV_ILN_4046 GBV_ILN_4112 GBV_ILN_4125 GBV_ILN_4126 GBV_ILN_4242 GBV_ILN_4246 GBV_ILN_4249 GBV_ILN_4251 GBV_ILN_4305 GBV_ILN_4306 GBV_ILN_4307 GBV_ILN_4313 GBV_ILN_4322 GBV_ILN_4323 GBV_ILN_4324 GBV_ILN_4325 GBV_ILN_4326 GBV_ILN_4328 GBV_ILN_4333 GBV_ILN_4334 GBV_ILN_4335 GBV_ILN_4336 GBV_ILN_4338 GBV_ILN_4393 GBV_ILN_4700 AR 7 2023 4 16 10 125-137 |
| spelling |
10.1007/s41635-023-00138-y doi (DE-627)SPR054842999 (SPR)s41635-023-00138-y-e DE-627 ger DE-627 rakwb eng C. G., Gisha verfasserin aut A Novel Physical Unclonable Function Based on Hybrid Current Mirror 2023 Text txt rdacontent Computermedien c rdamedia Online-Ressource cr rdacarrier © The Author(s), under exclusive licence to Springer Nature Switzerland AG 2023. Springer Nature or its licensor (e.g. a society or other partner) holds exclusive rights to this article under a publishing agreement with the author(s) or other rightsholder(s); author self-archiving of the accepted manuscript version of this article is solely governed by the terms of such publishing agreement and applicable law. Abstract Intrinsic manufacturing process variations are extensive, unpredictable, and inevitable in modern semiconductor technology. This is advantageously utilized in physically unclonable function (PUF) circuits for enhancing hardware and software security. Among widely-known PUF variants, the Arbiter PUF based on digital building blocks has a regular structure and low hardware footprint; however, it is susceptible to machine learning-based modeling attacks. In this work, we propose a new low-power and reliable PUF, based on the hybrid current mirror inverter (CMI). The proposed PUF circuit exploits the process variation-induced randomness in the CMI circuits to generate instance-specific challenge-response characteristics. The current mirror ensures the stability of the overdrive voltages across all the transistors in the CMI blocks, thereby improving the reliability of the proposed PUF. The PUF circuit was simulated at a 45 nm CMOS technology node, and its major performance metrics were evaluated. The simulation results demonstrated that the proposed PUF has excellent performance metrics while having low hardware and resource footprint. In addition, the proposed PUF demonstrated robustness against machine learning-based model-building attacks. Hybrid PUF (dpeaa)DE-He213 Current mirror inverter (dpeaa)DE-He213 Delay-based PUF (dpeaa)DE-He213 Inverter circuit (dpeaa)DE-He213 Machine learning attack (dpeaa)DE-He213 Chakraborty, Ananda Sankar aut Chakraborty, Rajat Subhra aut Antony Jose, Bijoy aut Mathew, Jimson aut Enthalten in Journal of hardware and systems security [Cham] : Springer International Publishing, 2017 7(2023), 4 vom: 16. Okt., Seite 125-137 (DE-627)885200780 (DE-600)2892763-1 2509-3436 nnns volume:7 year:2023 number:4 day:16 month:10 pages:125-137 https://dx.doi.org/10.1007/s41635-023-00138-y lizenzpflichtig Volltext GBV_USEFLAG_A SYSFLAG_A GBV_SPRINGER GBV_ILN_11 GBV_ILN_20 GBV_ILN_22 GBV_ILN_23 GBV_ILN_24 GBV_ILN_31 GBV_ILN_32 GBV_ILN_39 GBV_ILN_40 GBV_ILN_60 GBV_ILN_62 GBV_ILN_63 GBV_ILN_65 GBV_ILN_69 GBV_ILN_70 GBV_ILN_73 GBV_ILN_74 GBV_ILN_90 GBV_ILN_95 GBV_ILN_100 GBV_ILN_101 GBV_ILN_105 GBV_ILN_110 GBV_ILN_120 GBV_ILN_138 GBV_ILN_150 GBV_ILN_151 GBV_ILN_152 GBV_ILN_161 GBV_ILN_170 GBV_ILN_171 GBV_ILN_187 GBV_ILN_213 GBV_ILN_224 GBV_ILN_230 GBV_ILN_250 GBV_ILN_266 GBV_ILN_281 GBV_ILN_285 GBV_ILN_293 GBV_ILN_370 GBV_ILN_602 GBV_ILN_636 GBV_ILN_702 GBV_ILN_2001 GBV_ILN_2003 GBV_ILN_2004 GBV_ILN_2005 GBV_ILN_2006 GBV_ILN_2007 GBV_ILN_2008 GBV_ILN_2009 GBV_ILN_2010 GBV_ILN_2011 GBV_ILN_2014 GBV_ILN_2015 GBV_ILN_2020 GBV_ILN_2021 GBV_ILN_2025 GBV_ILN_2026 GBV_ILN_2027 GBV_ILN_2031 GBV_ILN_2034 GBV_ILN_2037 GBV_ILN_2038 GBV_ILN_2039 GBV_ILN_2044 GBV_ILN_2048 GBV_ILN_2049 GBV_ILN_2050 GBV_ILN_2055 GBV_ILN_2056 GBV_ILN_2057 GBV_ILN_2059 GBV_ILN_2061 GBV_ILN_2064 GBV_ILN_2065 GBV_ILN_2068 GBV_ILN_2088 GBV_ILN_2093 GBV_ILN_2106 GBV_ILN_2107 GBV_ILN_2108 GBV_ILN_2110 GBV_ILN_2111 GBV_ILN_2112 GBV_ILN_2113 GBV_ILN_2118 GBV_ILN_2122 GBV_ILN_2129 GBV_ILN_2143 GBV_ILN_2144 GBV_ILN_2147 GBV_ILN_2148 GBV_ILN_2152 GBV_ILN_2153 GBV_ILN_2188 GBV_ILN_2190 GBV_ILN_2232 GBV_ILN_2336 GBV_ILN_2446 GBV_ILN_2470 GBV_ILN_2472 GBV_ILN_2507 GBV_ILN_2522 GBV_ILN_2548 GBV_ILN_4035 GBV_ILN_4037 GBV_ILN_4046 GBV_ILN_4112 GBV_ILN_4125 GBV_ILN_4126 GBV_ILN_4242 GBV_ILN_4246 GBV_ILN_4249 GBV_ILN_4251 GBV_ILN_4305 GBV_ILN_4306 GBV_ILN_4307 GBV_ILN_4313 GBV_ILN_4322 GBV_ILN_4323 GBV_ILN_4324 GBV_ILN_4325 GBV_ILN_4326 GBV_ILN_4328 GBV_ILN_4333 GBV_ILN_4334 GBV_ILN_4335 GBV_ILN_4336 GBV_ILN_4338 GBV_ILN_4393 GBV_ILN_4700 AR 7 2023 4 16 10 125-137 |
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10.1007/s41635-023-00138-y doi (DE-627)SPR054842999 (SPR)s41635-023-00138-y-e DE-627 ger DE-627 rakwb eng C. G., Gisha verfasserin aut A Novel Physical Unclonable Function Based on Hybrid Current Mirror 2023 Text txt rdacontent Computermedien c rdamedia Online-Ressource cr rdacarrier © The Author(s), under exclusive licence to Springer Nature Switzerland AG 2023. Springer Nature or its licensor (e.g. a society or other partner) holds exclusive rights to this article under a publishing agreement with the author(s) or other rightsholder(s); author self-archiving of the accepted manuscript version of this article is solely governed by the terms of such publishing agreement and applicable law. Abstract Intrinsic manufacturing process variations are extensive, unpredictable, and inevitable in modern semiconductor technology. This is advantageously utilized in physically unclonable function (PUF) circuits for enhancing hardware and software security. Among widely-known PUF variants, the Arbiter PUF based on digital building blocks has a regular structure and low hardware footprint; however, it is susceptible to machine learning-based modeling attacks. In this work, we propose a new low-power and reliable PUF, based on the hybrid current mirror inverter (CMI). The proposed PUF circuit exploits the process variation-induced randomness in the CMI circuits to generate instance-specific challenge-response characteristics. The current mirror ensures the stability of the overdrive voltages across all the transistors in the CMI blocks, thereby improving the reliability of the proposed PUF. The PUF circuit was simulated at a 45 nm CMOS technology node, and its major performance metrics were evaluated. The simulation results demonstrated that the proposed PUF has excellent performance metrics while having low hardware and resource footprint. In addition, the proposed PUF demonstrated robustness against machine learning-based model-building attacks. Hybrid PUF (dpeaa)DE-He213 Current mirror inverter (dpeaa)DE-He213 Delay-based PUF (dpeaa)DE-He213 Inverter circuit (dpeaa)DE-He213 Machine learning attack (dpeaa)DE-He213 Chakraborty, Ananda Sankar aut Chakraborty, Rajat Subhra aut Antony Jose, Bijoy aut Mathew, Jimson aut Enthalten in Journal of hardware and systems security [Cham] : Springer International Publishing, 2017 7(2023), 4 vom: 16. Okt., Seite 125-137 (DE-627)885200780 (DE-600)2892763-1 2509-3436 nnns volume:7 year:2023 number:4 day:16 month:10 pages:125-137 https://dx.doi.org/10.1007/s41635-023-00138-y lizenzpflichtig Volltext GBV_USEFLAG_A SYSFLAG_A GBV_SPRINGER GBV_ILN_11 GBV_ILN_20 GBV_ILN_22 GBV_ILN_23 GBV_ILN_24 GBV_ILN_31 GBV_ILN_32 GBV_ILN_39 GBV_ILN_40 GBV_ILN_60 GBV_ILN_62 GBV_ILN_63 GBV_ILN_65 GBV_ILN_69 GBV_ILN_70 GBV_ILN_73 GBV_ILN_74 GBV_ILN_90 GBV_ILN_95 GBV_ILN_100 GBV_ILN_101 GBV_ILN_105 GBV_ILN_110 GBV_ILN_120 GBV_ILN_138 GBV_ILN_150 GBV_ILN_151 GBV_ILN_152 GBV_ILN_161 GBV_ILN_170 GBV_ILN_171 GBV_ILN_187 GBV_ILN_213 GBV_ILN_224 GBV_ILN_230 GBV_ILN_250 GBV_ILN_266 GBV_ILN_281 GBV_ILN_285 GBV_ILN_293 GBV_ILN_370 GBV_ILN_602 GBV_ILN_636 GBV_ILN_702 GBV_ILN_2001 GBV_ILN_2003 GBV_ILN_2004 GBV_ILN_2005 GBV_ILN_2006 GBV_ILN_2007 GBV_ILN_2008 GBV_ILN_2009 GBV_ILN_2010 GBV_ILN_2011 GBV_ILN_2014 GBV_ILN_2015 GBV_ILN_2020 GBV_ILN_2021 GBV_ILN_2025 GBV_ILN_2026 GBV_ILN_2027 GBV_ILN_2031 GBV_ILN_2034 GBV_ILN_2037 GBV_ILN_2038 GBV_ILN_2039 GBV_ILN_2044 GBV_ILN_2048 GBV_ILN_2049 GBV_ILN_2050 GBV_ILN_2055 GBV_ILN_2056 GBV_ILN_2057 GBV_ILN_2059 GBV_ILN_2061 GBV_ILN_2064 GBV_ILN_2065 GBV_ILN_2068 GBV_ILN_2088 GBV_ILN_2093 GBV_ILN_2106 GBV_ILN_2107 GBV_ILN_2108 GBV_ILN_2110 GBV_ILN_2111 GBV_ILN_2112 GBV_ILN_2113 GBV_ILN_2118 GBV_ILN_2122 GBV_ILN_2129 GBV_ILN_2143 GBV_ILN_2144 GBV_ILN_2147 GBV_ILN_2148 GBV_ILN_2152 GBV_ILN_2153 GBV_ILN_2188 GBV_ILN_2190 GBV_ILN_2232 GBV_ILN_2336 GBV_ILN_2446 GBV_ILN_2470 GBV_ILN_2472 GBV_ILN_2507 GBV_ILN_2522 GBV_ILN_2548 GBV_ILN_4035 GBV_ILN_4037 GBV_ILN_4046 GBV_ILN_4112 GBV_ILN_4125 GBV_ILN_4126 GBV_ILN_4242 GBV_ILN_4246 GBV_ILN_4249 GBV_ILN_4251 GBV_ILN_4305 GBV_ILN_4306 GBV_ILN_4307 GBV_ILN_4313 GBV_ILN_4322 GBV_ILN_4323 GBV_ILN_4324 GBV_ILN_4325 GBV_ILN_4326 GBV_ILN_4328 GBV_ILN_4333 GBV_ILN_4334 GBV_ILN_4335 GBV_ILN_4336 GBV_ILN_4338 GBV_ILN_4393 GBV_ILN_4700 AR 7 2023 4 16 10 125-137 |
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10.1007/s41635-023-00138-y doi (DE-627)SPR054842999 (SPR)s41635-023-00138-y-e DE-627 ger DE-627 rakwb eng C. G., Gisha verfasserin aut A Novel Physical Unclonable Function Based on Hybrid Current Mirror 2023 Text txt rdacontent Computermedien c rdamedia Online-Ressource cr rdacarrier © The Author(s), under exclusive licence to Springer Nature Switzerland AG 2023. Springer Nature or its licensor (e.g. a society or other partner) holds exclusive rights to this article under a publishing agreement with the author(s) or other rightsholder(s); author self-archiving of the accepted manuscript version of this article is solely governed by the terms of such publishing agreement and applicable law. Abstract Intrinsic manufacturing process variations are extensive, unpredictable, and inevitable in modern semiconductor technology. This is advantageously utilized in physically unclonable function (PUF) circuits for enhancing hardware and software security. Among widely-known PUF variants, the Arbiter PUF based on digital building blocks has a regular structure and low hardware footprint; however, it is susceptible to machine learning-based modeling attacks. In this work, we propose a new low-power and reliable PUF, based on the hybrid current mirror inverter (CMI). The proposed PUF circuit exploits the process variation-induced randomness in the CMI circuits to generate instance-specific challenge-response characteristics. The current mirror ensures the stability of the overdrive voltages across all the transistors in the CMI blocks, thereby improving the reliability of the proposed PUF. The PUF circuit was simulated at a 45 nm CMOS technology node, and its major performance metrics were evaluated. The simulation results demonstrated that the proposed PUF has excellent performance metrics while having low hardware and resource footprint. In addition, the proposed PUF demonstrated robustness against machine learning-based model-building attacks. Hybrid PUF (dpeaa)DE-He213 Current mirror inverter (dpeaa)DE-He213 Delay-based PUF (dpeaa)DE-He213 Inverter circuit (dpeaa)DE-He213 Machine learning attack (dpeaa)DE-He213 Chakraborty, Ananda Sankar aut Chakraborty, Rajat Subhra aut Antony Jose, Bijoy aut Mathew, Jimson aut Enthalten in Journal of hardware and systems security [Cham] : Springer International Publishing, 2017 7(2023), 4 vom: 16. Okt., Seite 125-137 (DE-627)885200780 (DE-600)2892763-1 2509-3436 nnns volume:7 year:2023 number:4 day:16 month:10 pages:125-137 https://dx.doi.org/10.1007/s41635-023-00138-y lizenzpflichtig Volltext GBV_USEFLAG_A SYSFLAG_A GBV_SPRINGER GBV_ILN_11 GBV_ILN_20 GBV_ILN_22 GBV_ILN_23 GBV_ILN_24 GBV_ILN_31 GBV_ILN_32 GBV_ILN_39 GBV_ILN_40 GBV_ILN_60 GBV_ILN_62 GBV_ILN_63 GBV_ILN_65 GBV_ILN_69 GBV_ILN_70 GBV_ILN_73 GBV_ILN_74 GBV_ILN_90 GBV_ILN_95 GBV_ILN_100 GBV_ILN_101 GBV_ILN_105 GBV_ILN_110 GBV_ILN_120 GBV_ILN_138 GBV_ILN_150 GBV_ILN_151 GBV_ILN_152 GBV_ILN_161 GBV_ILN_170 GBV_ILN_171 GBV_ILN_187 GBV_ILN_213 GBV_ILN_224 GBV_ILN_230 GBV_ILN_250 GBV_ILN_266 GBV_ILN_281 GBV_ILN_285 GBV_ILN_293 GBV_ILN_370 GBV_ILN_602 GBV_ILN_636 GBV_ILN_702 GBV_ILN_2001 GBV_ILN_2003 GBV_ILN_2004 GBV_ILN_2005 GBV_ILN_2006 GBV_ILN_2007 GBV_ILN_2008 GBV_ILN_2009 GBV_ILN_2010 GBV_ILN_2011 GBV_ILN_2014 GBV_ILN_2015 GBV_ILN_2020 GBV_ILN_2021 GBV_ILN_2025 GBV_ILN_2026 GBV_ILN_2027 GBV_ILN_2031 GBV_ILN_2034 GBV_ILN_2037 GBV_ILN_2038 GBV_ILN_2039 GBV_ILN_2044 GBV_ILN_2048 GBV_ILN_2049 GBV_ILN_2050 GBV_ILN_2055 GBV_ILN_2056 GBV_ILN_2057 GBV_ILN_2059 GBV_ILN_2061 GBV_ILN_2064 GBV_ILN_2065 GBV_ILN_2068 GBV_ILN_2088 GBV_ILN_2093 GBV_ILN_2106 GBV_ILN_2107 GBV_ILN_2108 GBV_ILN_2110 GBV_ILN_2111 GBV_ILN_2112 GBV_ILN_2113 GBV_ILN_2118 GBV_ILN_2122 GBV_ILN_2129 GBV_ILN_2143 GBV_ILN_2144 GBV_ILN_2147 GBV_ILN_2148 GBV_ILN_2152 GBV_ILN_2153 GBV_ILN_2188 GBV_ILN_2190 GBV_ILN_2232 GBV_ILN_2336 GBV_ILN_2446 GBV_ILN_2470 GBV_ILN_2472 GBV_ILN_2507 GBV_ILN_2522 GBV_ILN_2548 GBV_ILN_4035 GBV_ILN_4037 GBV_ILN_4046 GBV_ILN_4112 GBV_ILN_4125 GBV_ILN_4126 GBV_ILN_4242 GBV_ILN_4246 GBV_ILN_4249 GBV_ILN_4251 GBV_ILN_4305 GBV_ILN_4306 GBV_ILN_4307 GBV_ILN_4313 GBV_ILN_4322 GBV_ILN_4323 GBV_ILN_4324 GBV_ILN_4325 GBV_ILN_4326 GBV_ILN_4328 GBV_ILN_4333 GBV_ILN_4334 GBV_ILN_4335 GBV_ILN_4336 GBV_ILN_4338 GBV_ILN_4393 GBV_ILN_4700 AR 7 2023 4 16 10 125-137 |
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10.1007/s41635-023-00138-y doi (DE-627)SPR054842999 (SPR)s41635-023-00138-y-e DE-627 ger DE-627 rakwb eng C. G., Gisha verfasserin aut A Novel Physical Unclonable Function Based on Hybrid Current Mirror 2023 Text txt rdacontent Computermedien c rdamedia Online-Ressource cr rdacarrier © The Author(s), under exclusive licence to Springer Nature Switzerland AG 2023. Springer Nature or its licensor (e.g. a society or other partner) holds exclusive rights to this article under a publishing agreement with the author(s) or other rightsholder(s); author self-archiving of the accepted manuscript version of this article is solely governed by the terms of such publishing agreement and applicable law. Abstract Intrinsic manufacturing process variations are extensive, unpredictable, and inevitable in modern semiconductor technology. This is advantageously utilized in physically unclonable function (PUF) circuits for enhancing hardware and software security. Among widely-known PUF variants, the Arbiter PUF based on digital building blocks has a regular structure and low hardware footprint; however, it is susceptible to machine learning-based modeling attacks. In this work, we propose a new low-power and reliable PUF, based on the hybrid current mirror inverter (CMI). The proposed PUF circuit exploits the process variation-induced randomness in the CMI circuits to generate instance-specific challenge-response characteristics. The current mirror ensures the stability of the overdrive voltages across all the transistors in the CMI blocks, thereby improving the reliability of the proposed PUF. The PUF circuit was simulated at a 45 nm CMOS technology node, and its major performance metrics were evaluated. The simulation results demonstrated that the proposed PUF has excellent performance metrics while having low hardware and resource footprint. In addition, the proposed PUF demonstrated robustness against machine learning-based model-building attacks. Hybrid PUF (dpeaa)DE-He213 Current mirror inverter (dpeaa)DE-He213 Delay-based PUF (dpeaa)DE-He213 Inverter circuit (dpeaa)DE-He213 Machine learning attack (dpeaa)DE-He213 Chakraborty, Ananda Sankar aut Chakraborty, Rajat Subhra aut Antony Jose, Bijoy aut Mathew, Jimson aut Enthalten in Journal of hardware and systems security [Cham] : Springer International Publishing, 2017 7(2023), 4 vom: 16. Okt., Seite 125-137 (DE-627)885200780 (DE-600)2892763-1 2509-3436 nnns volume:7 year:2023 number:4 day:16 month:10 pages:125-137 https://dx.doi.org/10.1007/s41635-023-00138-y lizenzpflichtig Volltext GBV_USEFLAG_A SYSFLAG_A GBV_SPRINGER GBV_ILN_11 GBV_ILN_20 GBV_ILN_22 GBV_ILN_23 GBV_ILN_24 GBV_ILN_31 GBV_ILN_32 GBV_ILN_39 GBV_ILN_40 GBV_ILN_60 GBV_ILN_62 GBV_ILN_63 GBV_ILN_65 GBV_ILN_69 GBV_ILN_70 GBV_ILN_73 GBV_ILN_74 GBV_ILN_90 GBV_ILN_95 GBV_ILN_100 GBV_ILN_101 GBV_ILN_105 GBV_ILN_110 GBV_ILN_120 GBV_ILN_138 GBV_ILN_150 GBV_ILN_151 GBV_ILN_152 GBV_ILN_161 GBV_ILN_170 GBV_ILN_171 GBV_ILN_187 GBV_ILN_213 GBV_ILN_224 GBV_ILN_230 GBV_ILN_250 GBV_ILN_266 GBV_ILN_281 GBV_ILN_285 GBV_ILN_293 GBV_ILN_370 GBV_ILN_602 GBV_ILN_636 GBV_ILN_702 GBV_ILN_2001 GBV_ILN_2003 GBV_ILN_2004 GBV_ILN_2005 GBV_ILN_2006 GBV_ILN_2007 GBV_ILN_2008 GBV_ILN_2009 GBV_ILN_2010 GBV_ILN_2011 GBV_ILN_2014 GBV_ILN_2015 GBV_ILN_2020 GBV_ILN_2021 GBV_ILN_2025 GBV_ILN_2026 GBV_ILN_2027 GBV_ILN_2031 GBV_ILN_2034 GBV_ILN_2037 GBV_ILN_2038 GBV_ILN_2039 GBV_ILN_2044 GBV_ILN_2048 GBV_ILN_2049 GBV_ILN_2050 GBV_ILN_2055 GBV_ILN_2056 GBV_ILN_2057 GBV_ILN_2059 GBV_ILN_2061 GBV_ILN_2064 GBV_ILN_2065 GBV_ILN_2068 GBV_ILN_2088 GBV_ILN_2093 GBV_ILN_2106 GBV_ILN_2107 GBV_ILN_2108 GBV_ILN_2110 GBV_ILN_2111 GBV_ILN_2112 GBV_ILN_2113 GBV_ILN_2118 GBV_ILN_2122 GBV_ILN_2129 GBV_ILN_2143 GBV_ILN_2144 GBV_ILN_2147 GBV_ILN_2148 GBV_ILN_2152 GBV_ILN_2153 GBV_ILN_2188 GBV_ILN_2190 GBV_ILN_2232 GBV_ILN_2336 GBV_ILN_2446 GBV_ILN_2470 GBV_ILN_2472 GBV_ILN_2507 GBV_ILN_2522 GBV_ILN_2548 GBV_ILN_4035 GBV_ILN_4037 GBV_ILN_4046 GBV_ILN_4112 GBV_ILN_4125 GBV_ILN_4126 GBV_ILN_4242 GBV_ILN_4246 GBV_ILN_4249 GBV_ILN_4251 GBV_ILN_4305 GBV_ILN_4306 GBV_ILN_4307 GBV_ILN_4313 GBV_ILN_4322 GBV_ILN_4323 GBV_ILN_4324 GBV_ILN_4325 GBV_ILN_4326 GBV_ILN_4328 GBV_ILN_4333 GBV_ILN_4334 GBV_ILN_4335 GBV_ILN_4336 GBV_ILN_4338 GBV_ILN_4393 GBV_ILN_4700 AR 7 2023 4 16 10 125-137 |
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C. G., Gisha @@aut@@ Chakraborty, Ananda Sankar @@aut@@ Chakraborty, Rajat Subhra @@aut@@ Antony Jose, Bijoy @@aut@@ Mathew, Jimson @@aut@@ |
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C. G., Gisha |
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C. G., Gisha misc Hybrid PUF misc Current mirror inverter misc Delay-based PUF misc Inverter circuit misc Machine learning attack A Novel Physical Unclonable Function Based on Hybrid Current Mirror |
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A Novel Physical Unclonable Function Based on Hybrid Current Mirror Hybrid PUF (dpeaa)DE-He213 Current mirror inverter (dpeaa)DE-He213 Delay-based PUF (dpeaa)DE-He213 Inverter circuit (dpeaa)DE-He213 Machine learning attack (dpeaa)DE-He213 |
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novel physical unclonable function based on hybrid current mirror |
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A Novel Physical Unclonable Function Based on Hybrid Current Mirror |
| abstract |
Abstract Intrinsic manufacturing process variations are extensive, unpredictable, and inevitable in modern semiconductor technology. This is advantageously utilized in physically unclonable function (PUF) circuits for enhancing hardware and software security. Among widely-known PUF variants, the Arbiter PUF based on digital building blocks has a regular structure and low hardware footprint; however, it is susceptible to machine learning-based modeling attacks. In this work, we propose a new low-power and reliable PUF, based on the hybrid current mirror inverter (CMI). The proposed PUF circuit exploits the process variation-induced randomness in the CMI circuits to generate instance-specific challenge-response characteristics. The current mirror ensures the stability of the overdrive voltages across all the transistors in the CMI blocks, thereby improving the reliability of the proposed PUF. The PUF circuit was simulated at a 45 nm CMOS technology node, and its major performance metrics were evaluated. The simulation results demonstrated that the proposed PUF has excellent performance metrics while having low hardware and resource footprint. In addition, the proposed PUF demonstrated robustness against machine learning-based model-building attacks. © The Author(s), under exclusive licence to Springer Nature Switzerland AG 2023. Springer Nature or its licensor (e.g. a society or other partner) holds exclusive rights to this article under a publishing agreement with the author(s) or other rightsholder(s); author self-archiving of the accepted manuscript version of this article is solely governed by the terms of such publishing agreement and applicable law. |
| abstractGer |
Abstract Intrinsic manufacturing process variations are extensive, unpredictable, and inevitable in modern semiconductor technology. This is advantageously utilized in physically unclonable function (PUF) circuits for enhancing hardware and software security. Among widely-known PUF variants, the Arbiter PUF based on digital building blocks has a regular structure and low hardware footprint; however, it is susceptible to machine learning-based modeling attacks. In this work, we propose a new low-power and reliable PUF, based on the hybrid current mirror inverter (CMI). The proposed PUF circuit exploits the process variation-induced randomness in the CMI circuits to generate instance-specific challenge-response characteristics. The current mirror ensures the stability of the overdrive voltages across all the transistors in the CMI blocks, thereby improving the reliability of the proposed PUF. The PUF circuit was simulated at a 45 nm CMOS technology node, and its major performance metrics were evaluated. The simulation results demonstrated that the proposed PUF has excellent performance metrics while having low hardware and resource footprint. In addition, the proposed PUF demonstrated robustness against machine learning-based model-building attacks. © The Author(s), under exclusive licence to Springer Nature Switzerland AG 2023. Springer Nature or its licensor (e.g. a society or other partner) holds exclusive rights to this article under a publishing agreement with the author(s) or other rightsholder(s); author self-archiving of the accepted manuscript version of this article is solely governed by the terms of such publishing agreement and applicable law. |
| abstract_unstemmed |
Abstract Intrinsic manufacturing process variations are extensive, unpredictable, and inevitable in modern semiconductor technology. This is advantageously utilized in physically unclonable function (PUF) circuits for enhancing hardware and software security. Among widely-known PUF variants, the Arbiter PUF based on digital building blocks has a regular structure and low hardware footprint; however, it is susceptible to machine learning-based modeling attacks. In this work, we propose a new low-power and reliable PUF, based on the hybrid current mirror inverter (CMI). The proposed PUF circuit exploits the process variation-induced randomness in the CMI circuits to generate instance-specific challenge-response characteristics. The current mirror ensures the stability of the overdrive voltages across all the transistors in the CMI blocks, thereby improving the reliability of the proposed PUF. The PUF circuit was simulated at a 45 nm CMOS technology node, and its major performance metrics were evaluated. The simulation results demonstrated that the proposed PUF has excellent performance metrics while having low hardware and resource footprint. In addition, the proposed PUF demonstrated robustness against machine learning-based model-building attacks. © The Author(s), under exclusive licence to Springer Nature Switzerland AG 2023. Springer Nature or its licensor (e.g. a society or other partner) holds exclusive rights to this article under a publishing agreement with the author(s) or other rightsholder(s); author self-archiving of the accepted manuscript version of this article is solely governed by the terms of such publishing agreement and applicable law. |
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A Novel Physical Unclonable Function Based on Hybrid Current Mirror |
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https://dx.doi.org/10.1007/s41635-023-00138-y |
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Chakraborty, Ananda Sankar Chakraborty, Rajat Subhra Antony Jose, Bijoy Mathew, Jimson |
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Chakraborty, Ananda Sankar Chakraborty, Rajat Subhra Antony Jose, Bijoy Mathew, Jimson |
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10.1007/s41635-023-00138-y |
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2024-07-04T03:13:57.116Z |
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| score |
7.397746 |