An 11-bit Nyquist SAR-VCO Hybrid ADC with a Reused Ring-VCO for Power Reduction
Abstract An 11-bit, power efficiency, two-stage SAR-voltage-controlled oscillator (VCO) hybrid ADC is proposed in this work. Taking full advantage of the voltage-to-phase and voltage-to-frequency characteristics, the reused ring-VCO circuit acts as not only a time-domain comparator with the phase de...
Ausführliche Beschreibung
Autor*in: |
Xin, Xin [verfasserIn] |
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E-Artikel |
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Sprache: |
Englisch |
Erschienen: |
2023 |
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Anmerkung: |
© The Author(s), under exclusive licence to Springer Science+Business Media, LLC, part of Springer Nature 2023. Springer Nature or its licensor (e.g. a society or other partner) holds exclusive rights to this article under a publishing agreement with the author(s) or other rightsholder(s); author self-archiving of the accepted manuscript version of this article is solely governed by the terms of such publishing agreement and applicable law. |
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Übergeordnetes Werk: |
Enthalten in: Circuits, systems and signal processing - Boston, Mass. : Birkhäuser, 1982, 43(2023), 3 vom: 24. Okt., Seite 1339-1365 |
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Übergeordnetes Werk: |
volume:43 ; year:2023 ; number:3 ; day:24 ; month:10 ; pages:1339-1365 |
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DOI / URN: |
10.1007/s00034-023-02531-y |
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Katalog-ID: |
SPR054896673 |
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520 | |a Abstract An 11-bit, power efficiency, two-stage SAR-voltage-controlled oscillator (VCO) hybrid ADC is proposed in this work. Taking full advantage of the voltage-to-phase and voltage-to-frequency characteristics, the reused ring-VCO circuit acts as not only a time-domain comparator with the phase detector assistance for low power consumption in the first SAR stage but also a fine quantizer in the second stage. More importantly, the gain nonlinearity of the VCO can be effectively suppressed due to the small residue voltage after the coarse quantization. In addition, the VCO-based ADC (except for the ring-VCO circuit) only works in the quantization phase instead of the whole conversion period. As a result, the power consumption and area of the comparator in the previous SAR-VCO ∆Σ ADC can be thoroughly avoided. Besides, compared to an 11-bit SAR ADC, the capacitor mismatch can be relaxed theoretically by 2 × in the identical capacitor array area. Post-simulation results demonstrate that the proposed ADC in a 0.18 μm CMOS process exhibits a signal-to-noise and distortion ratio (SNDR) of 63.8 dB, and it dissipates 2.1 μW power from a 0.6 V supply with a sampling rate of 50 kS/s and a Nyquist input rate. To the author's knowledge, the hybrid ADC can achieve the best Walden figure of merit ($ FoM_{w} $) of 33.3 fJ/conversion-step compared with the previous SAR-VCO hybrid ADC, and its active area is only 0.109 $ mm^{2} $. | ||
650 | 4 | |a SAR ADC |7 (dpeaa)DE-He213 | |
650 | 4 | |a VCO-based ADC |7 (dpeaa)DE-He213 | |
650 | 4 | |a Reused ring-VCO circuit |7 (dpeaa)DE-He213 | |
650 | 4 | |a Low supply |7 (dpeaa)DE-He213 | |
650 | 4 | |a Power efficiency |7 (dpeaa)DE-He213 | |
700 | 1 | |a Zhang, Chang |4 aut | |
700 | 1 | |a Tong, Xingyuan |0 (orcid)0000-0002-0697-1049 |4 aut | |
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10.1007/s00034-023-02531-y doi (DE-627)SPR054896673 (SPR)s00034-023-02531-y-e DE-627 ger DE-627 rakwb eng Xin, Xin verfasserin aut An 11-bit Nyquist SAR-VCO Hybrid ADC with a Reused Ring-VCO for Power Reduction 2023 Text txt rdacontent Computermedien c rdamedia Online-Ressource cr rdacarrier © The Author(s), under exclusive licence to Springer Science+Business Media, LLC, part of Springer Nature 2023. Springer Nature or its licensor (e.g. a society or other partner) holds exclusive rights to this article under a publishing agreement with the author(s) or other rightsholder(s); author self-archiving of the accepted manuscript version of this article is solely governed by the terms of such publishing agreement and applicable law. Abstract An 11-bit, power efficiency, two-stage SAR-voltage-controlled oscillator (VCO) hybrid ADC is proposed in this work. Taking full advantage of the voltage-to-phase and voltage-to-frequency characteristics, the reused ring-VCO circuit acts as not only a time-domain comparator with the phase detector assistance for low power consumption in the first SAR stage but also a fine quantizer in the second stage. More importantly, the gain nonlinearity of the VCO can be effectively suppressed due to the small residue voltage after the coarse quantization. In addition, the VCO-based ADC (except for the ring-VCO circuit) only works in the quantization phase instead of the whole conversion period. As a result, the power consumption and area of the comparator in the previous SAR-VCO ∆Σ ADC can be thoroughly avoided. Besides, compared to an 11-bit SAR ADC, the capacitor mismatch can be relaxed theoretically by 2 × in the identical capacitor array area. Post-simulation results demonstrate that the proposed ADC in a 0.18 μm CMOS process exhibits a signal-to-noise and distortion ratio (SNDR) of 63.8 dB, and it dissipates 2.1 μW power from a 0.6 V supply with a sampling rate of 50 kS/s and a Nyquist input rate. To the author's knowledge, the hybrid ADC can achieve the best Walden figure of merit ($ FoM_{w} $) of 33.3 fJ/conversion-step compared with the previous SAR-VCO hybrid ADC, and its active area is only 0.109 $ mm^{2} $. SAR ADC (dpeaa)DE-He213 VCO-based ADC (dpeaa)DE-He213 Reused ring-VCO circuit (dpeaa)DE-He213 Low supply (dpeaa)DE-He213 Power efficiency (dpeaa)DE-He213 Zhang, Chang aut Tong, Xingyuan (orcid)0000-0002-0697-1049 aut Enthalten in Circuits, systems and signal processing Boston, Mass. : Birkhäuser, 1982 43(2023), 3 vom: 24. Okt., Seite 1339-1365 (DE-627)351975470 (DE-600)2085136-4 1531-5878 nnns volume:43 year:2023 number:3 day:24 month:10 pages:1339-1365 https://dx.doi.org/10.1007/s00034-023-02531-y lizenzpflichtig Volltext GBV_USEFLAG_A SYSFLAG_A GBV_SPRINGER GBV_ILN_11 GBV_ILN_20 GBV_ILN_22 GBV_ILN_23 GBV_ILN_24 GBV_ILN_31 GBV_ILN_32 GBV_ILN_39 GBV_ILN_40 GBV_ILN_60 GBV_ILN_62 GBV_ILN_63 GBV_ILN_69 GBV_ILN_70 GBV_ILN_73 GBV_ILN_74 GBV_ILN_90 GBV_ILN_95 GBV_ILN_100 GBV_ILN_105 GBV_ILN_110 GBV_ILN_120 GBV_ILN_138 GBV_ILN_150 GBV_ILN_151 GBV_ILN_152 GBV_ILN_161 GBV_ILN_170 GBV_ILN_171 GBV_ILN_187 GBV_ILN_213 GBV_ILN_224 GBV_ILN_230 GBV_ILN_250 GBV_ILN_267 GBV_ILN_281 GBV_ILN_285 GBV_ILN_293 GBV_ILN_370 GBV_ILN_602 GBV_ILN_636 GBV_ILN_702 GBV_ILN_2001 GBV_ILN_2003 GBV_ILN_2004 GBV_ILN_2005 GBV_ILN_2006 GBV_ILN_2007 GBV_ILN_2008 GBV_ILN_2009 GBV_ILN_2010 GBV_ILN_2011 GBV_ILN_2014 GBV_ILN_2015 GBV_ILN_2020 GBV_ILN_2021 GBV_ILN_2025 GBV_ILN_2026 GBV_ILN_2027 GBV_ILN_2031 GBV_ILN_2034 GBV_ILN_2037 GBV_ILN_2038 GBV_ILN_2039 GBV_ILN_2044 GBV_ILN_2048 GBV_ILN_2049 GBV_ILN_2050 GBV_ILN_2055 GBV_ILN_2056 GBV_ILN_2057 GBV_ILN_2059 GBV_ILN_2061 GBV_ILN_2064 GBV_ILN_2065 GBV_ILN_2068 GBV_ILN_2088 GBV_ILN_2093 GBV_ILN_2106 GBV_ILN_2107 GBV_ILN_2108 GBV_ILN_2110 GBV_ILN_2111 GBV_ILN_2112 GBV_ILN_2113 GBV_ILN_2118 GBV_ILN_2119 GBV_ILN_2122 GBV_ILN_2129 GBV_ILN_2143 GBV_ILN_2144 GBV_ILN_2147 GBV_ILN_2148 GBV_ILN_2152 GBV_ILN_2153 GBV_ILN_2188 GBV_ILN_2190 GBV_ILN_2232 GBV_ILN_2336 GBV_ILN_2446 GBV_ILN_2470 GBV_ILN_2472 GBV_ILN_2507 GBV_ILN_2522 GBV_ILN_2548 GBV_ILN_4035 GBV_ILN_4037 GBV_ILN_4046 GBV_ILN_4112 GBV_ILN_4125 GBV_ILN_4126 GBV_ILN_4242 GBV_ILN_4246 GBV_ILN_4249 GBV_ILN_4251 GBV_ILN_4305 GBV_ILN_4306 GBV_ILN_4307 GBV_ILN_4313 GBV_ILN_4322 GBV_ILN_4323 GBV_ILN_4324 GBV_ILN_4325 GBV_ILN_4326 GBV_ILN_4328 GBV_ILN_4333 GBV_ILN_4334 GBV_ILN_4335 GBV_ILN_4336 GBV_ILN_4338 GBV_ILN_4393 GBV_ILN_4700 AR 43 2023 3 24 10 1339-1365 |
spelling |
10.1007/s00034-023-02531-y doi (DE-627)SPR054896673 (SPR)s00034-023-02531-y-e DE-627 ger DE-627 rakwb eng Xin, Xin verfasserin aut An 11-bit Nyquist SAR-VCO Hybrid ADC with a Reused Ring-VCO for Power Reduction 2023 Text txt rdacontent Computermedien c rdamedia Online-Ressource cr rdacarrier © The Author(s), under exclusive licence to Springer Science+Business Media, LLC, part of Springer Nature 2023. Springer Nature or its licensor (e.g. a society or other partner) holds exclusive rights to this article under a publishing agreement with the author(s) or other rightsholder(s); author self-archiving of the accepted manuscript version of this article is solely governed by the terms of such publishing agreement and applicable law. Abstract An 11-bit, power efficiency, two-stage SAR-voltage-controlled oscillator (VCO) hybrid ADC is proposed in this work. Taking full advantage of the voltage-to-phase and voltage-to-frequency characteristics, the reused ring-VCO circuit acts as not only a time-domain comparator with the phase detector assistance for low power consumption in the first SAR stage but also a fine quantizer in the second stage. More importantly, the gain nonlinearity of the VCO can be effectively suppressed due to the small residue voltage after the coarse quantization. In addition, the VCO-based ADC (except for the ring-VCO circuit) only works in the quantization phase instead of the whole conversion period. As a result, the power consumption and area of the comparator in the previous SAR-VCO ∆Σ ADC can be thoroughly avoided. Besides, compared to an 11-bit SAR ADC, the capacitor mismatch can be relaxed theoretically by 2 × in the identical capacitor array area. Post-simulation results demonstrate that the proposed ADC in a 0.18 μm CMOS process exhibits a signal-to-noise and distortion ratio (SNDR) of 63.8 dB, and it dissipates 2.1 μW power from a 0.6 V supply with a sampling rate of 50 kS/s and a Nyquist input rate. To the author's knowledge, the hybrid ADC can achieve the best Walden figure of merit ($ FoM_{w} $) of 33.3 fJ/conversion-step compared with the previous SAR-VCO hybrid ADC, and its active area is only 0.109 $ mm^{2} $. SAR ADC (dpeaa)DE-He213 VCO-based ADC (dpeaa)DE-He213 Reused ring-VCO circuit (dpeaa)DE-He213 Low supply (dpeaa)DE-He213 Power efficiency (dpeaa)DE-He213 Zhang, Chang aut Tong, Xingyuan (orcid)0000-0002-0697-1049 aut Enthalten in Circuits, systems and signal processing Boston, Mass. : Birkhäuser, 1982 43(2023), 3 vom: 24. Okt., Seite 1339-1365 (DE-627)351975470 (DE-600)2085136-4 1531-5878 nnns volume:43 year:2023 number:3 day:24 month:10 pages:1339-1365 https://dx.doi.org/10.1007/s00034-023-02531-y lizenzpflichtig Volltext GBV_USEFLAG_A SYSFLAG_A GBV_SPRINGER GBV_ILN_11 GBV_ILN_20 GBV_ILN_22 GBV_ILN_23 GBV_ILN_24 GBV_ILN_31 GBV_ILN_32 GBV_ILN_39 GBV_ILN_40 GBV_ILN_60 GBV_ILN_62 GBV_ILN_63 GBV_ILN_69 GBV_ILN_70 GBV_ILN_73 GBV_ILN_74 GBV_ILN_90 GBV_ILN_95 GBV_ILN_100 GBV_ILN_105 GBV_ILN_110 GBV_ILN_120 GBV_ILN_138 GBV_ILN_150 GBV_ILN_151 GBV_ILN_152 GBV_ILN_161 GBV_ILN_170 GBV_ILN_171 GBV_ILN_187 GBV_ILN_213 GBV_ILN_224 GBV_ILN_230 GBV_ILN_250 GBV_ILN_267 GBV_ILN_281 GBV_ILN_285 GBV_ILN_293 GBV_ILN_370 GBV_ILN_602 GBV_ILN_636 GBV_ILN_702 GBV_ILN_2001 GBV_ILN_2003 GBV_ILN_2004 GBV_ILN_2005 GBV_ILN_2006 GBV_ILN_2007 GBV_ILN_2008 GBV_ILN_2009 GBV_ILN_2010 GBV_ILN_2011 GBV_ILN_2014 GBV_ILN_2015 GBV_ILN_2020 GBV_ILN_2021 GBV_ILN_2025 GBV_ILN_2026 GBV_ILN_2027 GBV_ILN_2031 GBV_ILN_2034 GBV_ILN_2037 GBV_ILN_2038 GBV_ILN_2039 GBV_ILN_2044 GBV_ILN_2048 GBV_ILN_2049 GBV_ILN_2050 GBV_ILN_2055 GBV_ILN_2056 GBV_ILN_2057 GBV_ILN_2059 GBV_ILN_2061 GBV_ILN_2064 GBV_ILN_2065 GBV_ILN_2068 GBV_ILN_2088 GBV_ILN_2093 GBV_ILN_2106 GBV_ILN_2107 GBV_ILN_2108 GBV_ILN_2110 GBV_ILN_2111 GBV_ILN_2112 GBV_ILN_2113 GBV_ILN_2118 GBV_ILN_2119 GBV_ILN_2122 GBV_ILN_2129 GBV_ILN_2143 GBV_ILN_2144 GBV_ILN_2147 GBV_ILN_2148 GBV_ILN_2152 GBV_ILN_2153 GBV_ILN_2188 GBV_ILN_2190 GBV_ILN_2232 GBV_ILN_2336 GBV_ILN_2446 GBV_ILN_2470 GBV_ILN_2472 GBV_ILN_2507 GBV_ILN_2522 GBV_ILN_2548 GBV_ILN_4035 GBV_ILN_4037 GBV_ILN_4046 GBV_ILN_4112 GBV_ILN_4125 GBV_ILN_4126 GBV_ILN_4242 GBV_ILN_4246 GBV_ILN_4249 GBV_ILN_4251 GBV_ILN_4305 GBV_ILN_4306 GBV_ILN_4307 GBV_ILN_4313 GBV_ILN_4322 GBV_ILN_4323 GBV_ILN_4324 GBV_ILN_4325 GBV_ILN_4326 GBV_ILN_4328 GBV_ILN_4333 GBV_ILN_4334 GBV_ILN_4335 GBV_ILN_4336 GBV_ILN_4338 GBV_ILN_4393 GBV_ILN_4700 AR 43 2023 3 24 10 1339-1365 |
allfields_unstemmed |
10.1007/s00034-023-02531-y doi (DE-627)SPR054896673 (SPR)s00034-023-02531-y-e DE-627 ger DE-627 rakwb eng Xin, Xin verfasserin aut An 11-bit Nyquist SAR-VCO Hybrid ADC with a Reused Ring-VCO for Power Reduction 2023 Text txt rdacontent Computermedien c rdamedia Online-Ressource cr rdacarrier © The Author(s), under exclusive licence to Springer Science+Business Media, LLC, part of Springer Nature 2023. Springer Nature or its licensor (e.g. a society or other partner) holds exclusive rights to this article under a publishing agreement with the author(s) or other rightsholder(s); author self-archiving of the accepted manuscript version of this article is solely governed by the terms of such publishing agreement and applicable law. Abstract An 11-bit, power efficiency, two-stage SAR-voltage-controlled oscillator (VCO) hybrid ADC is proposed in this work. Taking full advantage of the voltage-to-phase and voltage-to-frequency characteristics, the reused ring-VCO circuit acts as not only a time-domain comparator with the phase detector assistance for low power consumption in the first SAR stage but also a fine quantizer in the second stage. More importantly, the gain nonlinearity of the VCO can be effectively suppressed due to the small residue voltage after the coarse quantization. In addition, the VCO-based ADC (except for the ring-VCO circuit) only works in the quantization phase instead of the whole conversion period. As a result, the power consumption and area of the comparator in the previous SAR-VCO ∆Σ ADC can be thoroughly avoided. Besides, compared to an 11-bit SAR ADC, the capacitor mismatch can be relaxed theoretically by 2 × in the identical capacitor array area. Post-simulation results demonstrate that the proposed ADC in a 0.18 μm CMOS process exhibits a signal-to-noise and distortion ratio (SNDR) of 63.8 dB, and it dissipates 2.1 μW power from a 0.6 V supply with a sampling rate of 50 kS/s and a Nyquist input rate. To the author's knowledge, the hybrid ADC can achieve the best Walden figure of merit ($ FoM_{w} $) of 33.3 fJ/conversion-step compared with the previous SAR-VCO hybrid ADC, and its active area is only 0.109 $ mm^{2} $. SAR ADC (dpeaa)DE-He213 VCO-based ADC (dpeaa)DE-He213 Reused ring-VCO circuit (dpeaa)DE-He213 Low supply (dpeaa)DE-He213 Power efficiency (dpeaa)DE-He213 Zhang, Chang aut Tong, Xingyuan (orcid)0000-0002-0697-1049 aut Enthalten in Circuits, systems and signal processing Boston, Mass. : Birkhäuser, 1982 43(2023), 3 vom: 24. Okt., Seite 1339-1365 (DE-627)351975470 (DE-600)2085136-4 1531-5878 nnns volume:43 year:2023 number:3 day:24 month:10 pages:1339-1365 https://dx.doi.org/10.1007/s00034-023-02531-y lizenzpflichtig Volltext GBV_USEFLAG_A SYSFLAG_A GBV_SPRINGER GBV_ILN_11 GBV_ILN_20 GBV_ILN_22 GBV_ILN_23 GBV_ILN_24 GBV_ILN_31 GBV_ILN_32 GBV_ILN_39 GBV_ILN_40 GBV_ILN_60 GBV_ILN_62 GBV_ILN_63 GBV_ILN_69 GBV_ILN_70 GBV_ILN_73 GBV_ILN_74 GBV_ILN_90 GBV_ILN_95 GBV_ILN_100 GBV_ILN_105 GBV_ILN_110 GBV_ILN_120 GBV_ILN_138 GBV_ILN_150 GBV_ILN_151 GBV_ILN_152 GBV_ILN_161 GBV_ILN_170 GBV_ILN_171 GBV_ILN_187 GBV_ILN_213 GBV_ILN_224 GBV_ILN_230 GBV_ILN_250 GBV_ILN_267 GBV_ILN_281 GBV_ILN_285 GBV_ILN_293 GBV_ILN_370 GBV_ILN_602 GBV_ILN_636 GBV_ILN_702 GBV_ILN_2001 GBV_ILN_2003 GBV_ILN_2004 GBV_ILN_2005 GBV_ILN_2006 GBV_ILN_2007 GBV_ILN_2008 GBV_ILN_2009 GBV_ILN_2010 GBV_ILN_2011 GBV_ILN_2014 GBV_ILN_2015 GBV_ILN_2020 GBV_ILN_2021 GBV_ILN_2025 GBV_ILN_2026 GBV_ILN_2027 GBV_ILN_2031 GBV_ILN_2034 GBV_ILN_2037 GBV_ILN_2038 GBV_ILN_2039 GBV_ILN_2044 GBV_ILN_2048 GBV_ILN_2049 GBV_ILN_2050 GBV_ILN_2055 GBV_ILN_2056 GBV_ILN_2057 GBV_ILN_2059 GBV_ILN_2061 GBV_ILN_2064 GBV_ILN_2065 GBV_ILN_2068 GBV_ILN_2088 GBV_ILN_2093 GBV_ILN_2106 GBV_ILN_2107 GBV_ILN_2108 GBV_ILN_2110 GBV_ILN_2111 GBV_ILN_2112 GBV_ILN_2113 GBV_ILN_2118 GBV_ILN_2119 GBV_ILN_2122 GBV_ILN_2129 GBV_ILN_2143 GBV_ILN_2144 GBV_ILN_2147 GBV_ILN_2148 GBV_ILN_2152 GBV_ILN_2153 GBV_ILN_2188 GBV_ILN_2190 GBV_ILN_2232 GBV_ILN_2336 GBV_ILN_2446 GBV_ILN_2470 GBV_ILN_2472 GBV_ILN_2507 GBV_ILN_2522 GBV_ILN_2548 GBV_ILN_4035 GBV_ILN_4037 GBV_ILN_4046 GBV_ILN_4112 GBV_ILN_4125 GBV_ILN_4126 GBV_ILN_4242 GBV_ILN_4246 GBV_ILN_4249 GBV_ILN_4251 GBV_ILN_4305 GBV_ILN_4306 GBV_ILN_4307 GBV_ILN_4313 GBV_ILN_4322 GBV_ILN_4323 GBV_ILN_4324 GBV_ILN_4325 GBV_ILN_4326 GBV_ILN_4328 GBV_ILN_4333 GBV_ILN_4334 GBV_ILN_4335 GBV_ILN_4336 GBV_ILN_4338 GBV_ILN_4393 GBV_ILN_4700 AR 43 2023 3 24 10 1339-1365 |
allfieldsGer |
10.1007/s00034-023-02531-y doi (DE-627)SPR054896673 (SPR)s00034-023-02531-y-e DE-627 ger DE-627 rakwb eng Xin, Xin verfasserin aut An 11-bit Nyquist SAR-VCO Hybrid ADC with a Reused Ring-VCO for Power Reduction 2023 Text txt rdacontent Computermedien c rdamedia Online-Ressource cr rdacarrier © The Author(s), under exclusive licence to Springer Science+Business Media, LLC, part of Springer Nature 2023. Springer Nature or its licensor (e.g. a society or other partner) holds exclusive rights to this article under a publishing agreement with the author(s) or other rightsholder(s); author self-archiving of the accepted manuscript version of this article is solely governed by the terms of such publishing agreement and applicable law. Abstract An 11-bit, power efficiency, two-stage SAR-voltage-controlled oscillator (VCO) hybrid ADC is proposed in this work. Taking full advantage of the voltage-to-phase and voltage-to-frequency characteristics, the reused ring-VCO circuit acts as not only a time-domain comparator with the phase detector assistance for low power consumption in the first SAR stage but also a fine quantizer in the second stage. More importantly, the gain nonlinearity of the VCO can be effectively suppressed due to the small residue voltage after the coarse quantization. In addition, the VCO-based ADC (except for the ring-VCO circuit) only works in the quantization phase instead of the whole conversion period. As a result, the power consumption and area of the comparator in the previous SAR-VCO ∆Σ ADC can be thoroughly avoided. Besides, compared to an 11-bit SAR ADC, the capacitor mismatch can be relaxed theoretically by 2 × in the identical capacitor array area. Post-simulation results demonstrate that the proposed ADC in a 0.18 μm CMOS process exhibits a signal-to-noise and distortion ratio (SNDR) of 63.8 dB, and it dissipates 2.1 μW power from a 0.6 V supply with a sampling rate of 50 kS/s and a Nyquist input rate. To the author's knowledge, the hybrid ADC can achieve the best Walden figure of merit ($ FoM_{w} $) of 33.3 fJ/conversion-step compared with the previous SAR-VCO hybrid ADC, and its active area is only 0.109 $ mm^{2} $. SAR ADC (dpeaa)DE-He213 VCO-based ADC (dpeaa)DE-He213 Reused ring-VCO circuit (dpeaa)DE-He213 Low supply (dpeaa)DE-He213 Power efficiency (dpeaa)DE-He213 Zhang, Chang aut Tong, Xingyuan (orcid)0000-0002-0697-1049 aut Enthalten in Circuits, systems and signal processing Boston, Mass. : Birkhäuser, 1982 43(2023), 3 vom: 24. Okt., Seite 1339-1365 (DE-627)351975470 (DE-600)2085136-4 1531-5878 nnns volume:43 year:2023 number:3 day:24 month:10 pages:1339-1365 https://dx.doi.org/10.1007/s00034-023-02531-y lizenzpflichtig Volltext GBV_USEFLAG_A SYSFLAG_A GBV_SPRINGER GBV_ILN_11 GBV_ILN_20 GBV_ILN_22 GBV_ILN_23 GBV_ILN_24 GBV_ILN_31 GBV_ILN_32 GBV_ILN_39 GBV_ILN_40 GBV_ILN_60 GBV_ILN_62 GBV_ILN_63 GBV_ILN_69 GBV_ILN_70 GBV_ILN_73 GBV_ILN_74 GBV_ILN_90 GBV_ILN_95 GBV_ILN_100 GBV_ILN_105 GBV_ILN_110 GBV_ILN_120 GBV_ILN_138 GBV_ILN_150 GBV_ILN_151 GBV_ILN_152 GBV_ILN_161 GBV_ILN_170 GBV_ILN_171 GBV_ILN_187 GBV_ILN_213 GBV_ILN_224 GBV_ILN_230 GBV_ILN_250 GBV_ILN_267 GBV_ILN_281 GBV_ILN_285 GBV_ILN_293 GBV_ILN_370 GBV_ILN_602 GBV_ILN_636 GBV_ILN_702 GBV_ILN_2001 GBV_ILN_2003 GBV_ILN_2004 GBV_ILN_2005 GBV_ILN_2006 GBV_ILN_2007 GBV_ILN_2008 GBV_ILN_2009 GBV_ILN_2010 GBV_ILN_2011 GBV_ILN_2014 GBV_ILN_2015 GBV_ILN_2020 GBV_ILN_2021 GBV_ILN_2025 GBV_ILN_2026 GBV_ILN_2027 GBV_ILN_2031 GBV_ILN_2034 GBV_ILN_2037 GBV_ILN_2038 GBV_ILN_2039 GBV_ILN_2044 GBV_ILN_2048 GBV_ILN_2049 GBV_ILN_2050 GBV_ILN_2055 GBV_ILN_2056 GBV_ILN_2057 GBV_ILN_2059 GBV_ILN_2061 GBV_ILN_2064 GBV_ILN_2065 GBV_ILN_2068 GBV_ILN_2088 GBV_ILN_2093 GBV_ILN_2106 GBV_ILN_2107 GBV_ILN_2108 GBV_ILN_2110 GBV_ILN_2111 GBV_ILN_2112 GBV_ILN_2113 GBV_ILN_2118 GBV_ILN_2119 GBV_ILN_2122 GBV_ILN_2129 GBV_ILN_2143 GBV_ILN_2144 GBV_ILN_2147 GBV_ILN_2148 GBV_ILN_2152 GBV_ILN_2153 GBV_ILN_2188 GBV_ILN_2190 GBV_ILN_2232 GBV_ILN_2336 GBV_ILN_2446 GBV_ILN_2470 GBV_ILN_2472 GBV_ILN_2507 GBV_ILN_2522 GBV_ILN_2548 GBV_ILN_4035 GBV_ILN_4037 GBV_ILN_4046 GBV_ILN_4112 GBV_ILN_4125 GBV_ILN_4126 GBV_ILN_4242 GBV_ILN_4246 GBV_ILN_4249 GBV_ILN_4251 GBV_ILN_4305 GBV_ILN_4306 GBV_ILN_4307 GBV_ILN_4313 GBV_ILN_4322 GBV_ILN_4323 GBV_ILN_4324 GBV_ILN_4325 GBV_ILN_4326 GBV_ILN_4328 GBV_ILN_4333 GBV_ILN_4334 GBV_ILN_4335 GBV_ILN_4336 GBV_ILN_4338 GBV_ILN_4393 GBV_ILN_4700 AR 43 2023 3 24 10 1339-1365 |
allfieldsSound |
10.1007/s00034-023-02531-y doi (DE-627)SPR054896673 (SPR)s00034-023-02531-y-e DE-627 ger DE-627 rakwb eng Xin, Xin verfasserin aut An 11-bit Nyquist SAR-VCO Hybrid ADC with a Reused Ring-VCO for Power Reduction 2023 Text txt rdacontent Computermedien c rdamedia Online-Ressource cr rdacarrier © The Author(s), under exclusive licence to Springer Science+Business Media, LLC, part of Springer Nature 2023. Springer Nature or its licensor (e.g. a society or other partner) holds exclusive rights to this article under a publishing agreement with the author(s) or other rightsholder(s); author self-archiving of the accepted manuscript version of this article is solely governed by the terms of such publishing agreement and applicable law. Abstract An 11-bit, power efficiency, two-stage SAR-voltage-controlled oscillator (VCO) hybrid ADC is proposed in this work. Taking full advantage of the voltage-to-phase and voltage-to-frequency characteristics, the reused ring-VCO circuit acts as not only a time-domain comparator with the phase detector assistance for low power consumption in the first SAR stage but also a fine quantizer in the second stage. More importantly, the gain nonlinearity of the VCO can be effectively suppressed due to the small residue voltage after the coarse quantization. In addition, the VCO-based ADC (except for the ring-VCO circuit) only works in the quantization phase instead of the whole conversion period. As a result, the power consumption and area of the comparator in the previous SAR-VCO ∆Σ ADC can be thoroughly avoided. Besides, compared to an 11-bit SAR ADC, the capacitor mismatch can be relaxed theoretically by 2 × in the identical capacitor array area. Post-simulation results demonstrate that the proposed ADC in a 0.18 μm CMOS process exhibits a signal-to-noise and distortion ratio (SNDR) of 63.8 dB, and it dissipates 2.1 μW power from a 0.6 V supply with a sampling rate of 50 kS/s and a Nyquist input rate. To the author's knowledge, the hybrid ADC can achieve the best Walden figure of merit ($ FoM_{w} $) of 33.3 fJ/conversion-step compared with the previous SAR-VCO hybrid ADC, and its active area is only 0.109 $ mm^{2} $. SAR ADC (dpeaa)DE-He213 VCO-based ADC (dpeaa)DE-He213 Reused ring-VCO circuit (dpeaa)DE-He213 Low supply (dpeaa)DE-He213 Power efficiency (dpeaa)DE-He213 Zhang, Chang aut Tong, Xingyuan (orcid)0000-0002-0697-1049 aut Enthalten in Circuits, systems and signal processing Boston, Mass. : Birkhäuser, 1982 43(2023), 3 vom: 24. Okt., Seite 1339-1365 (DE-627)351975470 (DE-600)2085136-4 1531-5878 nnns volume:43 year:2023 number:3 day:24 month:10 pages:1339-1365 https://dx.doi.org/10.1007/s00034-023-02531-y lizenzpflichtig Volltext GBV_USEFLAG_A SYSFLAG_A GBV_SPRINGER GBV_ILN_11 GBV_ILN_20 GBV_ILN_22 GBV_ILN_23 GBV_ILN_24 GBV_ILN_31 GBV_ILN_32 GBV_ILN_39 GBV_ILN_40 GBV_ILN_60 GBV_ILN_62 GBV_ILN_63 GBV_ILN_69 GBV_ILN_70 GBV_ILN_73 GBV_ILN_74 GBV_ILN_90 GBV_ILN_95 GBV_ILN_100 GBV_ILN_105 GBV_ILN_110 GBV_ILN_120 GBV_ILN_138 GBV_ILN_150 GBV_ILN_151 GBV_ILN_152 GBV_ILN_161 GBV_ILN_170 GBV_ILN_171 GBV_ILN_187 GBV_ILN_213 GBV_ILN_224 GBV_ILN_230 GBV_ILN_250 GBV_ILN_267 GBV_ILN_281 GBV_ILN_285 GBV_ILN_293 GBV_ILN_370 GBV_ILN_602 GBV_ILN_636 GBV_ILN_702 GBV_ILN_2001 GBV_ILN_2003 GBV_ILN_2004 GBV_ILN_2005 GBV_ILN_2006 GBV_ILN_2007 GBV_ILN_2008 GBV_ILN_2009 GBV_ILN_2010 GBV_ILN_2011 GBV_ILN_2014 GBV_ILN_2015 GBV_ILN_2020 GBV_ILN_2021 GBV_ILN_2025 GBV_ILN_2026 GBV_ILN_2027 GBV_ILN_2031 GBV_ILN_2034 GBV_ILN_2037 GBV_ILN_2038 GBV_ILN_2039 GBV_ILN_2044 GBV_ILN_2048 GBV_ILN_2049 GBV_ILN_2050 GBV_ILN_2055 GBV_ILN_2056 GBV_ILN_2057 GBV_ILN_2059 GBV_ILN_2061 GBV_ILN_2064 GBV_ILN_2065 GBV_ILN_2068 GBV_ILN_2088 GBV_ILN_2093 GBV_ILN_2106 GBV_ILN_2107 GBV_ILN_2108 GBV_ILN_2110 GBV_ILN_2111 GBV_ILN_2112 GBV_ILN_2113 GBV_ILN_2118 GBV_ILN_2119 GBV_ILN_2122 GBV_ILN_2129 GBV_ILN_2143 GBV_ILN_2144 GBV_ILN_2147 GBV_ILN_2148 GBV_ILN_2152 GBV_ILN_2153 GBV_ILN_2188 GBV_ILN_2190 GBV_ILN_2232 GBV_ILN_2336 GBV_ILN_2446 GBV_ILN_2470 GBV_ILN_2472 GBV_ILN_2507 GBV_ILN_2522 GBV_ILN_2548 GBV_ILN_4035 GBV_ILN_4037 GBV_ILN_4046 GBV_ILN_4112 GBV_ILN_4125 GBV_ILN_4126 GBV_ILN_4242 GBV_ILN_4246 GBV_ILN_4249 GBV_ILN_4251 GBV_ILN_4305 GBV_ILN_4306 GBV_ILN_4307 GBV_ILN_4313 GBV_ILN_4322 GBV_ILN_4323 GBV_ILN_4324 GBV_ILN_4325 GBV_ILN_4326 GBV_ILN_4328 GBV_ILN_4333 GBV_ILN_4334 GBV_ILN_4335 GBV_ILN_4336 GBV_ILN_4338 GBV_ILN_4393 GBV_ILN_4700 AR 43 2023 3 24 10 1339-1365 |
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Enthalten in Circuits, systems and signal processing 43(2023), 3 vom: 24. Okt., Seite 1339-1365 volume:43 year:2023 number:3 day:24 month:10 pages:1339-1365 |
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Enthalten in Circuits, systems and signal processing 43(2023), 3 vom: 24. Okt., Seite 1339-1365 volume:43 year:2023 number:3 day:24 month:10 pages:1339-1365 |
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SAR ADC VCO-based ADC Reused ring-VCO circuit Low supply Power efficiency |
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Circuits, systems and signal processing |
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Xin, Xin @@aut@@ Zhang, Chang @@aut@@ Tong, Xingyuan @@aut@@ |
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2023-10-24T00:00:00Z |
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Springer Nature or its licensor (e.g. a society or other partner) holds exclusive rights to this article under a publishing agreement with the author(s) or other rightsholder(s); author self-archiving of the accepted manuscript version of this article is solely governed by the terms of such publishing agreement and applicable law.</subfield></datafield><datafield tag="520" ind1=" " ind2=" "><subfield code="a">Abstract An 11-bit, power efficiency, two-stage SAR-voltage-controlled oscillator (VCO) hybrid ADC is proposed in this work. Taking full advantage of the voltage-to-phase and voltage-to-frequency characteristics, the reused ring-VCO circuit acts as not only a time-domain comparator with the phase detector assistance for low power consumption in the first SAR stage but also a fine quantizer in the second stage. More importantly, the gain nonlinearity of the VCO can be effectively suppressed due to the small residue voltage after the coarse quantization. In addition, the VCO-based ADC (except for the ring-VCO circuit) only works in the quantization phase instead of the whole conversion period. As a result, the power consumption and area of the comparator in the previous SAR-VCO ∆Σ ADC can be thoroughly avoided. Besides, compared to an 11-bit SAR ADC, the capacitor mismatch can be relaxed theoretically by 2 × in the identical capacitor array area. Post-simulation results demonstrate that the proposed ADC in a 0.18 μm CMOS process exhibits a signal-to-noise and distortion ratio (SNDR) of 63.8 dB, and it dissipates 2.1 μW power from a 0.6 V supply with a sampling rate of 50 kS/s and a Nyquist input rate. To the author's knowledge, the hybrid ADC can achieve the best Walden figure of merit ($ FoM_{w} $) of 33.3 fJ/conversion-step compared with the previous SAR-VCO hybrid ADC, and its active area is only 0.109 $ mm^{2} $.</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">SAR ADC</subfield><subfield code="7">(dpeaa)DE-He213</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">VCO-based ADC</subfield><subfield code="7">(dpeaa)DE-He213</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Reused ring-VCO circuit</subfield><subfield code="7">(dpeaa)DE-He213</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Low supply</subfield><subfield code="7">(dpeaa)DE-He213</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Power efficiency</subfield><subfield code="7">(dpeaa)DE-He213</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Zhang, Chang</subfield><subfield code="4">aut</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Tong, Xingyuan</subfield><subfield code="0">(orcid)0000-0002-0697-1049</subfield><subfield code="4">aut</subfield></datafield><datafield tag="773" ind1="0" ind2="8"><subfield code="i">Enthalten in</subfield><subfield code="t">Circuits, systems and signal processing</subfield><subfield code="d">Boston, Mass. : Birkhäuser, 1982</subfield><subfield code="g">43(2023), 3 vom: 24. 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Xin, Xin |
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Xin, Xin misc SAR ADC misc VCO-based ADC misc Reused ring-VCO circuit misc Low supply misc Power efficiency An 11-bit Nyquist SAR-VCO Hybrid ADC with a Reused Ring-VCO for Power Reduction |
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An 11-bit Nyquist SAR-VCO Hybrid ADC with a Reused Ring-VCO for Power Reduction SAR ADC (dpeaa)DE-He213 VCO-based ADC (dpeaa)DE-He213 Reused ring-VCO circuit (dpeaa)DE-He213 Low supply (dpeaa)DE-He213 Power efficiency (dpeaa)DE-He213 |
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misc SAR ADC misc VCO-based ADC misc Reused ring-VCO circuit misc Low supply misc Power efficiency |
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misc SAR ADC misc VCO-based ADC misc Reused ring-VCO circuit misc Low supply misc Power efficiency |
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An 11-bit Nyquist SAR-VCO Hybrid ADC with a Reused Ring-VCO for Power Reduction |
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An 11-bit Nyquist SAR-VCO Hybrid ADC with a Reused Ring-VCO for Power Reduction |
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11-bit nyquist sar-vco hybrid adc with a reused ring-vco for power reduction |
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An 11-bit Nyquist SAR-VCO Hybrid ADC with a Reused Ring-VCO for Power Reduction |
abstract |
Abstract An 11-bit, power efficiency, two-stage SAR-voltage-controlled oscillator (VCO) hybrid ADC is proposed in this work. Taking full advantage of the voltage-to-phase and voltage-to-frequency characteristics, the reused ring-VCO circuit acts as not only a time-domain comparator with the phase detector assistance for low power consumption in the first SAR stage but also a fine quantizer in the second stage. More importantly, the gain nonlinearity of the VCO can be effectively suppressed due to the small residue voltage after the coarse quantization. In addition, the VCO-based ADC (except for the ring-VCO circuit) only works in the quantization phase instead of the whole conversion period. As a result, the power consumption and area of the comparator in the previous SAR-VCO ∆Σ ADC can be thoroughly avoided. Besides, compared to an 11-bit SAR ADC, the capacitor mismatch can be relaxed theoretically by 2 × in the identical capacitor array area. Post-simulation results demonstrate that the proposed ADC in a 0.18 μm CMOS process exhibits a signal-to-noise and distortion ratio (SNDR) of 63.8 dB, and it dissipates 2.1 μW power from a 0.6 V supply with a sampling rate of 50 kS/s and a Nyquist input rate. To the author's knowledge, the hybrid ADC can achieve the best Walden figure of merit ($ FoM_{w} $) of 33.3 fJ/conversion-step compared with the previous SAR-VCO hybrid ADC, and its active area is only 0.109 $ mm^{2} $. © The Author(s), under exclusive licence to Springer Science+Business Media, LLC, part of Springer Nature 2023. Springer Nature or its licensor (e.g. a society or other partner) holds exclusive rights to this article under a publishing agreement with the author(s) or other rightsholder(s); author self-archiving of the accepted manuscript version of this article is solely governed by the terms of such publishing agreement and applicable law. |
abstractGer |
Abstract An 11-bit, power efficiency, two-stage SAR-voltage-controlled oscillator (VCO) hybrid ADC is proposed in this work. Taking full advantage of the voltage-to-phase and voltage-to-frequency characteristics, the reused ring-VCO circuit acts as not only a time-domain comparator with the phase detector assistance for low power consumption in the first SAR stage but also a fine quantizer in the second stage. More importantly, the gain nonlinearity of the VCO can be effectively suppressed due to the small residue voltage after the coarse quantization. In addition, the VCO-based ADC (except for the ring-VCO circuit) only works in the quantization phase instead of the whole conversion period. As a result, the power consumption and area of the comparator in the previous SAR-VCO ∆Σ ADC can be thoroughly avoided. Besides, compared to an 11-bit SAR ADC, the capacitor mismatch can be relaxed theoretically by 2 × in the identical capacitor array area. Post-simulation results demonstrate that the proposed ADC in a 0.18 μm CMOS process exhibits a signal-to-noise and distortion ratio (SNDR) of 63.8 dB, and it dissipates 2.1 μW power from a 0.6 V supply with a sampling rate of 50 kS/s and a Nyquist input rate. To the author's knowledge, the hybrid ADC can achieve the best Walden figure of merit ($ FoM_{w} $) of 33.3 fJ/conversion-step compared with the previous SAR-VCO hybrid ADC, and its active area is only 0.109 $ mm^{2} $. © The Author(s), under exclusive licence to Springer Science+Business Media, LLC, part of Springer Nature 2023. Springer Nature or its licensor (e.g. a society or other partner) holds exclusive rights to this article under a publishing agreement with the author(s) or other rightsholder(s); author self-archiving of the accepted manuscript version of this article is solely governed by the terms of such publishing agreement and applicable law. |
abstract_unstemmed |
Abstract An 11-bit, power efficiency, two-stage SAR-voltage-controlled oscillator (VCO) hybrid ADC is proposed in this work. Taking full advantage of the voltage-to-phase and voltage-to-frequency characteristics, the reused ring-VCO circuit acts as not only a time-domain comparator with the phase detector assistance for low power consumption in the first SAR stage but also a fine quantizer in the second stage. More importantly, the gain nonlinearity of the VCO can be effectively suppressed due to the small residue voltage after the coarse quantization. In addition, the VCO-based ADC (except for the ring-VCO circuit) only works in the quantization phase instead of the whole conversion period. As a result, the power consumption and area of the comparator in the previous SAR-VCO ∆Σ ADC can be thoroughly avoided. Besides, compared to an 11-bit SAR ADC, the capacitor mismatch can be relaxed theoretically by 2 × in the identical capacitor array area. Post-simulation results demonstrate that the proposed ADC in a 0.18 μm CMOS process exhibits a signal-to-noise and distortion ratio (SNDR) of 63.8 dB, and it dissipates 2.1 μW power from a 0.6 V supply with a sampling rate of 50 kS/s and a Nyquist input rate. To the author's knowledge, the hybrid ADC can achieve the best Walden figure of merit ($ FoM_{w} $) of 33.3 fJ/conversion-step compared with the previous SAR-VCO hybrid ADC, and its active area is only 0.109 $ mm^{2} $. © The Author(s), under exclusive licence to Springer Science+Business Media, LLC, part of Springer Nature 2023. Springer Nature or its licensor (e.g. a society or other partner) holds exclusive rights to this article under a publishing agreement with the author(s) or other rightsholder(s); author self-archiving of the accepted manuscript version of this article is solely governed by the terms of such publishing agreement and applicable law. |
collection_details |
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container_issue |
3 |
title_short |
An 11-bit Nyquist SAR-VCO Hybrid ADC with a Reused Ring-VCO for Power Reduction |
url |
https://dx.doi.org/10.1007/s00034-023-02531-y |
remote_bool |
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author2 |
Zhang, Chang Tong, Xingyuan |
author2Str |
Zhang, Chang Tong, Xingyuan |
ppnlink |
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doi_str |
10.1007/s00034-023-02531-y |
up_date |
2024-07-04T03:25:35.557Z |
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score |
7.3993254 |