Design of a CMOS based ring VCO using particle swarm optimisation
Abstract This work investigates performance improvement the of ring voltage-controlled oscillator. Particle swarm optimization (PSO) techniques are used on both the physical and schematic levels to optimize the design parameter values (width of the NMOS “$${\mathrm{W}}_{\mathrm{n}}$$” and PMOS “$${\...
Ausführliche Beschreibung
Gespeichert in:
| Autor*in: |
Raj, Aditya [verfasserIn] Majumder, Saikat [verfasserIn] Mishra, Guru Prasad [verfasserIn] |
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| Format: |
E-Artikel |
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| Sprache: |
Englisch |
| Erschienen: |
2023 |
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| Schlagwörter: |
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| Anmerkung: |
© The Author(s), under exclusive licence to Springer Science+Business Media, LLC, part of Springer Nature 2023 |
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| Übergeordnetes Werk: |
Enthalten in: Analog integrated circuits and signal processing - Springer US, 1991, 119(2023), 2 vom: 16. Dez., Seite 309-317 |
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| Übergeordnetes Werk: |
volume:119 ; year:2023 ; number:2 ; day:16 ; month:12 ; pages:309-317 |
| Links: |
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| DOI / URN: |
10.1007/s10470-023-02206-3 |
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| Katalog-ID: |
SPR055675417 |
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| 520 | |a Abstract This work investigates performance improvement the of ring voltage-controlled oscillator. Particle swarm optimization (PSO) techniques are used on both the physical and schematic levels to optimize the design parameter values (width of the NMOS “$${\mathrm{W}}_{\mathrm{n}}$$” and PMOS “$${\mathrm{W}}_{\mathrm{p}}$$”). By utilizing this strategy, multiple time-taking iterations can be reduced and done in a single cycle, thereby increasing the likelihood that the ring VCO will function to the best of its ability. After getting the optimized values for the design parameters of the ring VCO’s, the circuit has been designed for the performance analysis. The same is demonstrated by evaluating the performance of the circuit and confirming the results of the transient analysis and noise analysis carried out with Cadence tools under a variety of different operating conditions using the 45 nm technology process. The analysis has been carried out in a variety of PVT corners (fast–fast, slow–slow, fast–slow, and slow–fast). | ||
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| 650 | 4 | |a PSO |7 (dpeaa)DE-He213 | |
| 700 | 1 | |a Majumder, Saikat |e verfasserin |4 aut | |
| 700 | 1 | |a Mishra, Guru Prasad |e verfasserin |4 aut | |
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10.1007/s10470-023-02206-3 doi (DE-627)SPR055675417 (SPR)s10470-023-02206-3-e DE-627 ger DE-627 rakwb eng 004 VZ 53.55 bkl 53.73 bkl Raj, Aditya verfasserin aut Design of a CMOS based ring VCO using particle swarm optimisation 2023 Text txt rdacontent Computermedien c rdamedia Online-Ressource cr rdacarrier © The Author(s), under exclusive licence to Springer Science+Business Media, LLC, part of Springer Nature 2023 Abstract This work investigates performance improvement the of ring voltage-controlled oscillator. Particle swarm optimization (PSO) techniques are used on both the physical and schematic levels to optimize the design parameter values (width of the NMOS “$${\mathrm{W}}_{\mathrm{n}}$$” and PMOS “$${\mathrm{W}}_{\mathrm{p}}$$”). By utilizing this strategy, multiple time-taking iterations can be reduced and done in a single cycle, thereby increasing the likelihood that the ring VCO will function to the best of its ability. After getting the optimized values for the design parameters of the ring VCO’s, the circuit has been designed for the performance analysis. The same is demonstrated by evaluating the performance of the circuit and confirming the results of the transient analysis and noise analysis carried out with Cadence tools under a variety of different operating conditions using the 45 nm technology process. The analysis has been carried out in a variety of PVT corners (fast–fast, slow–slow, fast–slow, and slow–fast). Ring VCO (dpeaa)DE-He213 CVCO (dpeaa)DE-He213 CMOS (dpeaa)DE-He213 Power dissipation (dpeaa)DE-He213 Phase noise (dpeaa)DE-He213 Oscillating (dpeaa)DE-He213 Optimization (dpeaa)DE-He213 PSO (dpeaa)DE-He213 Majumder, Saikat verfasserin aut Mishra, Guru Prasad verfasserin aut Enthalten in Analog integrated circuits and signal processing Springer US, 1991 119(2023), 2 vom: 16. Dez., Seite 309-317 (DE-627)271348925 (DE-600)1479772-0 1573-1979 nnns volume:119 year:2023 number:2 day:16 month:12 pages:309-317 https://dx.doi.org/10.1007/s10470-023-02206-3 X:SPRINGER Resolving-System lizenzpflichtig Volltext SYSFLAG_0 GBV_SPRINGER GBV_ILN_11 GBV_ILN_20 GBV_ILN_22 GBV_ILN_23 GBV_ILN_24 GBV_ILN_31 GBV_ILN_32 GBV_ILN_39 GBV_ILN_40 GBV_ILN_60 GBV_ILN_62 GBV_ILN_63 GBV_ILN_69 GBV_ILN_70 GBV_ILN_73 GBV_ILN_74 GBV_ILN_90 GBV_ILN_95 GBV_ILN_100 GBV_ILN_101 GBV_ILN_105 GBV_ILN_110 GBV_ILN_120 GBV_ILN_138 GBV_ILN_150 GBV_ILN_151 GBV_ILN_152 GBV_ILN_161 GBV_ILN_170 GBV_ILN_171 GBV_ILN_187 GBV_ILN_213 GBV_ILN_224 GBV_ILN_230 GBV_ILN_250 GBV_ILN_281 GBV_ILN_285 GBV_ILN_293 GBV_ILN_370 GBV_ILN_602 GBV_ILN_636 GBV_ILN_702 GBV_ILN_2001 GBV_ILN_2003 GBV_ILN_2004 GBV_ILN_2005 GBV_ILN_2006 GBV_ILN_2007 GBV_ILN_2008 GBV_ILN_2009 GBV_ILN_2010 GBV_ILN_2011 GBV_ILN_2014 GBV_ILN_2015 GBV_ILN_2020 GBV_ILN_2021 GBV_ILN_2025 GBV_ILN_2026 GBV_ILN_2027 GBV_ILN_2031 GBV_ILN_2034 GBV_ILN_2037 GBV_ILN_2038 GBV_ILN_2039 GBV_ILN_2044 GBV_ILN_2048 GBV_ILN_2049 GBV_ILN_2050 GBV_ILN_2055 GBV_ILN_2056 GBV_ILN_2057 GBV_ILN_2059 GBV_ILN_2061 GBV_ILN_2064 GBV_ILN_2065 GBV_ILN_2068 GBV_ILN_2088 GBV_ILN_2093 GBV_ILN_2106 GBV_ILN_2107 GBV_ILN_2108 GBV_ILN_2110 GBV_ILN_2111 GBV_ILN_2112 GBV_ILN_2113 GBV_ILN_2118 GBV_ILN_2122 GBV_ILN_2129 GBV_ILN_2143 GBV_ILN_2144 GBV_ILN_2147 GBV_ILN_2148 GBV_ILN_2152 GBV_ILN_2153 GBV_ILN_2188 GBV_ILN_2190 GBV_ILN_2232 GBV_ILN_2336 GBV_ILN_2446 GBV_ILN_2470 GBV_ILN_2472 GBV_ILN_2507 GBV_ILN_2522 GBV_ILN_2548 GBV_ILN_4035 GBV_ILN_4037 GBV_ILN_4046 GBV_ILN_4112 GBV_ILN_4125 GBV_ILN_4126 GBV_ILN_4242 GBV_ILN_4246 GBV_ILN_4249 GBV_ILN_4251 GBV_ILN_4305 GBV_ILN_4306 GBV_ILN_4307 GBV_ILN_4313 GBV_ILN_4322 GBV_ILN_4323 GBV_ILN_4324 GBV_ILN_4325 GBV_ILN_4326 GBV_ILN_4328 GBV_ILN_4333 GBV_ILN_4334 GBV_ILN_4335 GBV_ILN_4336 GBV_ILN_4338 GBV_ILN_4393 GBV_ILN_4700 53.55 VZ 53.73 VZ AR 119 2023 2 16 12 309-317 |
| spelling |
10.1007/s10470-023-02206-3 doi (DE-627)SPR055675417 (SPR)s10470-023-02206-3-e DE-627 ger DE-627 rakwb eng 004 VZ 53.55 bkl 53.73 bkl Raj, Aditya verfasserin aut Design of a CMOS based ring VCO using particle swarm optimisation 2023 Text txt rdacontent Computermedien c rdamedia Online-Ressource cr rdacarrier © The Author(s), under exclusive licence to Springer Science+Business Media, LLC, part of Springer Nature 2023 Abstract This work investigates performance improvement the of ring voltage-controlled oscillator. Particle swarm optimization (PSO) techniques are used on both the physical and schematic levels to optimize the design parameter values (width of the NMOS “$${\mathrm{W}}_{\mathrm{n}}$$” and PMOS “$${\mathrm{W}}_{\mathrm{p}}$$”). By utilizing this strategy, multiple time-taking iterations can be reduced and done in a single cycle, thereby increasing the likelihood that the ring VCO will function to the best of its ability. After getting the optimized values for the design parameters of the ring VCO’s, the circuit has been designed for the performance analysis. The same is demonstrated by evaluating the performance of the circuit and confirming the results of the transient analysis and noise analysis carried out with Cadence tools under a variety of different operating conditions using the 45 nm technology process. The analysis has been carried out in a variety of PVT corners (fast–fast, slow–slow, fast–slow, and slow–fast). Ring VCO (dpeaa)DE-He213 CVCO (dpeaa)DE-He213 CMOS (dpeaa)DE-He213 Power dissipation (dpeaa)DE-He213 Phase noise (dpeaa)DE-He213 Oscillating (dpeaa)DE-He213 Optimization (dpeaa)DE-He213 PSO (dpeaa)DE-He213 Majumder, Saikat verfasserin aut Mishra, Guru Prasad verfasserin aut Enthalten in Analog integrated circuits and signal processing Springer US, 1991 119(2023), 2 vom: 16. Dez., Seite 309-317 (DE-627)271348925 (DE-600)1479772-0 1573-1979 nnns volume:119 year:2023 number:2 day:16 month:12 pages:309-317 https://dx.doi.org/10.1007/s10470-023-02206-3 X:SPRINGER Resolving-System lizenzpflichtig Volltext SYSFLAG_0 GBV_SPRINGER GBV_ILN_11 GBV_ILN_20 GBV_ILN_22 GBV_ILN_23 GBV_ILN_24 GBV_ILN_31 GBV_ILN_32 GBV_ILN_39 GBV_ILN_40 GBV_ILN_60 GBV_ILN_62 GBV_ILN_63 GBV_ILN_69 GBV_ILN_70 GBV_ILN_73 GBV_ILN_74 GBV_ILN_90 GBV_ILN_95 GBV_ILN_100 GBV_ILN_101 GBV_ILN_105 GBV_ILN_110 GBV_ILN_120 GBV_ILN_138 GBV_ILN_150 GBV_ILN_151 GBV_ILN_152 GBV_ILN_161 GBV_ILN_170 GBV_ILN_171 GBV_ILN_187 GBV_ILN_213 GBV_ILN_224 GBV_ILN_230 GBV_ILN_250 GBV_ILN_281 GBV_ILN_285 GBV_ILN_293 GBV_ILN_370 GBV_ILN_602 GBV_ILN_636 GBV_ILN_702 GBV_ILN_2001 GBV_ILN_2003 GBV_ILN_2004 GBV_ILN_2005 GBV_ILN_2006 GBV_ILN_2007 GBV_ILN_2008 GBV_ILN_2009 GBV_ILN_2010 GBV_ILN_2011 GBV_ILN_2014 GBV_ILN_2015 GBV_ILN_2020 GBV_ILN_2021 GBV_ILN_2025 GBV_ILN_2026 GBV_ILN_2027 GBV_ILN_2031 GBV_ILN_2034 GBV_ILN_2037 GBV_ILN_2038 GBV_ILN_2039 GBV_ILN_2044 GBV_ILN_2048 GBV_ILN_2049 GBV_ILN_2050 GBV_ILN_2055 GBV_ILN_2056 GBV_ILN_2057 GBV_ILN_2059 GBV_ILN_2061 GBV_ILN_2064 GBV_ILN_2065 GBV_ILN_2068 GBV_ILN_2088 GBV_ILN_2093 GBV_ILN_2106 GBV_ILN_2107 GBV_ILN_2108 GBV_ILN_2110 GBV_ILN_2111 GBV_ILN_2112 GBV_ILN_2113 GBV_ILN_2118 GBV_ILN_2122 GBV_ILN_2129 GBV_ILN_2143 GBV_ILN_2144 GBV_ILN_2147 GBV_ILN_2148 GBV_ILN_2152 GBV_ILN_2153 GBV_ILN_2188 GBV_ILN_2190 GBV_ILN_2232 GBV_ILN_2336 GBV_ILN_2446 GBV_ILN_2470 GBV_ILN_2472 GBV_ILN_2507 GBV_ILN_2522 GBV_ILN_2548 GBV_ILN_4035 GBV_ILN_4037 GBV_ILN_4046 GBV_ILN_4112 GBV_ILN_4125 GBV_ILN_4126 GBV_ILN_4242 GBV_ILN_4246 GBV_ILN_4249 GBV_ILN_4251 GBV_ILN_4305 GBV_ILN_4306 GBV_ILN_4307 GBV_ILN_4313 GBV_ILN_4322 GBV_ILN_4323 GBV_ILN_4324 GBV_ILN_4325 GBV_ILN_4326 GBV_ILN_4328 GBV_ILN_4333 GBV_ILN_4334 GBV_ILN_4335 GBV_ILN_4336 GBV_ILN_4338 GBV_ILN_4393 GBV_ILN_4700 53.55 VZ 53.73 VZ AR 119 2023 2 16 12 309-317 |
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10.1007/s10470-023-02206-3 doi (DE-627)SPR055675417 (SPR)s10470-023-02206-3-e DE-627 ger DE-627 rakwb eng 004 VZ 53.55 bkl 53.73 bkl Raj, Aditya verfasserin aut Design of a CMOS based ring VCO using particle swarm optimisation 2023 Text txt rdacontent Computermedien c rdamedia Online-Ressource cr rdacarrier © The Author(s), under exclusive licence to Springer Science+Business Media, LLC, part of Springer Nature 2023 Abstract This work investigates performance improvement the of ring voltage-controlled oscillator. Particle swarm optimization (PSO) techniques are used on both the physical and schematic levels to optimize the design parameter values (width of the NMOS “$${\mathrm{W}}_{\mathrm{n}}$$” and PMOS “$${\mathrm{W}}_{\mathrm{p}}$$”). By utilizing this strategy, multiple time-taking iterations can be reduced and done in a single cycle, thereby increasing the likelihood that the ring VCO will function to the best of its ability. After getting the optimized values for the design parameters of the ring VCO’s, the circuit has been designed for the performance analysis. The same is demonstrated by evaluating the performance of the circuit and confirming the results of the transient analysis and noise analysis carried out with Cadence tools under a variety of different operating conditions using the 45 nm technology process. The analysis has been carried out in a variety of PVT corners (fast–fast, slow–slow, fast–slow, and slow–fast). Ring VCO (dpeaa)DE-He213 CVCO (dpeaa)DE-He213 CMOS (dpeaa)DE-He213 Power dissipation (dpeaa)DE-He213 Phase noise (dpeaa)DE-He213 Oscillating (dpeaa)DE-He213 Optimization (dpeaa)DE-He213 PSO (dpeaa)DE-He213 Majumder, Saikat verfasserin aut Mishra, Guru Prasad verfasserin aut Enthalten in Analog integrated circuits and signal processing Springer US, 1991 119(2023), 2 vom: 16. Dez., Seite 309-317 (DE-627)271348925 (DE-600)1479772-0 1573-1979 nnns volume:119 year:2023 number:2 day:16 month:12 pages:309-317 https://dx.doi.org/10.1007/s10470-023-02206-3 X:SPRINGER Resolving-System lizenzpflichtig Volltext SYSFLAG_0 GBV_SPRINGER GBV_ILN_11 GBV_ILN_20 GBV_ILN_22 GBV_ILN_23 GBV_ILN_24 GBV_ILN_31 GBV_ILN_32 GBV_ILN_39 GBV_ILN_40 GBV_ILN_60 GBV_ILN_62 GBV_ILN_63 GBV_ILN_69 GBV_ILN_70 GBV_ILN_73 GBV_ILN_74 GBV_ILN_90 GBV_ILN_95 GBV_ILN_100 GBV_ILN_101 GBV_ILN_105 GBV_ILN_110 GBV_ILN_120 GBV_ILN_138 GBV_ILN_150 GBV_ILN_151 GBV_ILN_152 GBV_ILN_161 GBV_ILN_170 GBV_ILN_171 GBV_ILN_187 GBV_ILN_213 GBV_ILN_224 GBV_ILN_230 GBV_ILN_250 GBV_ILN_281 GBV_ILN_285 GBV_ILN_293 GBV_ILN_370 GBV_ILN_602 GBV_ILN_636 GBV_ILN_702 GBV_ILN_2001 GBV_ILN_2003 GBV_ILN_2004 GBV_ILN_2005 GBV_ILN_2006 GBV_ILN_2007 GBV_ILN_2008 GBV_ILN_2009 GBV_ILN_2010 GBV_ILN_2011 GBV_ILN_2014 GBV_ILN_2015 GBV_ILN_2020 GBV_ILN_2021 GBV_ILN_2025 GBV_ILN_2026 GBV_ILN_2027 GBV_ILN_2031 GBV_ILN_2034 GBV_ILN_2037 GBV_ILN_2038 GBV_ILN_2039 GBV_ILN_2044 GBV_ILN_2048 GBV_ILN_2049 GBV_ILN_2050 GBV_ILN_2055 GBV_ILN_2056 GBV_ILN_2057 GBV_ILN_2059 GBV_ILN_2061 GBV_ILN_2064 GBV_ILN_2065 GBV_ILN_2068 GBV_ILN_2088 GBV_ILN_2093 GBV_ILN_2106 GBV_ILN_2107 GBV_ILN_2108 GBV_ILN_2110 GBV_ILN_2111 GBV_ILN_2112 GBV_ILN_2113 GBV_ILN_2118 GBV_ILN_2122 GBV_ILN_2129 GBV_ILN_2143 GBV_ILN_2144 GBV_ILN_2147 GBV_ILN_2148 GBV_ILN_2152 GBV_ILN_2153 GBV_ILN_2188 GBV_ILN_2190 GBV_ILN_2232 GBV_ILN_2336 GBV_ILN_2446 GBV_ILN_2470 GBV_ILN_2472 GBV_ILN_2507 GBV_ILN_2522 GBV_ILN_2548 GBV_ILN_4035 GBV_ILN_4037 GBV_ILN_4046 GBV_ILN_4112 GBV_ILN_4125 GBV_ILN_4126 GBV_ILN_4242 GBV_ILN_4246 GBV_ILN_4249 GBV_ILN_4251 GBV_ILN_4305 GBV_ILN_4306 GBV_ILN_4307 GBV_ILN_4313 GBV_ILN_4322 GBV_ILN_4323 GBV_ILN_4324 GBV_ILN_4325 GBV_ILN_4326 GBV_ILN_4328 GBV_ILN_4333 GBV_ILN_4334 GBV_ILN_4335 GBV_ILN_4336 GBV_ILN_4338 GBV_ILN_4393 GBV_ILN_4700 53.55 VZ 53.73 VZ AR 119 2023 2 16 12 309-317 |
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10.1007/s10470-023-02206-3 doi (DE-627)SPR055675417 (SPR)s10470-023-02206-3-e DE-627 ger DE-627 rakwb eng 004 VZ 53.55 bkl 53.73 bkl Raj, Aditya verfasserin aut Design of a CMOS based ring VCO using particle swarm optimisation 2023 Text txt rdacontent Computermedien c rdamedia Online-Ressource cr rdacarrier © The Author(s), under exclusive licence to Springer Science+Business Media, LLC, part of Springer Nature 2023 Abstract This work investigates performance improvement the of ring voltage-controlled oscillator. Particle swarm optimization (PSO) techniques are used on both the physical and schematic levels to optimize the design parameter values (width of the NMOS “$${\mathrm{W}}_{\mathrm{n}}$$” and PMOS “$${\mathrm{W}}_{\mathrm{p}}$$”). By utilizing this strategy, multiple time-taking iterations can be reduced and done in a single cycle, thereby increasing the likelihood that the ring VCO will function to the best of its ability. After getting the optimized values for the design parameters of the ring VCO’s, the circuit has been designed for the performance analysis. The same is demonstrated by evaluating the performance of the circuit and confirming the results of the transient analysis and noise analysis carried out with Cadence tools under a variety of different operating conditions using the 45 nm technology process. The analysis has been carried out in a variety of PVT corners (fast–fast, slow–slow, fast–slow, and slow–fast). Ring VCO (dpeaa)DE-He213 CVCO (dpeaa)DE-He213 CMOS (dpeaa)DE-He213 Power dissipation (dpeaa)DE-He213 Phase noise (dpeaa)DE-He213 Oscillating (dpeaa)DE-He213 Optimization (dpeaa)DE-He213 PSO (dpeaa)DE-He213 Majumder, Saikat verfasserin aut Mishra, Guru Prasad verfasserin aut Enthalten in Analog integrated circuits and signal processing Springer US, 1991 119(2023), 2 vom: 16. Dez., Seite 309-317 (DE-627)271348925 (DE-600)1479772-0 1573-1979 nnns volume:119 year:2023 number:2 day:16 month:12 pages:309-317 https://dx.doi.org/10.1007/s10470-023-02206-3 X:SPRINGER Resolving-System lizenzpflichtig Volltext SYSFLAG_0 GBV_SPRINGER GBV_ILN_11 GBV_ILN_20 GBV_ILN_22 GBV_ILN_23 GBV_ILN_24 GBV_ILN_31 GBV_ILN_32 GBV_ILN_39 GBV_ILN_40 GBV_ILN_60 GBV_ILN_62 GBV_ILN_63 GBV_ILN_69 GBV_ILN_70 GBV_ILN_73 GBV_ILN_74 GBV_ILN_90 GBV_ILN_95 GBV_ILN_100 GBV_ILN_101 GBV_ILN_105 GBV_ILN_110 GBV_ILN_120 GBV_ILN_138 GBV_ILN_150 GBV_ILN_151 GBV_ILN_152 GBV_ILN_161 GBV_ILN_170 GBV_ILN_171 GBV_ILN_187 GBV_ILN_213 GBV_ILN_224 GBV_ILN_230 GBV_ILN_250 GBV_ILN_281 GBV_ILN_285 GBV_ILN_293 GBV_ILN_370 GBV_ILN_602 GBV_ILN_636 GBV_ILN_702 GBV_ILN_2001 GBV_ILN_2003 GBV_ILN_2004 GBV_ILN_2005 GBV_ILN_2006 GBV_ILN_2007 GBV_ILN_2008 GBV_ILN_2009 GBV_ILN_2010 GBV_ILN_2011 GBV_ILN_2014 GBV_ILN_2015 GBV_ILN_2020 GBV_ILN_2021 GBV_ILN_2025 GBV_ILN_2026 GBV_ILN_2027 GBV_ILN_2031 GBV_ILN_2034 GBV_ILN_2037 GBV_ILN_2038 GBV_ILN_2039 GBV_ILN_2044 GBV_ILN_2048 GBV_ILN_2049 GBV_ILN_2050 GBV_ILN_2055 GBV_ILN_2056 GBV_ILN_2057 GBV_ILN_2059 GBV_ILN_2061 GBV_ILN_2064 GBV_ILN_2065 GBV_ILN_2068 GBV_ILN_2088 GBV_ILN_2093 GBV_ILN_2106 GBV_ILN_2107 GBV_ILN_2108 GBV_ILN_2110 GBV_ILN_2111 GBV_ILN_2112 GBV_ILN_2113 GBV_ILN_2118 GBV_ILN_2122 GBV_ILN_2129 GBV_ILN_2143 GBV_ILN_2144 GBV_ILN_2147 GBV_ILN_2148 GBV_ILN_2152 GBV_ILN_2153 GBV_ILN_2188 GBV_ILN_2190 GBV_ILN_2232 GBV_ILN_2336 GBV_ILN_2446 GBV_ILN_2470 GBV_ILN_2472 GBV_ILN_2507 GBV_ILN_2522 GBV_ILN_2548 GBV_ILN_4035 GBV_ILN_4037 GBV_ILN_4046 GBV_ILN_4112 GBV_ILN_4125 GBV_ILN_4126 GBV_ILN_4242 GBV_ILN_4246 GBV_ILN_4249 GBV_ILN_4251 GBV_ILN_4305 GBV_ILN_4306 GBV_ILN_4307 GBV_ILN_4313 GBV_ILN_4322 GBV_ILN_4323 GBV_ILN_4324 GBV_ILN_4325 GBV_ILN_4326 GBV_ILN_4328 GBV_ILN_4333 GBV_ILN_4334 GBV_ILN_4335 GBV_ILN_4336 GBV_ILN_4338 GBV_ILN_4393 GBV_ILN_4700 53.55 VZ 53.73 VZ AR 119 2023 2 16 12 309-317 |
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10.1007/s10470-023-02206-3 doi (DE-627)SPR055675417 (SPR)s10470-023-02206-3-e DE-627 ger DE-627 rakwb eng 004 VZ 53.55 bkl 53.73 bkl Raj, Aditya verfasserin aut Design of a CMOS based ring VCO using particle swarm optimisation 2023 Text txt rdacontent Computermedien c rdamedia Online-Ressource cr rdacarrier © The Author(s), under exclusive licence to Springer Science+Business Media, LLC, part of Springer Nature 2023 Abstract This work investigates performance improvement the of ring voltage-controlled oscillator. Particle swarm optimization (PSO) techniques are used on both the physical and schematic levels to optimize the design parameter values (width of the NMOS “$${\mathrm{W}}_{\mathrm{n}}$$” and PMOS “$${\mathrm{W}}_{\mathrm{p}}$$”). By utilizing this strategy, multiple time-taking iterations can be reduced and done in a single cycle, thereby increasing the likelihood that the ring VCO will function to the best of its ability. After getting the optimized values for the design parameters of the ring VCO’s, the circuit has been designed for the performance analysis. The same is demonstrated by evaluating the performance of the circuit and confirming the results of the transient analysis and noise analysis carried out with Cadence tools under a variety of different operating conditions using the 45 nm technology process. The analysis has been carried out in a variety of PVT corners (fast–fast, slow–slow, fast–slow, and slow–fast). Ring VCO (dpeaa)DE-He213 CVCO (dpeaa)DE-He213 CMOS (dpeaa)DE-He213 Power dissipation (dpeaa)DE-He213 Phase noise (dpeaa)DE-He213 Oscillating (dpeaa)DE-He213 Optimization (dpeaa)DE-He213 PSO (dpeaa)DE-He213 Majumder, Saikat verfasserin aut Mishra, Guru Prasad verfasserin aut Enthalten in Analog integrated circuits and signal processing Springer US, 1991 119(2023), 2 vom: 16. Dez., Seite 309-317 (DE-627)271348925 (DE-600)1479772-0 1573-1979 nnns volume:119 year:2023 number:2 day:16 month:12 pages:309-317 https://dx.doi.org/10.1007/s10470-023-02206-3 X:SPRINGER Resolving-System lizenzpflichtig Volltext SYSFLAG_0 GBV_SPRINGER GBV_ILN_11 GBV_ILN_20 GBV_ILN_22 GBV_ILN_23 GBV_ILN_24 GBV_ILN_31 GBV_ILN_32 GBV_ILN_39 GBV_ILN_40 GBV_ILN_60 GBV_ILN_62 GBV_ILN_63 GBV_ILN_69 GBV_ILN_70 GBV_ILN_73 GBV_ILN_74 GBV_ILN_90 GBV_ILN_95 GBV_ILN_100 GBV_ILN_101 GBV_ILN_105 GBV_ILN_110 GBV_ILN_120 GBV_ILN_138 GBV_ILN_150 GBV_ILN_151 GBV_ILN_152 GBV_ILN_161 GBV_ILN_170 GBV_ILN_171 GBV_ILN_187 GBV_ILN_213 GBV_ILN_224 GBV_ILN_230 GBV_ILN_250 GBV_ILN_281 GBV_ILN_285 GBV_ILN_293 GBV_ILN_370 GBV_ILN_602 GBV_ILN_636 GBV_ILN_702 GBV_ILN_2001 GBV_ILN_2003 GBV_ILN_2004 GBV_ILN_2005 GBV_ILN_2006 GBV_ILN_2007 GBV_ILN_2008 GBV_ILN_2009 GBV_ILN_2010 GBV_ILN_2011 GBV_ILN_2014 GBV_ILN_2015 GBV_ILN_2020 GBV_ILN_2021 GBV_ILN_2025 GBV_ILN_2026 GBV_ILN_2027 GBV_ILN_2031 GBV_ILN_2034 GBV_ILN_2037 GBV_ILN_2038 GBV_ILN_2039 GBV_ILN_2044 GBV_ILN_2048 GBV_ILN_2049 GBV_ILN_2050 GBV_ILN_2055 GBV_ILN_2056 GBV_ILN_2057 GBV_ILN_2059 GBV_ILN_2061 GBV_ILN_2064 GBV_ILN_2065 GBV_ILN_2068 GBV_ILN_2088 GBV_ILN_2093 GBV_ILN_2106 GBV_ILN_2107 GBV_ILN_2108 GBV_ILN_2110 GBV_ILN_2111 GBV_ILN_2112 GBV_ILN_2113 GBV_ILN_2118 GBV_ILN_2122 GBV_ILN_2129 GBV_ILN_2143 GBV_ILN_2144 GBV_ILN_2147 GBV_ILN_2148 GBV_ILN_2152 GBV_ILN_2153 GBV_ILN_2188 GBV_ILN_2190 GBV_ILN_2232 GBV_ILN_2336 GBV_ILN_2446 GBV_ILN_2470 GBV_ILN_2472 GBV_ILN_2507 GBV_ILN_2522 GBV_ILN_2548 GBV_ILN_4035 GBV_ILN_4037 GBV_ILN_4046 GBV_ILN_4112 GBV_ILN_4125 GBV_ILN_4126 GBV_ILN_4242 GBV_ILN_4246 GBV_ILN_4249 GBV_ILN_4251 GBV_ILN_4305 GBV_ILN_4306 GBV_ILN_4307 GBV_ILN_4313 GBV_ILN_4322 GBV_ILN_4323 GBV_ILN_4324 GBV_ILN_4325 GBV_ILN_4326 GBV_ILN_4328 GBV_ILN_4333 GBV_ILN_4334 GBV_ILN_4335 GBV_ILN_4336 GBV_ILN_4338 GBV_ILN_4393 GBV_ILN_4700 53.55 VZ 53.73 VZ AR 119 2023 2 16 12 309-317 |
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Enthalten in Analog integrated circuits and signal processing 119(2023), 2 vom: 16. Dez., Seite 309-317 volume:119 year:2023 number:2 day:16 month:12 pages:309-317 |
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Enthalten in Analog integrated circuits and signal processing 119(2023), 2 vom: 16. Dez., Seite 309-317 volume:119 year:2023 number:2 day:16 month:12 pages:309-317 |
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Ring VCO CVCO CMOS Power dissipation Phase noise Oscillating Optimization PSO |
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Analog integrated circuits and signal processing |
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Raj, Aditya @@aut@@ Majumder, Saikat @@aut@@ Mishra, Guru Prasad @@aut@@ |
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Particle swarm optimization (PSO) techniques are used on both the physical and schematic levels to optimize the design parameter values (width of the NMOS “$${\mathrm{W}}_{\mathrm{n}}$$” and PMOS “$${\mathrm{W}}_{\mathrm{p}}$$”). By utilizing this strategy, multiple time-taking iterations can be reduced and done in a single cycle, thereby increasing the likelihood that the ring VCO will function to the best of its ability. After getting the optimized values for the design parameters of the ring VCO’s, the circuit has been designed for the performance analysis. The same is demonstrated by evaluating the performance of the circuit and confirming the results of the transient analysis and noise analysis carried out with Cadence tools under a variety of different operating conditions using the 45 nm technology process. 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Raj, Aditya ddc 004 bkl 53.55 bkl 53.73 misc Ring VCO misc CVCO misc CMOS misc Power dissipation misc Phase noise misc Oscillating misc Optimization misc PSO Design of a CMOS based ring VCO using particle swarm optimisation |
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004 VZ 53.55 bkl 53.73 bkl Design of a CMOS based ring VCO using particle swarm optimisation Ring VCO (dpeaa)DE-He213 CVCO (dpeaa)DE-He213 CMOS (dpeaa)DE-He213 Power dissipation (dpeaa)DE-He213 Phase noise (dpeaa)DE-He213 Oscillating (dpeaa)DE-He213 Optimization (dpeaa)DE-He213 PSO (dpeaa)DE-He213 |
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ddc 004 bkl 53.55 bkl 53.73 misc Ring VCO misc CVCO misc CMOS misc Power dissipation misc Phase noise misc Oscillating misc Optimization misc PSO |
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design of a cmos based ring vco using particle swarm optimisation |
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Design of a CMOS based ring VCO using particle swarm optimisation |
| abstract |
Abstract This work investigates performance improvement the of ring voltage-controlled oscillator. Particle swarm optimization (PSO) techniques are used on both the physical and schematic levels to optimize the design parameter values (width of the NMOS “$${\mathrm{W}}_{\mathrm{n}}$$” and PMOS “$${\mathrm{W}}_{\mathrm{p}}$$”). By utilizing this strategy, multiple time-taking iterations can be reduced and done in a single cycle, thereby increasing the likelihood that the ring VCO will function to the best of its ability. After getting the optimized values for the design parameters of the ring VCO’s, the circuit has been designed for the performance analysis. The same is demonstrated by evaluating the performance of the circuit and confirming the results of the transient analysis and noise analysis carried out with Cadence tools under a variety of different operating conditions using the 45 nm technology process. The analysis has been carried out in a variety of PVT corners (fast–fast, slow–slow, fast–slow, and slow–fast). © The Author(s), under exclusive licence to Springer Science+Business Media, LLC, part of Springer Nature 2023 |
| abstractGer |
Abstract This work investigates performance improvement the of ring voltage-controlled oscillator. Particle swarm optimization (PSO) techniques are used on both the physical and schematic levels to optimize the design parameter values (width of the NMOS “$${\mathrm{W}}_{\mathrm{n}}$$” and PMOS “$${\mathrm{W}}_{\mathrm{p}}$$”). By utilizing this strategy, multiple time-taking iterations can be reduced and done in a single cycle, thereby increasing the likelihood that the ring VCO will function to the best of its ability. After getting the optimized values for the design parameters of the ring VCO’s, the circuit has been designed for the performance analysis. The same is demonstrated by evaluating the performance of the circuit and confirming the results of the transient analysis and noise analysis carried out with Cadence tools under a variety of different operating conditions using the 45 nm technology process. The analysis has been carried out in a variety of PVT corners (fast–fast, slow–slow, fast–slow, and slow–fast). © The Author(s), under exclusive licence to Springer Science+Business Media, LLC, part of Springer Nature 2023 |
| abstract_unstemmed |
Abstract This work investigates performance improvement the of ring voltage-controlled oscillator. Particle swarm optimization (PSO) techniques are used on both the physical and schematic levels to optimize the design parameter values (width of the NMOS “$${\mathrm{W}}_{\mathrm{n}}$$” and PMOS “$${\mathrm{W}}_{\mathrm{p}}$$”). By utilizing this strategy, multiple time-taking iterations can be reduced and done in a single cycle, thereby increasing the likelihood that the ring VCO will function to the best of its ability. After getting the optimized values for the design parameters of the ring VCO’s, the circuit has been designed for the performance analysis. The same is demonstrated by evaluating the performance of the circuit and confirming the results of the transient analysis and noise analysis carried out with Cadence tools under a variety of different operating conditions using the 45 nm technology process. The analysis has been carried out in a variety of PVT corners (fast–fast, slow–slow, fast–slow, and slow–fast). © The Author(s), under exclusive licence to Springer Science+Business Media, LLC, part of Springer Nature 2023 |
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| title_short |
Design of a CMOS based ring VCO using particle swarm optimisation |
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https://dx.doi.org/10.1007/s10470-023-02206-3 |
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Majumder, Saikat Mishra, Guru Prasad |
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| doi_str |
10.1007/s10470-023-02206-3 |
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2024-07-03T17:18:01.902Z |
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| score |
7.399987 |